2026-04-22 01:31:23.597 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.205.20:5700'
2026-04-22 01:31:23.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.205.20:5802)
2026-04-22 01:31:23.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.205.20:5801)
2026-04-22 01:31:23.597 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.205.22:6700'
2026-04-22 01:31:23.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.205.22:6802)
2026-04-22 01:31:23.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.205.22:6801)
2026-04-22 01:31:23.597 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.205.20:5700/1'
2026-04-22 01:31:23.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.205.20:5804)
2026-04-22 01:31:23.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.205.20:5803)
2026-04-22 01:31:23.597 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.205.20:5700/2'
2026-04-22 01:31:23.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.205.20:5806)
2026-04-22 01:31:23.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.205.20:5805)
2026-04-22 01:31:23.597 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.205.20:5700/3'
2026-04-22 01:31:23.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.205.20:5808)
2026-04-22 01:31:23.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.205.20:5807)
2026-04-22 01:31:23.597 [INFO] fake_trx.py:429 Init complete
2026-04-22 01:31:23.597 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-04-22 01:31:25.149 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:31:25.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:31:25.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:25.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:25.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:31:25.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:31:28.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:31:28.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:31:28.166 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:28.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:31:28.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 0 -> 1
2026-04-22 01:31:28.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:31:28.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:31:28.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:31:28.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:28.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:28.174 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:31:28.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:31:28.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 0 -> 1
2026-04-22 01:31:28.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:28.177 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:31:28.177 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:31:28.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:31:28.178 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:28.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:28.178 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:31:28.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:31:28.179 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 0 -> 1
2026-04-22 01:31:28.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:28.180 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:31:28.180 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:31:28.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:31:28.180 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:28.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:31:28.180 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:31:28.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:31:28.180 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 0 -> 1
2026-04-22 01:31:28.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:28.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:31:28.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:31:28.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:31:28.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:31:28.182 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:31:28.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:31:28.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:31:28.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:31:28.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:31:28.183 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:31:28.183 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:28.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:28.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:28.188 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:31:28.663 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:31:28.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:28.730 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:31:28.733 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:31:28.735 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:31:28.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:28.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:28.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:28.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:28.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:28.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:28.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:28.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:28.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:28.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:28.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:28.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:28.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:29.130 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:31:29.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:29.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:29.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:29.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:29.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:29.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:29.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:29.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:29.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:29.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:29.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:29.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:29.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:29.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:29.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:29.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:29.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:29.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:29.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:29.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:29.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:29.601 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:31:29.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:29.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:29.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:29.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:29.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:29.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:29.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:29.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:29.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:29.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:29.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:29.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:29.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:30.072 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:31:30.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:30.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:30.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:30.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:30.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:30.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:30.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:30.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:30.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:30.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:30.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:30.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:30.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:30.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:30.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:30.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:30.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:30.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:30.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:30.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:30.545 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:31:30.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:30.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:30.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:30.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:30.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:30.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:30.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:31.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:31.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:31.017 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:31:31.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:31.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:31.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:31.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:31.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:31.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:31.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:31.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:31.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:31.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:31.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:31.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:31.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:31.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:31.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:31.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:31.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:31.489 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:31:31.960 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:31:32.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:32.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:32.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:32.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:32.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:32.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:32.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:32.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:32.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:32.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:32.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:32.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:32.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:32.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:32.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:32.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:32.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:32.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:32.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:32.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:32.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:32.431 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:31:32.902 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:31:33.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:33.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:33.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:33.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:33.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:33.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:33.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:33.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:33.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:33.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:33.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:33.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:33.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:33.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:33.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:33.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:33.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:33.373 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:31:33.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:33.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:33.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:33.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:33.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:33.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:33.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:33.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:33.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:33.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:33.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:33.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:33.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:33.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:33.840 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:31:33.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:33.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:33.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:33.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:34.310 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:31:34.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:34.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:34.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:34.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:34.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:34.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:34.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:34.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:34.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:34.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:34.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:34.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:34.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:34.782 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:31:34.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:34.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:34.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:34.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:35.256 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:31:35.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:35.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:35.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:35.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:35.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:35.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:35.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:35.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:35.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:35.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:35.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:35.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:35.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:35.727 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:31:35.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:35.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:35.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:35.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:36.199 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:31:36.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:36.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:36.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:36.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:36.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:36.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:36.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:36.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:36.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:36.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:36.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:36.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:36.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:36.671 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:31:36.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:36.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:36.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:36.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:37.144 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:31:37.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:37.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:37.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:37.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:37.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:37.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:37.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:37.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:37.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:37.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:37.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:37.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:37.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:37.616 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:31:37.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:37.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:37.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:37.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:38.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:38.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:38.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:38.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:38.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:38.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:38.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:38.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:38.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:38.087 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:31:38.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:38.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:38.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:38.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:38.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:38.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:38.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:38.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:38.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:38.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:38.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:38.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:38.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:38.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:38.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:38.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:38.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.559 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:31:38.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:38.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:38.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:38.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:38.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:38.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:38.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:38.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:38.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:38.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:38.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:38.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:38.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:38.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:38.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:39.032 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:31:39.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:39.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:39.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:39.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:39.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:39.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:39.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:39.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:39.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:39.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:39.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:39.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:39.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:39.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:39.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:39.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:39.504 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:31:39.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:39.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:39.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:39.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:39.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:39.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:39.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:39.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:39.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:39.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:39.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:39.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:39.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:39.975 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:31:40.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:40.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:40.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:40.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:40.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:40.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:40.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:40.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:40.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:40.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:40.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:40.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:40.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:40.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:40.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:40.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:40.446 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:31:40.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:40.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:40.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:40.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:40.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:40.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:40.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:40.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:40.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:40.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:40.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:40.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:40.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:40.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:40.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:40.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:40.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:40.917 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:31:40.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:40.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:40.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:40.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:40.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:41.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:41.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:41.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:41.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:41.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:41.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:41.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:41.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:41.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:41.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:41.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:31:41.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:31:41.388 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:31:41.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:41.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:31:41.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:31:41.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:41.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:41.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:31:41.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:41.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:41.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:41.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:41.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:41.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:41.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:41.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:41.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:31:41.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:41.859 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:31:41.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:31:41.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:31:41.860 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:31:41.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:31:41.861 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2960 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:41.861 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2960 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:41.861 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2960 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:41.861 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2960 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:41.861 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2960 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:41.861 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2960 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:41.861 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2960 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:41.861 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2960 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:46.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:31:46.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:31:46.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:46.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:46.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:31:46.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:31:46.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:31:46.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:31:46.868 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:46.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:31:46.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:31:46.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:31:46.870 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:31:46.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:31:46.871 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:46.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:46.871 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:31:46.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:31:46.872 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:31:46.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:46.872 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:31:46.872 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:31:46.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:31:46.873 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:46.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:46.873 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:31:46.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:31:46.873 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:31:46.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:46.874 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:31:46.874 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:31:46.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:31:46.874 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:46.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:31:46.875 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:31:46.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:31:46.875 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:31:46.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:46.877 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:31:46.877 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:31:46.877 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:31:46.877 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:46.882 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:31:47.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:31:47.406 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:31:47.409 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:31:47.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.411 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:31:47.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:47.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:47.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.830 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:31:47.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:47.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:47.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:47.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:47.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.293 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-04-22 01:31:48.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.759 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:31:48.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:48.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:48.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:48.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:48.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:49.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:49.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 01:31:49.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.225 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:31:49.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:49.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:49.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:49.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:49.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:49.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:49.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:31:49.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:49.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:31:49.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:31:49.427 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:31:49.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:31:49.427 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=555 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:49.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=555 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:49.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=555 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:49.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=555 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:49.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=555 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:49.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=555 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:49.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=555 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:49.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=555 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:54.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:31:54.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:31:54.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:54.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:54.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:31:54.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:31:54.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:31:54.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:31:54.438 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:54.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:31:54.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:31:54.441 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:31:54.441 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:31:54.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:31:54.442 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:54.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:54.442 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:31:54.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:31:54.443 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:31:54.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:54.444 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:31:54.444 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:31:54.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:31:54.444 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:54.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:54.444 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:31:54.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:31:54.444 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:31:54.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:54.446 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:31:54.446 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:31:54.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:31:54.446 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:31:54.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:31:54.446 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:31:54.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:31:54.446 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:31:54.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:54.448 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:31:54.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:31:54.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:31:54.449 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:31:54.449 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:31:54.449 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:54.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:31:54.454 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:31:54.932 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:31:54.963 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:31:54.964 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:31:54.964 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:31:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:54.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:31:54.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:31:54.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:31:54.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:54.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:31:54.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:31:54.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:31:54.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:31:54.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:31:54.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:54.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:31:54.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:54.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:31:54.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:31:54.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:31:54.996 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:31:54.997 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:54.997 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:54.997 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:54.997 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:54.997 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:54.997 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:54.997 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:31:59.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:31:59.995 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:31:59.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:31:59.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:31:59.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:32:00.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:32:00.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:32:00.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:32:00.005 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:00.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:32:00.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:32:00.007 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:32:00.007 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:32:00.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:32:00.007 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:00.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:32:00.008 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:32:00.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:32:00.008 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:32:00.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:00.010 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:32:00.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:32:00.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:32:00.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:00.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:32:00.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:32:00.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:32:00.010 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:32:00.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:00.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:32:00.012 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:32:00.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:32:00.013 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:00.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:32:00.013 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:32:00.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:32:00.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:32:00.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:00.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:00.016 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:32:00.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:32:00.016 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:32:00.017 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:00.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:00.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:00.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:00.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:00.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:00.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:00.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:00.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:00.021 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:32:00.499 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:32:00.548 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:32:00.550 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:32:00.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:00.551 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:32:00.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:00.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:00.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:00.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:00.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:00.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:00.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:00.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:32:00.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:32:00.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:32:00.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:32:00.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:32:00.589 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:32:00.589 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:32:00.589 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:32:00.589 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:32:00.589 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:32:00.589 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:32:00.589 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:32:00.589 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:32:00.589 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:32:00.589 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:32:05.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:32:05.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:32:05.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:32:05.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:32:05.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:32:05.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:32:05.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:32:05.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:32:05.603 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:05.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:32:05.603 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:32:05.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:32:05.607 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:32:05.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:32:05.607 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:05.607 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:32:05.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:32:05.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:32:05.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:32:05.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:05.610 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:32:05.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:32:05.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:32:05.610 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:05.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:32:05.611 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:32:05.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:32:05.611 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:32:05.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:05.613 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:32:05.613 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:32:05.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:32:05.613 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:05.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:32:05.613 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:32:05.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:32:05.613 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:32:05.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:32:05.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:32:05.618 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:32:05.618 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:32:05.618 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:05.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:05.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:05.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:05.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:05.623 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:32:06.101 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:32:06.148 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:32:06.149 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:32:06.150 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:32:06.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:06.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:06.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:06.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:06.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:06.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:06.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:06.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:06.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:32:06.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:32:06.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:32:06.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:32:06.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:32:06.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:32:06.270 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:32:11.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:32:11.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:32:11.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:32:11.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:32:11.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:32:11.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:32:11.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:32:11.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:32:11.283 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:11.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:32:11.283 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:32:11.285 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:32:11.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:32:11.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:32:11.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:11.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:32:11.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:32:11.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:32:11.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:32:11.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:11.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:32:11.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:32:11.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:32:11.288 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:11.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:32:11.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:32:11.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:32:11.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:32:11.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:11.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:32:11.290 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:32:11.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:32:11.290 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:32:11.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:32:11.290 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:32:11.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:32:11.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:32:11.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:11.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:32:11.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:32:11.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:32:11.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:32:11.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:32:11.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:32:11.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:32:11.293 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:32:11.293 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:11.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:11.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:11.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:32:11.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:32:11.818 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:32:11.819 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:32:11.821 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:32:11.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:11.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:11.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:11.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:11.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:11.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:11.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:11.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:11.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:11.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:11.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:11.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:11.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:11.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:11.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:12.244 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:32:12.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:12.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:12.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:12.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:12.718 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:32:13.190 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:32:13.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:13.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:13.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:13.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:13.662 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:32:14.133 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:32:14.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:14.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:14.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:14.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:14.607 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:32:15.079 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:32:15.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:15.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:15.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:15.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:15.551 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:32:15.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:15.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:15.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:15.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:15.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:15.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:15.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:15.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:15.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:15.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:15.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:15.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:16.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:16.024 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:32:16.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:16.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:16.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:16.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:16.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:16.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:32:16.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:32:16.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:32:16.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:32:16.497 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:32:16.969 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:32:17.440 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:32:17.913 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:32:18.385 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:32:18.857 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:32:19.328 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:32:19.802 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:32:20.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:20.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:20.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:20.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:20.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:20.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:20.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:20.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:20.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:20.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:20.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:20.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:20.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:20.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:20.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:20.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:20.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:20.274 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:32:20.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:20.746 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:32:21.217 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:32:21.691 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:32:22.163 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:32:22.635 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:32:23.106 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:32:23.579 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:32:24.051 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:32:24.523 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:32:24.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:24.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:24.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:24.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:24.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:24.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:24.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:24.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:24.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:24.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:24.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:24.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:24.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:24.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:24.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:24.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:24.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:24.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:24.996 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:32:25.469 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:32:25.941 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:32:26.415 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:32:26.887 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:32:27.360 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:32:27.833 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:32:28.305 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:32:28.777 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:32:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:28.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:28.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:28.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:28.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:28.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:29.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:29.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:29.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:29.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:29.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:29.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:29.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:29.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:29.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:29.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:29.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:29.248 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:32:29.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:29.719 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:32:30.192 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:32:30.665 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:32:31.138 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:32:31.608 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:32:32.079 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:32:32.553 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:32:33.025 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:32:33.498 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:32:33.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:33.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:33.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:33.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:33.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:33.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:33.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:33.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:33.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:33.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:33.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:33.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:33.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:33.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:33.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:33.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:33.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:33.971 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:32:34.444 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:32:34.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:34.916 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:32:35.387 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:32:35.860 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:32:36.333 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:32:36.805 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:32:37.279 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:32:37.751 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:32:38.224 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:32:38.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:38.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:38.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:38.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:38.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:38.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:38.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:38.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:38.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:38.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:38.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:38.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:38.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:38.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:38.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:38.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:38.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:38.694 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:32:39.168 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:32:39.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:39.641 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:32:40.113 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:32:40.586 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:32:41.059 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:32:41.532 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:32:42.005 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:32:42.478 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:32:42.950 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:32:43.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:43.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:43.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:43.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:43.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:43.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:43.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:43.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:43.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:43.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:43.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:43.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:43.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:43.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:43.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:43.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:43.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:43.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:43.422 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:32:43.891 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:32:44.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:44.362 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 01:32:44.833 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 01:32:45.306 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 01:32:45.779 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 01:32:46.252 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 01:32:46.725 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 01:32:47.197 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 01:32:47.669 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 01:32:48.143 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 01:32:48.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:48.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:48.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:48.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:48.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:48.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:48.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:48.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:48.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:48.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:48.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:48.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:48.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:48.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:48.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:48.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:48.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:48.616 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 01:32:49.088 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 01:32:49.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:49.561 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 01:32:50.034 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 01:32:50.506 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 01:32:50.979 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 01:32:51.452 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 01:32:51.924 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 01:32:52.395 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 01:32:52.865 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 01:32:53.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:53.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:53.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:53.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:53.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:53.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:53.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:53.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:53.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:53.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:53.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:53.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:53.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:32:53.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:53.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:53.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:53.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:53.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:53.336 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 01:32:53.807 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 01:32:53.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:54.280 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 01:32:54.753 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 01:32:55.226 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 01:32:55.696 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 01:32:56.170 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 01:32:56.643 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 01:32:57.115 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 01:32:57.588 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 01:32:57.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:57.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:57.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:57.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:57.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:32:57.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:32:57.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:32:57.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:57.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:57.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:57.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:32:57.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:32:57.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:57.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:32:57.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:32:57.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:57.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:32:58.060 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 01:32:58.533 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 01:32:58.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:32:59.006 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 01:32:59.478 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 01:32:59.951 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 01:33:00.424 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 01:33:00.897 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 01:33:01.369 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 01:33:01.840 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 01:33:02.310 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 01:33:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:02.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:02.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:02.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:02.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:02.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:02.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:02.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:02.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:02.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:02.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:02.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:02.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:02.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:02.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:02.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:02.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:02.780 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 01:33:03.252 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 01:33:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:03.725 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 01:33:04.198 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 01:33:04.670 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 01:33:05.141 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 01:33:05.612 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 01:33:06.083 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 01:33:06.553 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 01:33:07.024 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 01:33:07.495 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 01:33:07.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:07.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:07.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:07.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:07.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:07.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:07.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:07.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:07.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:07.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:07.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:07.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:07.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:07.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:07.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:07.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:07.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:07.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:07.968 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 01:33:08.440 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 01:33:08.912 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 01:33:09.386 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 01:33:09.858 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 01:33:10.330 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 01:33:10.804 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 01:33:11.276 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 01:33:11.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:11.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:11.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:11.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:11.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:11.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:11.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:11.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:11.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:11.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:11.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:11.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:11.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:11.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:11.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:11.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:11.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:11.746 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 01:33:11.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:12.214 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 01:33:12.685 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 01:33:13.159 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 01:33:13.631 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 01:33:14.103 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 01:33:14.574 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 01:33:15.047 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 01:33:15.520 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 01:33:15.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:15.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:15.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:15.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:15.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:15.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:15.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:15.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:15.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:15.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:15.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:15.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:15.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:15.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:15.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:15.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:15.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:15.991 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 01:33:16.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:16.463 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 01:33:16.936 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 01:33:17.408 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 01:33:17.880 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 01:33:18.354 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 01:33:18.826 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 01:33:19.298 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 01:33:19.769 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 01:33:20.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:20.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:20.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:20.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:20.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:20.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:20.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:20.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:20.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:20.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:20.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:20.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:20.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:20.242 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 01:33:20.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:20.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:20.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:20.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:20.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:20.715 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 01:33:21.187 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 01:33:21.658 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 01:33:22.131 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 01:33:22.604 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 01:33:23.076 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 01:33:23.546 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 01:33:24.017 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 01:33:24.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:24.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:24.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:24.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:24.456 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=15805 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:33:24.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:24.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:24.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:24.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:24.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:24.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:24.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:24.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:24.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:24.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:24.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:24.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:24.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:24.490 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 01:33:24.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:24.963 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 01:33:25.435 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 01:33:25.908 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 01:33:26.381 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 01:33:26.853 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 01:33:27.324 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 01:33:27.797 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 01:33:28.270 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 01:33:28.742 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 01:33:28.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:28.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:28.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:28.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:28.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:28.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:28.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:28.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:28.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:28.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:28.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:28.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:28.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:28.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:28.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:28.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:28.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:29.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:29.213 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 01:33:29.686 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 01:33:30.158 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 01:33:30.630 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 01:33:31.104 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 01:33:31.576 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 01:33:32.048 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 01:33:32.519 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-22 01:33:32.992 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-22 01:33:33.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:33.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:33.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:33.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:33.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:33.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:33.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:33.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:33.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:33.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:33.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:33.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:33.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:33.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:33.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:33.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:33.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:33.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:33.460 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-22 01:33:33.931 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-22 01:33:34.402 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-22 01:33:34.875 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-22 01:33:35.348 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-22 01:33:35.820 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-22 01:33:36.291 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-22 01:33:36.762 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-22 01:33:37.232 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-22 01:33:37.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:37.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:37.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:37.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:37.422 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=18607 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:33:37.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:37.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:37.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:37.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:37.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:37.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:37.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:37.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:37.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:37.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:37.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:37.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:37.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:37.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:37.703 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-22 01:33:38.176 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-22 01:33:38.649 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-22 01:33:39.121 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-22 01:33:39.594 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-22 01:33:40.066 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-22 01:33:40.538 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-22 01:33:41.012 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-22 01:33:41.484 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-22 01:33:41.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:41.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:41.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:41.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:41.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:33:41.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:33:41.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:33:41.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:33:41.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:33:41.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:33:41.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:33:41.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:33:41.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:33:41.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:33:41.700 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:33:41.700 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19530 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:33:41.700 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19530 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:33:41.701 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19530 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:33:41.701 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19530 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:33:41.701 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19530 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:33:46.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:33:46.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:33:46.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:33:46.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:33:46.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:33:46.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:33:46.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:33:46.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:33:46.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:33:46.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:33:46.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:33:46.715 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:33:46.715 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:33:46.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:33:46.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:33:46.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:33:46.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:33:46.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:33:46.717 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:33:46.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:33:46.718 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:33:46.718 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:33:46.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:33:46.718 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:33:46.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:33:46.718 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:33:46.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:33:46.718 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:33:46.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:33:46.720 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:33:46.720 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:33:46.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:33:46.720 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:33:46.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:33:46.720 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:33:46.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:33:46.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:33:46.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:33:46.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:33:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:33:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:33:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:33:46.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:33:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:33:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:33:46.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:33:46.723 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:33:46.723 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:46.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:33:46.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:33:46.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:33:46.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:33:46.725 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:33:51.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:33:51.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:33:51.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:33:51.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:33:51.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:33:51.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:33:51.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:33:51.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:33:51.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:33:51.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:33:51.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:33:51.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:33:51.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:33:51.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:33:51.744 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:33:51.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:33:51.744 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:33:51.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:33:51.744 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:33:51.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:33:51.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:33:51.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:33:51.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:33:51.745 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:33:51.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:33:51.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:33:51.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:33:51.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:33:51.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:33:51.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:33:51.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:33:51.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:33:51.747 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:33:51.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:33:51.748 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:33:51.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:33:51.748 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:33:51.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:51.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:33:51.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:33:51.750 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:33:51.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:51.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:51.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:33:52.235 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:33:52.282 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:33:52.284 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:33:52.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:52.288 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:33:52.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:52.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:52.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:52.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:52.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:52.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:52.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:52.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:52.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:52.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:52.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:52.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:52.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:52.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:52.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:52.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:52.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:52.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:52.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:52.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:52.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:52.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:52.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:52.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:52.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:52.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:52.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:52.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:52.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:52.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:52.706 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:33:52.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:33:52.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:33:52.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:33:52.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:33:52.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:52.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:52.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:52.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:52.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:52.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:52.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:52.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:52.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:52.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:52.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:52.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:53.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:53.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:53.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:53.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:53.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:53.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:53.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:53.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:53.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:53.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:53.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:53.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:53.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:53.177 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:33:53.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:53.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:53.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:53.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:53.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:53.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:53.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:53.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:53.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:53.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.647 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:33:53.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:53.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:53.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:53.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:53.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:53.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:53.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:53.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:53.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:33:53.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:33:53.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:33:53.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:33:54.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:33:54.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:54.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:54.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:54.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:54.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:54.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:54.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:54.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:54.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:54.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:54.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:54.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:54.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:54.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:54.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:54.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:54.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:54.590 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:33:54.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:54.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:54.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:54.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:54.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:54.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:54.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:54.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:54.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:54.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:54.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:54.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:54.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:33:54.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:33:54.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:54.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:33:54.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:33:54.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:54.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:54.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:54.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:55.061 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:33:55.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:55.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:55.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:55.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:55.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:55.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:55.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:55.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:55.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:55.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:55.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:55.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:55.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:55.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:55.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:55.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:55.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:55.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:55.534 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:33:55.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:33:55.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:33:55.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:33:55.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:33:55.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:55.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:55.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:55.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:55.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:55.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:55.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:55.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:55.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:55.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:55.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:55.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:55.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:55.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:55.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:55.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:55.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:56.007 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:33:56.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:56.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:56.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:56.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:56.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:56.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:56.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:56.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:56.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:56.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:56.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:56.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:33:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:56.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:56.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:56.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:56.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:56.477 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:33:56.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:33:56.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:33:56.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:33:56.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:33:56.946 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:33:57.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:57.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:57.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:57.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:57.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:57.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:57.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:57.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:57.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:57.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:57.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:57.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:57.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:57.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:57.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:57.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:57.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:57.419 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:33:57.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:57.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:57.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:57.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:57.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:57.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:57.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:57.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:57.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:57.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:57.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:57.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:57.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:57.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:57.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:57.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:57.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:57.891 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:33:58.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:58.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:58.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:58.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:58.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:58.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:58.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:58.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:58.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:58.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:58.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:58.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:58.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:58.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:58.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:58.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:58.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:58.363 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:33:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:58.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:58.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:58.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:58.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:58.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:58.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:58.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:58.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:58.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:58.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:58.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:58.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:58.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:58.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:58.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:58.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:58.834 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:33:59.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:59.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:59.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:59.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:59.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:59.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:59.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:59.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:59.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:59.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:59.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:59.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:59.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:59.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:59.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:59.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:59.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:59.305 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:33:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:59.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:59.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:59.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:59.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:59.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:59.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:33:59.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:59.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:59.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:59.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:33:59.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:33:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:59.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:33:59.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:33:59.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:59.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:59.776 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:33:59.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:33:59.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:33:59.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:59.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:59.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:33:59.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:33:59.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:00.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:00.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:00.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:00.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:00.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:00.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:00.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:00.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:00.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:00.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:00.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:00.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:00.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:00.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:00.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:00.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:00.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:00.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:00.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:00.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:00.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.245 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:34:00.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:00.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:00.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:00.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:00.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:00.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:00.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:00.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:00.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:00.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:00.712 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:34:00.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:00.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:00.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:00.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:01.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:01.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:01.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:01.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:01.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:01.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:01.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:01.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:01.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:01.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:01.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:01.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:01.183 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:34:01.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:01.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:01.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:01.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:01.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:01.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:01.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:01.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:01.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:01.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:01.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:01.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:01.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:01.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:34:01.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:34:01.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:34:01.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:34:01.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:34:01.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:34:01.639 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:34:06.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:34:06.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:34:06.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:34:06.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:34:06.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:34:06.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:34:06.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:34:06.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:34:06.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:34:06.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:34:06.650 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:34:06.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:34:06.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:34:06.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:34:06.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:34:06.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:34:06.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:34:06.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:34:06.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:34:06.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:06.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:34:06.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:34:06.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:34:06.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:34:06.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:34:06.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:34:06.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:34:06.657 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:34:06.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:06.657 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:34:06.658 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:34:06.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:34:06.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:34:06.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:34:06.658 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:34:06.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:34:06.658 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:34:06.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:06.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:34:06.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:34:06.662 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:34:06.662 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:06.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:06.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:06.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:06.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:06.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:06.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:06.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:06.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:06.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:06.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:34:07.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:34:07.192 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:34:07.194 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:34:07.196 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:34:07.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:07.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:07.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:07.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:07.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:07.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:07.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:07.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:07.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:07.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:07.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:07.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:07.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:07.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:07.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:34:07.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:07.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:07.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:07.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:07.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:07.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:08.090 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:34:08.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:08.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:08.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:08.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:08.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:08.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:08.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:08.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:08.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:08.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:08.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:08.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:08.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:08.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:08.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:08.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:08.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:08.562 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:34:08.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:08.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:08.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:08.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:09.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:34:09.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:09.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:09.505 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:34:09.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:09.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:09.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:09.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:09.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:09.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:09.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:09.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:09.727 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=662 tn=3 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:09.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:09.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:09.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:09.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:09.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:09.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:09.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:09.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:09.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:09.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:09.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:09.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:09.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:09.978 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:34:10.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:10.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:10.451 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:34:10.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:10.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:10.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:10.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:10.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:10.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:10.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:10.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:10.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:10.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:10.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:10.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:10.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:10.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:10.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:10.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:10.923 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:34:10.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:10.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:10.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:10.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:10.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:11.394 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:34:11.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:11.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:11.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:11.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:11.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:11.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:11.867 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:34:12.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:12.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:12.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:12.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:12.339 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:34:12.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:12.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:12.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:12.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:12.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:12.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:12.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:12.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:12.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:12.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:12.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:12.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:12.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:12.812 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:34:13.283 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:34:13.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:13.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:13.756 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:34:13.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:13.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:13.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:13.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:13.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:13.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:13.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:13.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:13.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:13.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:13.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:13.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:13.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:13.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:13.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:13.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:13.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:14.228 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:34:14.701 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:34:14.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:14.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:15.174 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:34:15.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:15.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:15.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:15.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:15.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:15.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:15.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:15.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:15.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:15.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:15.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:15.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:15.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:15.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:15.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:15.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:15.647 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:34:16.119 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:34:16.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:16.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:16.593 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:34:16.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:16.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:16.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:16.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:16.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:16.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:16.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:16.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:16.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:16.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:16.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:16.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:16.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:16.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:16.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:16.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:16.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:16.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:17.065 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:34:17.537 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:34:17.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:17.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:18.008 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:34:18.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:18.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:18.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:18.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:18.401 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=2535 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:18.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:18.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:18.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:18.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:18.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:18.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:18.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:18.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:18.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:18.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:18.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:18.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:18.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:18.480 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:34:18.949 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:34:19.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:19.420 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:34:19.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:19.894 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:34:19.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:19.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:19.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:19.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:19.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:19.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:19.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:19.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:19.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:19.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:19.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:19.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:19.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:19.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:19.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:19.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:19.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:19.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:20.362 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:34:20.833 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:34:21.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:21.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:21.306 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:34:21.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:21.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:21.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:21.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:21.761 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=3263 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:21.778 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:34:21.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:21.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:21.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:21.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:21.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:21.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:21.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:21.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:21.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:21.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:21.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:21.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:21.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:22.250 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:34:22.722 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:34:22.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:22.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:23.193 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:34:23.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:23.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:23.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:23.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:23.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:23.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:23.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:23.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:23.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:23.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:23.228 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:23.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:23.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:23.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:23.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:23.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:23.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:23.658 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:34:24.129 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:34:24.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:24.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:24.600 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:34:24.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:24.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:24.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:24.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:24.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:24.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:24.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:24.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:24.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:24.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:24.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:24.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:24.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:24.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:24.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:24.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:24.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:25.071 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:34:25.544 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:34:25.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:25.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:26.016 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:34:26.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:26.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:26.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:26.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:26.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:26.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:26.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:26.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:26.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:26.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:26.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:26.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:26.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:26.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:26.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:26.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:26.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:26.488 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:34:26.959 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:34:27.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:27.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:27.432 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:34:27.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:27.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:27.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:27.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:27.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:27.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:27.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:27.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:27.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:27.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:27.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:27.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:27.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:27.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:27.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:27.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:27.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:27.900 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:34:28.371 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:34:28.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:28.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:28.845 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:34:29.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:29.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:29.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:29.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:29.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:29.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:29.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:29.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:29.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:29.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:29.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:29.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:29.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:29.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:29.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:29.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:29.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:29.313 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:34:29.783 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:34:29.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:29.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:30.255 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:34:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:30.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:30.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:30.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:30.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:30.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:30.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:30.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:30.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:30.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:30.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:30.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:30.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:30.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:30.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:30.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:30.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:30.725 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:34:31.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:31.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:31.196 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:34:31.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:31.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:31.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:31.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:31.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:31.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:31.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:31.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:31.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:31.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:31.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:31.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:31.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:31.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:31.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:31.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:31.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:31.669 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:34:32.142 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:34:32.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:32.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:32.614 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:34:33.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:33.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:33.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:33.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:33.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:33.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:33.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:33.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:33.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:33.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:33.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:33.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:33.084 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:34:33.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:33.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:33.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:33.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:33.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:33.555 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:34:33.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:33.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:34.026 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:34:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:34.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:34.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:34.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:34.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:34.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:34.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:34.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:34.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:34.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:34.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:34.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:34.499 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:34:34.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:34.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:34.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:34.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:34.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:34.972 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:34:35.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:35.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:35.444 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:34:35.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:35.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:35.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:35.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:35.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:35.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:35.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:35.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:35.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:34:35.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:34:35.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:34:35.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:34:35.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:34:35.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:34:35.900 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:34:35.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6323 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:35.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:35.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:35.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:35.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:35.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:35.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:35.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:34:40.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:34:40.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:34:40.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:34:40.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:34:40.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:34:40.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:34:40.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:34:40.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:34:40.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:34:40.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:34:40.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:34:40.918 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:34:40.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:34:40.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:34:40.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:34:40.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:34:40.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:34:40.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:34:40.918 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:34:40.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:40.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:34:40.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:34:40.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:34:40.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:34:40.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:34:40.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:34:40.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:34:40.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:34:40.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:40.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:34:40.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:34:40.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:34:40.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:34:40.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:34:40.925 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:34:40.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:34:40.925 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:34:40.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:40.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:34:40.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:34:40.929 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:34:40.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:34:40.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:34:41.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:34:41.460 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:34:41.462 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:34:41.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:41.465 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:34:41.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:41.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:41.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:41.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:41.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:41.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:41.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:41.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:41.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:41.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:41.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:41.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:41.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:41.885 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:34:41.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:41.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:41.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:41.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:42.356 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:34:42.829 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:34:42.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:42.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:42.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:42.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:43.301 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:34:43.778 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:34:43.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:43.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:43.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:43.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:44.250 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:34:44.724 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:34:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:44.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:44.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:45.196 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:34:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:45.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:45.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:45.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:45.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:45.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:45.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:45.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:45.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:45.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:45.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:45.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:45.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:45.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:45.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:45.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:45.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:45.668 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:34:45.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:34:45.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:34:45.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:34:45.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:34:46.139 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:34:46.612 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:34:47.085 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:34:47.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:34:48.031 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:34:48.526 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:34:48.998 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:34:49.469 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:34:49.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:49.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:49.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:49.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:49.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:49.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:49.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:49.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:49.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:49.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:49.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:49.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:49.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:49.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:49.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:49.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:49.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:49.942 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:34:50.414 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:34:50.886 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:34:51.359 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:34:51.832 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:34:52.304 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:34:52.775 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:34:53.246 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:34:53.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:53.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:53.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:53.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:53.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:53.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:53.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:53.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:53.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:53.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:53.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:53.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:53.716 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:34:53.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:53.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:53.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:53.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:53.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:54.187 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:34:54.661 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:34:55.133 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:34:55.605 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:34:56.079 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:34:56.551 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:34:57.023 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:34:57.494 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:34:57.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:57.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:57.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:57.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:57.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:34:57.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:34:57.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:34:57.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:57.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:57.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:57.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:34:57.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:34:57.967 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:34:58.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:34:58.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:34:58.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:34:58.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:58.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:34:58.440 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:34:58.913 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:34:59.386 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:34:59.859 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:35:00.331 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:35:00.802 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:35:01.276 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:35:01.748 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:35:02.220 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:35:02.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:02.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:02.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:02.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:02.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:02.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:02.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:02.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:02.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:02.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:02.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:02.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:02.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:02.693 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:35:02.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:02.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:02.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:02.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:03.167 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:35:03.639 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:35:04.110 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:35:04.583 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:35:05.056 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:35:05.528 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:35:06.002 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:35:06.474 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:35:06.947 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:35:07.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:07.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:07.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:07.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:07.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:07.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:07.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:07.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:07.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:07.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:07.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:07.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:07.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:07.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:07.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:07.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:07.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:07.420 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:35:07.893 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:35:08.365 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:35:08.836 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:35:09.309 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:35:09.782 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:35:10.254 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:35:10.728 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:35:11.200 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:35:11.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:11.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:11.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:11.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:11.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:11.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:11.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:11.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:11.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:11.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:11.443 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:11.443 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:11.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:35:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:11.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:11.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:11.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:11.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:11.672 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:35:12.143 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:35:12.617 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:35:13.102 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:35:13.575 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:35:14.045 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 01:35:14.516 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 01:35:14.987 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 01:35:15.458 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 01:35:15.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:15.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:15.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:15.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:15.823 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=7527 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:35:15.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:15.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:15.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:15.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:15.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:15.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:15.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:15.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:15.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:15.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:15.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:15.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:15.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:15.928 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 01:35:16.399 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 01:35:16.870 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 01:35:17.341 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 01:35:17.812 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 01:35:18.282 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 01:35:18.753 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 01:35:19.227 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 01:35:19.699 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 01:35:20.171 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 01:35:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:20.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:20.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:20.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:20.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:20.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:20.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:20.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:20.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:20.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:20.228 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:20.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:20.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:35:20.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:20.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:20.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:20.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:20.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:20.644 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 01:35:21.117 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 01:35:21.590 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 01:35:22.063 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 01:35:22.535 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 01:35:23.008 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 01:35:23.479 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 01:35:23.953 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 01:35:24.425 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 01:35:24.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:24.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:24.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:24.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:24.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:24.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:24.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:24.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:24.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:24.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:24.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:24.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:24.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:24.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:24.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:24.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:24.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:24.898 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 01:35:25.371 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 01:35:25.843 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 01:35:26.317 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 01:35:26.789 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 01:35:27.261 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 01:35:27.732 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 01:35:28.206 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 01:35:28.678 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 01:35:28.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:28.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:28.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:28.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:28.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:28.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:28.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:28.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:28.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:28.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:28.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:28.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:28.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:28.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:28.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:28.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:28.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:29.150 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 01:35:29.621 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 01:35:30.092 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 01:35:30.566 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 01:35:31.038 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 01:35:31.509 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 01:35:31.983 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 01:35:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 01:35:32.927 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 01:35:33.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:33.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:33.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:33.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:33.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:33.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:33.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:33.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:33.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:33.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:33.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:33.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:33.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:33.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:33.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:33.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:33.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:33.400 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 01:35:33.873 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 01:35:34.345 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 01:35:34.818 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 01:35:35.291 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 01:35:35.763 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 01:35:36.234 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 01:35:36.707 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 01:35:37.179 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 01:35:37.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:37.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:37.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:37.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:37.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:37.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:37.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:37.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:37.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:37.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:37.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:37.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:37.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:37.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:37.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:37.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:37.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:37.651 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 01:35:38.122 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 01:35:38.595 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 01:35:39.068 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 01:35:39.540 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 01:35:40.011 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 01:35:40.484 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 01:35:40.956 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 01:35:41.428 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 01:35:41.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:41.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:41.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:41.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:41.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:41.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:41.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:41.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:41.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:41.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:41.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:41.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:41.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:41.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:41.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:41.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:41.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:41.895 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 01:35:42.365 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 01:35:42.838 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 01:35:43.311 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 01:35:43.783 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 01:35:44.254 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 01:35:44.727 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 01:35:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 01:35:45.671 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 01:35:45.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:45.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:45.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:45.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:45.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:45.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:45.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:45.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:45.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:45.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:45.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:45.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:45.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:45.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:45.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:45.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:46.142 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 01:35:46.613 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 01:35:47.087 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 01:35:47.559 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 01:35:48.031 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 01:35:48.502 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 01:35:48.975 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 01:35:49.447 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 01:35:49.919 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 01:35:50.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:50.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:50.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:50.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:50.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:50.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:50.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:50.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:50.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:50.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:50.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:50.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:50.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:50.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:50.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:50.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:50.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:50.390 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 01:35:50.861 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 01:35:51.335 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 01:35:51.807 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 01:35:52.279 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 01:35:52.753 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 01:35:53.225 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 01:35:53.697 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 01:35:54.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:54.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:54.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:54.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:54.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:54.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:54.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:54.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:54.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:54.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:54.108 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:54.108 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:54.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:54.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:54.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:54.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:54.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:54.167 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 01:35:54.639 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 01:35:55.110 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 01:35:55.583 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 01:35:56.055 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 01:35:56.527 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 01:35:56.998 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 01:35:57.472 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 01:35:57.944 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 01:35:58.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:58.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:58.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:58.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:58.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:35:58.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:35:58.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:35:58.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:58.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:58.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:58.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:35:58.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:35:58.416 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 01:35:58.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:35:58.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:35:58.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:35:58.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:58.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:35:58.887 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 01:35:59.358 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 01:35:59.829 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 01:36:00.299 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 01:36:00.770 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 01:36:01.241 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 01:36:01.712 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 01:36:02.182 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-22 01:36:02.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:02.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:02.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:02.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:02.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:02.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:02.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:02.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:02.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:02.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:02.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:02.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:02.655 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-22 01:36:02.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:02.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:02.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:02.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:02.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:03.128 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-22 01:36:03.600 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-22 01:36:04.071 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-22 01:36:04.544 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-22 01:36:05.017 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-22 01:36:05.488 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-22 01:36:05.959 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-22 01:36:06.433 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-22 01:36:06.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:06.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:06.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:06.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:06.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:36:06.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:36:06.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:36:06.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:36:06.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:36:06.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:36:06.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:36:06.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:36:06.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:36:06.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:36:06.888 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:36:11.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:36:11.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:36:11.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:36:11.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:36:11.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:36:11.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:36:11.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:36:11.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:36:11.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:36:11.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:36:11.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:36:11.907 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:36:11.907 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:36:11.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:36:11.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:36:11.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:36:11.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:36:11.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:36:11.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:36:11.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:36:11.910 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:36:11.910 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:36:11.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:36:11.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:36:11.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:36:11.911 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:36:11.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:36:11.911 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:36:11.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:36:11.913 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:36:11.913 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:36:11.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:36:11.913 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:36:11.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:36:11.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:36:11.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:36:11.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:36:11.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:11.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:36:11.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:36:11.916 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:36:11.917 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:36:11.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:11.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:11.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:11.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:36:11.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:36:11.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:36:11.918 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:36:16.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:36:16.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:36:16.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:36:16.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:36:16.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:36:16.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:36:16.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:36:16.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:36:16.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:36:16.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:36:16.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:36:16.937 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:36:16.937 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:36:16.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:36:16.937 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:36:16.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:36:16.938 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:36:16.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:36:16.938 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:36:16.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:36:16.940 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:36:16.940 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:36:16.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:36:16.940 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:36:16.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:36:16.940 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:36:16.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:36:16.940 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:36:16.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:36:16.941 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:36:16.942 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:36:16.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:36:16.942 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:36:16.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:36:16.942 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:36:16.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:36:16.942 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:36:16.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:36:16.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:36:16.945 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:36:16.945 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:36:16.945 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:16.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:16.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:36:16.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:16.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:16.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:16.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:16.949 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:36:17.427 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:36:17.472 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:36:17.474 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:36:17.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:17.476 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:36:17.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:17.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:17.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:17.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:17.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:17.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:17.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:17.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:17.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:17.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:17.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:17.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:17.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:17.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:36:17.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:36:17.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:36:17.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:36:17.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:36:18.366 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:36:18.840 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:36:18.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:36:18.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:36:18.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:36:18.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:36:19.312 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:36:19.784 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:36:19.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:36:19.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:36:19.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:36:19.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:36:20.255 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:36:20.729 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:36:20.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:36:20.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:36:20.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:36:20.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:36:21.201 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:36:21.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:21.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:21.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:21.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:21.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:21.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:21.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:21.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:21.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:21.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:21.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:21.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:21.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:21.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:21.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:21.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:21.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:21.673 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:36:21.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:36:21.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:36:21.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:36:21.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:36:22.144 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:36:22.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:36:23.090 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:36:23.562 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:36:24.033 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:36:24.506 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:36:24.979 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:36:25.451 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:36:25.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:25.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:25.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:25.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:25.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:25.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:25.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:25.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:25.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:25.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:25.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:25.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:25.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:25.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:25.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:25.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:25.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:25.923 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:36:26.392 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:36:26.863 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:36:27.337 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:36:27.809 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:36:28.281 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:36:28.752 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:36:29.225 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:36:29.698 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:36:30.170 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:36:30.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:30.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:30.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:30.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:30.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:30.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:30.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:30.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:30.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:30.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:30.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:30.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:30.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:30.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:30.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:30.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:30.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:30.641 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:36:31.112 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:36:31.586 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:36:32.058 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:36:32.530 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:36:33.003 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:36:33.476 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:36:33.948 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:36:34.422 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:36:34.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:34.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:34.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:34.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:34.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:34.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:34.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:34.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:34.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:34.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:34.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:34.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:34.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:34.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:34.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:34.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:34.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:34.894 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:36:35.366 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:36:35.837 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:36:36.311 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:36:36.783 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:36:37.256 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:36:37.726 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:36:38.192 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:36:38.663 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:36:39.134 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:36:39.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:39.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:39.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:39.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:39.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:39.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:39.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:39.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:39.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:39.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:39.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:39.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:39.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:39.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:39.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:39.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:39.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:39.605 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:36:40.076 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:36:40.549 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:36:41.022 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:36:41.494 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:36:41.968 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:36:42.449 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:36:42.921 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:36:43.394 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:36:43.867 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:36:44.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:44.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:44.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:44.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:44.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:44.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:44.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:44.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:44.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:44.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:44.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:44.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:44.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:44.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:44.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:44.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:44.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:44.339 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:36:44.813 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:36:45.286 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:36:45.758 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:36:46.229 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:36:46.702 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:36:47.175 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:36:47.647 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:36:48.121 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:36:48.593 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:36:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:48.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:48.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:48.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:48.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:48.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:48.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:48.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:48.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:48.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:48.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:48.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:49.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:49.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:49.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:49.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:49.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:49.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:49.065 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:36:49.536 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:36:50.007 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 01:36:50.478 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 01:36:50.949 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 01:36:51.419 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 01:36:51.890 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 01:36:52.364 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 01:36:52.836 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 01:36:53.308 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 01:36:53.781 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 01:36:53.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:53.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:53.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:53.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:53.825 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=7968 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:36:53.825 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=7968 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:36:53.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:53.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:53.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:53.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:53.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:53.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:53.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:53.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:53.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:53.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:53.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:53.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:53.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:54.254 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 01:36:54.726 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 01:36:55.200 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 01:36:55.672 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 01:36:56.144 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 01:36:56.615 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 01:36:57.089 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 01:36:57.561 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 01:36:58.034 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 01:36:58.504 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 01:36:58.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:58.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:58.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:58.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:58.703 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=9021 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:36:58.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:36:58.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:36:58.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:36:58.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:58.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:58.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:58.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:36:58.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:36:58.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:36:58.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:36:58.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:36:58.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:36:58.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:58.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:36:58.975 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 01:36:59.449 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 01:36:59.921 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 01:37:00.394 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 01:37:00.867 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 01:37:01.340 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 01:37:01.812 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 01:37:02.283 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 01:37:02.756 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 01:37:03.229 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 01:37:03.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:03.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:03.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:03.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:03.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:03.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:03.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:03.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:03.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:03.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:03.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:03.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:03.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:03.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:03.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:03.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:03.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:03.701 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 01:37:04.172 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 01:37:04.646 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 01:37:05.118 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 01:37:05.590 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 01:37:06.063 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 01:37:06.536 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 01:37:07.007 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 01:37:07.479 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 01:37:07.949 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 01:37:08.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:08.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:08.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:08.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:08.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:08.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:08.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:08.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:08.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:08.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:08.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:08.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:08.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:08.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:08.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:08.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:08.420 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 01:37:08.891 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 01:37:09.364 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 01:37:09.837 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 01:37:10.309 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 01:37:10.780 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 01:37:11.251 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 01:37:11.721 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 01:37:12.192 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 01:37:12.663 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 01:37:13.134 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 01:37:13.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:13.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:13.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:13.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:13.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:13.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:13.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:13.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:13.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:13.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:13.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:13.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:13.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:13.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:13.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:13.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:13.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:13.607 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 01:37:14.080 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 01:37:14.552 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 01:37:15.023 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 01:37:15.496 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 01:37:15.968 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 01:37:16.440 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 01:37:16.911 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 01:37:17.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:17.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:17.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:17.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:17.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:17.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:17.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:17.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:17.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:17.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:17.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:17.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:17.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:17.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:17.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:17.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:17.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:17.384 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 01:37:17.857 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 01:37:18.329 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 01:37:18.803 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 01:37:19.275 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 01:37:19.747 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 01:37:20.218 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 01:37:20.692 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 01:37:21.164 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 01:37:21.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:21.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:21.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:21.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:21.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:21.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:21.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:21.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:21.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:21.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:21.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:21.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:21.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:21.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:21.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:21.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:21.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:21.635 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 01:37:22.107 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 01:37:22.580 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 01:37:23.052 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 01:37:23.522 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 01:37:23.990 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 01:37:24.461 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 01:37:24.934 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 01:37:25.407 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 01:37:25.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:25.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:25.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:25.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:25.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:25.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:25.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:25.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:25.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:25.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:25.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:25.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:25.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:25.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:25.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:25.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:25.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:25.879 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 01:37:26.350 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 01:37:26.823 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 01:37:27.296 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 01:37:27.768 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 01:37:28.240 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 01:37:28.713 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 01:37:29.185 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 01:37:29.656 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 01:37:30.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:30.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:30.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:30.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:30.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:30.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:30.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:30.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:30.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:30.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:30.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:30.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:30.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:30.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:30.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:30.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:30.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:30.129 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 01:37:30.602 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 01:37:31.074 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 01:37:31.545 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 01:37:32.018 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 01:37:32.491 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 01:37:32.963 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 01:37:33.434 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 01:37:33.907 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 01:37:34.380 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 01:37:34.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:34.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:34.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:34.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:34.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:34.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:34.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:34.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:34.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:34.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:34.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:34.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:34.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:34.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:34.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:34.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:34.851 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 01:37:35.323 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 01:37:35.796 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 01:37:36.268 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 01:37:36.740 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 01:37:37.211 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 01:37:37.685 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 01:37:38.157 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-22 01:37:38.629 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-22 01:37:38.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:38.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:38.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:38.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:38.735 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=17671 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:38.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:38.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:38.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:38.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:38.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:38.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:38.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:38.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:38.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:38.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:38.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:38.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:38.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:39.100 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-22 01:37:39.571 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-22 01:37:40.042 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-22 01:37:40.512 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-22 01:37:40.983 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-22 01:37:41.454 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-22 01:37:41.925 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-22 01:37:42.398 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-22 01:37:42.871 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-22 01:37:42.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:43.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:43.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:43.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:43.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:43.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:43.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:43.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:43.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:43.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:43.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:43.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:43.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:43.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:43.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:43.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:43.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:43.342 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-22 01:37:43.814 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-22 01:37:44.287 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-22 01:37:44.759 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-22 01:37:45.231 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-22 01:37:45.702 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-22 01:37:46.176 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-22 01:37:46.648 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-22 01:37:47.120 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-22 01:37:47.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:47.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:47.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:47.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:47.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:37:47.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:37:47.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:37:47.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:37:47.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:37:47.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:37:47.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:37:47.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:37:47.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:37:47.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:37:47.282 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:37:47.283 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19518 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.283 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19518 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.283 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19518 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.283 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19518 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.283 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19518 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.283 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19519 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.283 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19519 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.283 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19519 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.283 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19519 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.284 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19519 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.284 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19519 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.284 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19519 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:47.284 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=19519 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:37:52.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:37:52.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:37:52.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:37:52.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:37:52.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:37:52.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:37:52.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:37:52.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:37:52.294 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:37:52.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:37:52.295 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:37:52.296 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:37:52.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:37:52.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:37:52.297 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:37:52.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:37:52.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:37:52.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:37:52.298 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:37:52.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:37:52.299 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:37:52.299 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:37:52.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:37:52.299 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:37:52.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:37:52.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:37:52.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:37:52.299 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:37:52.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:37:52.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:37:52.301 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:37:52.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:37:52.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:37:52.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:37:52.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:37:52.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:37:52.301 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:37:52.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:37:52.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:37:52.304 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:37:52.304 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:37:52.304 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:52.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:37:52.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:37:52.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:37:52.305 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:37:57.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:37:57.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:37:57.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:37:57.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:37:57.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:37:57.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:37:57.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:37:57.323 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:37:57.323 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:37:57.323 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:37:57.323 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:37:57.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:37:57.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:37:57.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:37:57.326 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:37:57.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:37:57.327 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:37:57.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:37:57.327 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:37:57.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:37:57.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:37:57.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:37:57.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:37:57.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:37:57.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:37:57.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:37:57.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:37:57.329 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:37:57.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:37:57.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:37:57.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:37:57.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:37:57.330 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:37:57.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:37:57.330 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:37:57.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:37:57.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:37:57.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:37:57.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:37:57.333 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:37:57.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:57.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:37:57.338 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:37:57.816 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:37:57.858 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:37:57.860 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:37:57.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:57.863 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:37:57.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:57.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:57.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:57.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:57.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:57.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:57.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:57.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:57.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:57.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:57.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:57.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:57.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:58.288 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:37:58.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:37:58.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:37:58.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:37:58.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:37:58.759 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:37:58.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:58.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:58.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:58.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:58.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:37:58.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:37:58.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:37:58.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:58.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:58.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:58.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:37:58.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:37:59.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:37:59.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:37:59.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:37:59.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:59.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:37:59.232 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:37:59.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:37:59.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:37:59.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:37:59.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:37:59.706 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:38:00.178 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:38:00.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:00.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:00.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:00.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:00.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:00.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:00.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:00.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:00.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:00.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:00.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:00.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:00.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:00.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:00.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:00.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:00.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:00.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:00.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:00.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:00.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:00.650 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:38:01.123 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:38:01.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:01.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:01.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:01.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:01.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:01.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:01.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:01.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:01.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:01.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:01.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:01.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:01.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:01.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:01.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:01.595 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:38:01.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:01.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:01.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:01.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:01.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:02.066 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:38:02.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:02.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:02.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:02.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:02.540 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:38:02.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:02.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:02.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:02.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:03.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:03.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:03.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:03.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:03.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:03.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:03.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:03.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:03.012 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:38:03.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:03.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:03.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:03.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:03.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:03.485 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:38:03.958 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:38:04.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:04.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:04.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:04.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:04.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:04.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:04.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:04.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:04.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:04.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:04.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:04.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:04.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:04.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:04.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:04.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:04.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:04.431 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:38:04.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:38:05.374 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:38:05.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:05.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:05.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:05.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:05.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:05.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:05.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:05.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:05.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:05.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:05.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:05.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:05.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:05.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:05.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:05.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:05.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:05.847 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:38:06.320 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:38:06.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:06.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:06.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:06.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:06.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:06.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:06.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:06.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:06.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:06.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:06.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:06.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:06.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:06.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:06.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:06.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:06.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:06.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:06.792 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:38:07.266 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:38:07.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:07.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:07.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:07.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:07.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:07.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:07.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:07.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:07.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:07.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:07.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:07.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:07.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:07.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:07.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:07.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:07.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:07.738 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:38:08.210 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:38:08.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:08.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:08.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:08.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:08.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:08.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:08.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:08.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:08.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:08.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:08.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:08.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:08.680 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:38:08.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:08.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:08.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:08.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:08.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:08.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:09.147 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:38:09.621 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:38:10.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:10.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:10.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:10.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:10.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:10.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:10.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:10.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:10.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:10.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:10.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:10.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:10.093 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:38:10.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:10.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:10.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:10.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:10.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:10.560 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:38:10.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:10.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:10.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:10.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:11.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:11.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:11.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:11.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:11.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:11.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:11.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:11.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:11.031 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:38:11.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:11.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:11.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:11.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:11.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:11.502 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:38:11.973 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:38:12.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:12.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:12.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:12.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:12.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:12.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:12.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:12.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:12.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:12.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:12.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:12.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:12.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:12.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:12.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:12.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:12.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:12.446 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:38:12.918 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:38:13.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:13.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:13.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:13.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:13.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:13.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:13.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:13.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:13.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:13.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:13.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:13.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:13.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:13.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:13.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:13.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:13.390 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:38:13.861 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:38:14.334 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:38:14.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:14.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:14.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:14.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:14.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:14.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:14.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:14.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:14.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:14.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:14.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:14.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:14.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:14.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:14.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:14.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:14.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:14.807 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:38:15.278 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:38:15.749 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:38:15.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:15.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:15.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:15.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:15.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:15.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:15.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:15.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:15.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:15.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:15.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:15.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:16.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:16.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:16.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:16.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:16.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:16.223 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:38:16.695 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:38:17.167 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:38:17.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:17.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:17.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:17.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:17.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:17.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:17.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:17.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:17.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:17.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:17.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:17.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:17.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:17.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:17.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:17.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:17.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:17.640 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:38:18.113 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:38:18.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:18.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:18.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:18.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:18.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:18.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:18.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:18.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:18.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:18.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:18.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:18.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:18.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:18.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:18.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:18.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:18.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:18.584 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:38:19.056 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:38:19.530 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:38:19.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:19.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:19.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:19.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:19.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:19.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:19.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:19.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:19.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:19.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:19.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:19.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:20.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:20.001 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:38:20.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:20.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:20.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:20.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:20.473 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:38:20.944 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:38:21.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:21.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:21.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:21.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:21.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:21.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:21.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:21.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:21.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:21.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:21.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:21.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:21.415 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:38:21.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:21.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:21.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:21.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:21.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:21.886 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:38:22.357 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:38:22.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:22.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:22.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:22.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:22.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:22.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:22.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:22.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:22.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:38:22.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:38:22.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:38:22.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:38:22.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:38:22.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:38:22.822 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:38:22.822 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5508 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:22.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5508 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:22.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5508 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:22.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5508 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:22.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5508 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:27.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:38:27.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:38:27.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:38:27.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:38:27.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:38:27.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:38:27.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:38:27.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:38:27.834 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:38:27.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:38:27.835 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:38:27.837 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:38:27.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:38:27.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:38:27.837 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:38:27.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:38:27.838 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:38:27.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:38:27.838 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:38:27.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:27.839 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:38:27.839 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:38:27.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:38:27.839 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:38:27.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:38:27.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:38:27.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:38:27.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:38:27.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:27.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:38:27.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:38:27.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:38:27.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:38:27.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:38:27.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:38:27.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:38:27.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:38:27.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:27.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:38:27.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:38:27.844 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:38:27.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:27.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:27.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:38:27.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:38:28.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:38:28.366 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:38:28.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:28.369 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:38:28.372 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:38:28.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:28.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:28.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:28.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:28.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:28.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:28.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:28.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:28.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:38:28.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:28.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:28.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:28.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:28.799 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:38:28.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:28.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:28.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:28.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:29.273 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:38:29.745 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:38:29.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:29.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:29.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:29.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:30.218 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:38:30.689 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:38:30.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:30.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:30.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:30.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:31.162 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:38:31.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:31.635 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:38:31.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:31.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:31.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:31.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:32.107 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:38:32.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:32.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:32.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:32.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:32.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:32.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:32.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:32.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:32.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:32.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:32.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:38:32.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:32.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:32.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:32.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:32.578 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:38:32.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:32.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:32.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:32.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:33.051 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:38:33.524 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:38:33.996 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:38:34.470 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:38:34.942 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:38:35.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:35.415 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:38:35.885 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:38:36.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:36.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:36.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:36.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:36.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:36.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:36.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:36.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:36.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:36.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:36.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:36.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:36.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:38:36.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:36.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:36.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:36.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:36.359 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:38:36.831 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:38:37.303 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:38:37.774 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:38:38.248 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:38:38.721 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:38:39.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:39.193 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:38:39.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:39.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:39.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:39.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:39.645 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=2548 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:39.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:39.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:39.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:39.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:39.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:39.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:39.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:38:39.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:39.664 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:38:39.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:39.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:39.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:40.137 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:38:40.609 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:38:41.082 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:38:41.555 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:38:42.028 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:38:42.500 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:38:42.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:42.973 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:38:43.446 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:38:43.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:43.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:43.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:43.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:43.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:43.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:43.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:43.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:43.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:43.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:43.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:43.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:38:43.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:43.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:43.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:43.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:43.918 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:38:44.389 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:38:44.863 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:38:45.335 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:38:45.807 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:38:46.278 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:38:46.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:46.751 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:38:47.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:47.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:47.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:47.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:47.187 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=4177 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:47.188 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=4177 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:47.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:47.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:47.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:47.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:47.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:47.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:47.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:38:47.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:47.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:47.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:47.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:47.224 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:38:47.696 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:38:48.166 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:38:48.637 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:38:49.110 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:38:49.583 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:38:50.055 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:38:50.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:50.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:50.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:50.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:50.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:50.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:50.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:50.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:50.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:50.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:50.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:50.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:50.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:50.525 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:38:50.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:38:50.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:50.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:50.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:50.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:50.999 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:38:51.471 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:38:51.943 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:38:52.414 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:38:52.888 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:38:53.360 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:38:53.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:53.831 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:38:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:54.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:54.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:54.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:54.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:38:54.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:54.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:54.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:54.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:38:54.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:38:54.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:38:54.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:38:54.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:38:54.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:54.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:54.303 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:38:54.776 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:38:55.248 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:38:55.720 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:38:56.191 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:38:56.665 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:38:57.137 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:38:57.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:57.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:38:57.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:38:57.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:38:57.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:38:57.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:38:57.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:38:57.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:38:57.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:38:57.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:38:57.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:38:57.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:38:57.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:38:57.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:38:57.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:38:57.542 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:38:57.542 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6413 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:57.543 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:57.543 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:57.543 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:57.543 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:57.543 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:38:57.543 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:39:02.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:39:02.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:39:02.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:39:02.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:39:02.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:39:02.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:39:02.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:39:02.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:39:02.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:39:02.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:39:02.555 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:39:02.557 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:39:02.557 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:39:02.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:39:02.558 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:39:02.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:39:02.558 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:39:02.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:39:02.558 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:39:02.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:02.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:39:02.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:39:02.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:39:02.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:39:02.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:39:02.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:39:02.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:39:02.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:39:02.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:02.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:39:02.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:39:02.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:39:02.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:39:02.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:39:02.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:39:02.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:39:02.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:39:02.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:02.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:39:02.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:39:02.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:39:02.565 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:02.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:02.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:39:03.046 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:39:03.086 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:39:03.088 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:39:03.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:03.089 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:39:03.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:03.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:03.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:03.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:03.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:03.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:03.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:03.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:03.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:03.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:03.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:03.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:03.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:03.519 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:39:03.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:03.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:03.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:03.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:03.990 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:39:04.463 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:39:04.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:04.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:04.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:04.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:04.936 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:39:05.408 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:39:05.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:05.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:05.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:05.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:05.882 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:39:06.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:06.354 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:39:06.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:06.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:06.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:06.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:06.827 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:39:06.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:06.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:06.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:06.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:06.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:06.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:06.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:06.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:06.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:06.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:06.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:06.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:06.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:06.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:06.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:07.300 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:39:07.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:07.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:07.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:07.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:07.773 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:39:08.245 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:39:08.716 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:39:09.190 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:39:09.662 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:39:09.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:10.135 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:39:10.608 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:39:10.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:10.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:10.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:10.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:10.753 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1768 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:39:10.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:10.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:10.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:10.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:10.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:10.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:10.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:10.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:10.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:10.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:10.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:11.081 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:39:11.553 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:39:12.027 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:39:12.499 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:39:12.972 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:39:13.445 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:39:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:13.918 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:39:14.390 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:39:14.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:14.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:14.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:14.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:14.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:14.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:14.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:14.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:14.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:14.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:14.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:14.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:14.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:14.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:14.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:14.864 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:39:15.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:15.336 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:39:15.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:15.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:15.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:15.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:15.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:15.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:15.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:15.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:15.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:15.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:15.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:15.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:15.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:15.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:15.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:15.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:15.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:15.808 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:39:16.282 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:39:16.754 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:39:17.226 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:39:17.697 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:39:18.170 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:39:18.642 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:39:18.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:19.115 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:39:19.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:19.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:19.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:19.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:19.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:19.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:19.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:19.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:19.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:19.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:19.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:19.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:19.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:19.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:19.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:19.585 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:39:20.056 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:39:20.527 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:39:20.998 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:39:21.471 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:39:21.944 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:39:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:22.416 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:39:22.887 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:39:23.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:23.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:23.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:23.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:23.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:23.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:23.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:23.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:23.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:23.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:23.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:23.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:23.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:23.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:23.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:23.359 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:39:23.832 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:39:24.304 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:39:24.775 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:39:25.246 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:39:25.717 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:39:26.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:26.187 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:39:26.658 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:39:26.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:26.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:26.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:26.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:26.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:26.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:26.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:26.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:26.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:26.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:26.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:26.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:26.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:26.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:26.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:27.132 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:39:27.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:27.604 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:39:27.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:27.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:27.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:27.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:27.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:27.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:27.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:27.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:27.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:27.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:27.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:27.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:27.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:27.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:27.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:27.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:28.076 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:39:28.547 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:39:29.020 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:39:29.493 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:39:29.965 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:39:30.436 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:39:30.909 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:39:31.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:31.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:31.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:31.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:31.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:31.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:31.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:31.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:31.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:31.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:31.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:31.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:31.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:31.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:31.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:31.382 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:39:31.854 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:39:32.325 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:39:32.798 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:39:33.270 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:39:33.742 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:39:34.213 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:39:34.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:34.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:34.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:34.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:34.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:34.652 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=6931 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:39:34.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:34.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:34.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:34.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:34.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:34.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:34.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:34.684 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:39:34.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:34.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:34.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:34.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:35.157 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:39:35.630 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 01:39:36.102 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 01:39:36.573 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 01:39:37.043 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 01:39:37.517 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 01:39:37.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:37.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:37.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:37.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:37.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:37.953 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=7645 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:39:37.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:37.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:37.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:37.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:37.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:37.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:37.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:37.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:37.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:37.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:37.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:37.989 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 01:39:38.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:38.461 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 01:39:38.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:38.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:38.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:38.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:38.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:38.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:38.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:38.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:38.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:38.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:38.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:38.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:38.932 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 01:39:38.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:38.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:38.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:38.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:38.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:39.403 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 01:39:39.876 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 01:39:40.349 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 01:39:40.821 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 01:39:41.292 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 01:39:41.765 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 01:39:42.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:42.237 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 01:39:42.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:42.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:42.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:42.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:42.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:42.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:42.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:42.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:42.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:42.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:42.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:42.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:42.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:42.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:42.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:42.710 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 01:39:43.183 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 01:39:43.655 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 01:39:44.127 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 01:39:44.598 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 01:39:45.071 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 01:39:45.544 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 01:39:45.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:45.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:45.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:45.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:45.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:45.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:45.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:45.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:45.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:45.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:45.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:45.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:45.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:45.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:45.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:46.016 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 01:39:46.487 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 01:39:46.960 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 01:39:47.432 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 01:39:47.904 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 01:39:48.375 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 01:39:48.846 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 01:39:48.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:49.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:49.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:49.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:49.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:49.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:49.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:49.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:49.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:49.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:49.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:49.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:39:49.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:49.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:49.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:49.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:49.320 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 01:39:49.792 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 01:39:49.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:50.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:50.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:50.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:50.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:50.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:50.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:50.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:50.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:50.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:39:50.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:39:50.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:39:50.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:39:50.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:39:50.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:39:50.194 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:39:50.194 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:39:50.194 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:39:50.194 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:39:50.194 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:39:55.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:39:55.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:39:55.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:39:55.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:39:55.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:39:55.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:39:55.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:39:55.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:39:55.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:39:55.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:39:55.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:39:55.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:39:55.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:39:55.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:39:55.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:39:55.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:39:55.214 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:39:55.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:39:55.215 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:39:55.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:55.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:39:55.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:39:55.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:39:55.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:39:55.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:39:55.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:39:55.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:39:55.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:39:55.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:55.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:39:55.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:39:55.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:39:55.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:39:55.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:39:55.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:39:55.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:39:55.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:39:55.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:55.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:39:55.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:39:55.221 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:39:55.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:55.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:55.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:39:55.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:39:55.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:55.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:39:55.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:55.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:55.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:55.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:39:55.226 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:39:55.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:39:55.746 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:39:55.748 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:39:55.749 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:39:55.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:39:55.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:39:55.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:39:55.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:39:55.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:39:55.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:39:55.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:39:55.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:39:55.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:39:56.177 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:39:56.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:56.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:56.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:56.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:56.648 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:39:57.118 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:39:57.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:57.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:57.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:57.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:57.588 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:39:58.059 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:39:58.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:58.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:58.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:58.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:58.531 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:39:58.997 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:39:59.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:39:59.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:39:59.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:39:59.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:39:59.466 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:39:59.932 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:40:00.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:00.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:00.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:00.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:00.397 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:40:00.863 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:40:01.329 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:40:01.798 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:40:02.264 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:40:02.730 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:40:03.196 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:40:03.661 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:40:04.127 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:40:04.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:04.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:04.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:04.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:04.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:04.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:04.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:04.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:04.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:04.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:04.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:40:04.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:40:04.479 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2016 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:04.479 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:09.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:40:09.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:40:09.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:09.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:09.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:09.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:09.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:09.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:40:09.492 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:09.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:40:09.493 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:40:09.495 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:40:09.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:40:09.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:40:09.496 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:09.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:09.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:40:09.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:40:09.497 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:40:09.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:09.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:40:09.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:40:09.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:40:09.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:09.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:09.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:40:09.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:40:09.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:40:09.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:09.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:40:09.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:40:09.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:40:09.502 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:09.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:09.502 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:40:09.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:40:09.502 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:40:09.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:09.505 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:40:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:40:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:40:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:40:09.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:40:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:40:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:40:09.506 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:40:09.506 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:40:09.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:40:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:09.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:09.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:09.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:09.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:09.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:09.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:09.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:09.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:40:09.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:40:10.039 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:10.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:10.040 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:40:10.041 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:40:10.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:10.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:10.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:10.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:10.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:10.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:10.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:10.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:10.455 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:40:10.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:10.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:10.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:10.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:10.921 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:40:11.386 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:40:11.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:11.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:11.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:11.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:11.851 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:40:12.316 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:40:12.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:12.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:12.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:12.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:12.788 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:40:13.261 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:40:13.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:13.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:13.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:13.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:13.733 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:40:14.198 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:40:14.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:14.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:14.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:14.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:14.663 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:40:15.133 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:40:15.601 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:40:16.067 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:40:16.531 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:40:17.001 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:40:17.468 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:40:17.934 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:40:18.400 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:40:18.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:18.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:18.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:18.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:18.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:18.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:18.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:18.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:18.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:18.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:18.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:40:18.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:40:18.756 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:40:18.756 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2016 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.756 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2016 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.756 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2016 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.756 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2016 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.756 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2016 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2016 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:18.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:23.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:40:23.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:40:23.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:23.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:23.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:23.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:23.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:23.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:40:23.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:23.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:40:23.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:40:23.768 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:40:23.768 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:40:23.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:40:23.769 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:23.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:23.769 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:40:23.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:40:23.769 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:40:23.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:23.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:40:23.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:40:23.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:40:23.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:23.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:23.771 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:40:23.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:40:23.771 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:40:23.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:23.772 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:40:23.772 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:40:23.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:40:23.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:23.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:23.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:40:23.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:40:23.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:40:23.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:23.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:40:23.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:40:23.776 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:40:23.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:23.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:23.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:23.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:23.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:23.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:23.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:23.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:23.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:23.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:23.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:40:24.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:40:24.301 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:24.303 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:40:24.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:24.305 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:40:24.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:24.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:24.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:24.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:40:24.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:24.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:24.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:24.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:25.204 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:40:25.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:25.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:25.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:25.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:25.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:25.677 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:40:25.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:25.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:25.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:25.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:26.148 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:40:26.620 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:40:26.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:26.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:26.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:26.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:27.094 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:40:27.566 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:40:27.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:27.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:27.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:27.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:28.038 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:40:28.509 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:40:28.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:28.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:28.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:28.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:28.975 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:40:29.441 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:40:29.906 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:40:30.372 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:40:30.838 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:40:31.304 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:40:31.769 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:40:32.237 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:40:32.708 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:40:33.174 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:40:33.640 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:40:34.106 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:40:34.578 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:40:35.049 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:40:35.522 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:40:35.994 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:40:36.466 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:40:36.937 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:40:37.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:37.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:37.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:37.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:37.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:37.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:37.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:37.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:37.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:37.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:37.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:40:37.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:40:37.080 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:40:37.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2889 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:37.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2889 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:37.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2889 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:37.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2889 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:37.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2889 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:37.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2889 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:37.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2889 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:37.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2889 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:42.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:40:42.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:40:42.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:42.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:42.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:42.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:42.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:42.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:40:42.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:42.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:40:42.096 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:40:42.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:40:42.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:40:42.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:40:42.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:42.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:42.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:40:42.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:40:42.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:40:42.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:42.100 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:40:42.100 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:40:42.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:40:42.100 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:42.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:42.101 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:40:42.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:40:42.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:40:42.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:42.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:40:42.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:40:42.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:40:42.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:42.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:42.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:40:42.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:40:42.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:40:42.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:42.105 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:40:42.105 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:40:42.105 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:40:42.105 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:42.110 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:40:42.588 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:40:42.632 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:42.633 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:40:42.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:42.634 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:40:42.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:42.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:42.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:42.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:42.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:42.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:42.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:42.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:43.060 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:40:43.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:43.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:43.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:43.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:43.532 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:40:43.678 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:44.005 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:40:44.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:44.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:44.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:44.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:44.204 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:44.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:40:44.725 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:44.949 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:40:45.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:45.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:45.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:45.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:45.420 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:40:45.894 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:40:46.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:46.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:46.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:46.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:46.366 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:40:46.741 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:46.838 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:40:47.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:47.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:47.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:47.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:47.274 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:47.312 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:40:47.784 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:40:47.797 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:48.256 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:40:48.314 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:48.727 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:40:49.198 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:40:49.671 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:40:50.143 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:40:50.320 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:50.615 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:40:51.086 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:40:51.559 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:40:52.031 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:40:52.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:52.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:52.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:52.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:52.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:52.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:52.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:52.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:52.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:52.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:52.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:40:52.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:40:52.371 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:40:52.371 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:52.371 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:52.371 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:52.371 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:52.371 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:52.371 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:52.371 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:57.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:40:57.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:40:57.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:57.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:57.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:57.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:57.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:40:57.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:40:57.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:57.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:40:57.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:40:57.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:40:57.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:40:57.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:40:57.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:57.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:40:57.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:40:57.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:40:57.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:40:57.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:57.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:40:57.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:40:57.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:40:57.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:57.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:40:57.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:40:57.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:40:57.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:40:57.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:57.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:40:57.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:40:57.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:40:57.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:40:57.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:40:57.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:40:57.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:40:57.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:40:57.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:57.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:40:57.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:40:57.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:40:57.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:40:57.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:40:57.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:40:57.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:40:57.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:40:57.401 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:40:57.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:40:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:57.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:57.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:40:57.885 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:40:57.925 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:40:57.926 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:40:57.928 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:40:57.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:57.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:57.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:57.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:57.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:57.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:57.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:57.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:57.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:57.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:57.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:57.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:57.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:57.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:58.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:58.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:58.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:58.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:58.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:58.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:58.357 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:40:58.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:58.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:58.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:58.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:58.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:58.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:58.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:58.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:58.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:58.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.828 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:40:58.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:58.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:58.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:58.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:58.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:58.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:58.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:58.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:58.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:58.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:58.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:58.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:58.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:58.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.981 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=341 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:58.981 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=341 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:58.981 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=341 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:40:58.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:58.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:58.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:58.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:58.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:58.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:58.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:58.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:59.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:59.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:59.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:59.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:59.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:59.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:59.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:59.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:59.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:59.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:40:59.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:59.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:59.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:59.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:59.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:59.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:59.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:59.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:59.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:59.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:59.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:59.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:59.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:59.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.294 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:40:59.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:59.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:59.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:59.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:40:59.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:40:59.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:40:59.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:40:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:59.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:59.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:59.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:59.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:59.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.762 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:40:59.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:40:59.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:40:59.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:40:59.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:40:59.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:40:59.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:40:59.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:40:59.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:40:59.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:40:59.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:40:59.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:00.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:00.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:00.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:00.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:41:00.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:00.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:00.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:41:00.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:41:00.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:41:00.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:00.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:00.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:00.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:00.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:00.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:00.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:41:00.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:00.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:00.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:41:00.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:41:00.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:41:00.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:00.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:00.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.229 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:41:00.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:00.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:00.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:00.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:00.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:41:00.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:00.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:00.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:00.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:00.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:41:00.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:41:00.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:00.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:00.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:41:00.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:00.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:00.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:00.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:00.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:00.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:00.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:41:00.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:00.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:00.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:41:00.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:41:00.697 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:41:00.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:41:00.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:00.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:00.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:00.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:00.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:00.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:00.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:00.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:00.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:00.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:00.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:00.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:00.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:00.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:00.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:00.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:00.906 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:41:00.906 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=761 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:00.906 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=761 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:00.906 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:00.906 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:00.906 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:00.906 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:00.906 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:00.906 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:05.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:05.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:05.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:05.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:05.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:05.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:05.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:05.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:05.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:05.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:05.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:41:05.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:41:05.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:41:05.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:05.917 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:05.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:05.917 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:41:05.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:05.917 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:41:05.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:05.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:41:05.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:41:05.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:05.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:05.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:05.919 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:41:05.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:05.919 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:41:05.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:05.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:41:05.921 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:41:05.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:05.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:05.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:05.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:41:05.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:05.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:41:05.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:41:05.924 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:41:05.924 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:41:05.924 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:41:05.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:05.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:05.929 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:41:06.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:41:06.450 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:41:06.452 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:41:06.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:06.454 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:41:06.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:06.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:06.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:41:06.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:06.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:06.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:06.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:41:06.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:41:06.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 01:41:06.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:06.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:06.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:06.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:06.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:06.875 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:41:06.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:06.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:06.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:06.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:07.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:41:07.820 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:41:07.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:07.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:07.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:07.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:08.292 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:41:08.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:08.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:08.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:08.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:08.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:08.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:08.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:08.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:08.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:08.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:08.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:08.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:08.573 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:41:08.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=572 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:08.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:08.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:08.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:08.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:08.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:08.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:08.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:13.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:13.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:13.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:13.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:13.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:13.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:13.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:13.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:13.591 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:13.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:13.592 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:41:13.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:41:13.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:41:13.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:13.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:13.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:13.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:41:13.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:13.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:41:13.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:13.599 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:41:13.599 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:41:13.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:13.599 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:13.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:13.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:41:13.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:13.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:41:13.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:13.602 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:41:13.602 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:41:13.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:13.602 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:13.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:13.603 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:41:13.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:13.603 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:41:13.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:13.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:41:13.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:41:13.606 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:41:13.607 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:41:13.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:13.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:13.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:13.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:13.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:13.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:13.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:13.609 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:41:18.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:18.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:18.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:18.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:18.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:18.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:18.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:18.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:18.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:18.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:18.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:41:18.627 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:41:18.628 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:41:18.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:18.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:18.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:18.629 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:41:18.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:18.629 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:41:18.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:18.630 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:41:18.631 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:41:18.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:18.631 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:18.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:18.631 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:41:18.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:18.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:41:18.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:18.633 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:41:18.633 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:41:18.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:18.633 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:18.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:18.633 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:41:18.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:18.633 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:41:18.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:41:18.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:41:18.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:41:18.637 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:41:18.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:18.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:18.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:18.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:41:19.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:41:19.166 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:41:19.167 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:41:19.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:19.170 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:41:19.591 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:41:19.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:19.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:19.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:19.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:20.065 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:41:20.538 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:41:20.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:20.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:20.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:20.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:21.013 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:41:21.485 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:41:21.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:21.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:21.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:21.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:21.956 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:41:22.430 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:41:22.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:22.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:22.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:22.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:22.902 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:41:23.374 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:41:23.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:23.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:23.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:23.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:23.845 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:41:24.318 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:41:24.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:24.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:24.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:24.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:24.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:24.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:24.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:24.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:24.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:24.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:24.661 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:41:24.661 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1300 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:24.661 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1300 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:24.661 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1300 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:24.661 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1300 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:24.661 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1300 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:24.661 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1300 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:24.661 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1300 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:41:29.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:29.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:29.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:29.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:29.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:29.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:29.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:29.671 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:29.671 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:29.671 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:29.671 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:41:29.672 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:41:29.672 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:41:29.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:29.672 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:29.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:29.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:41:29.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:29.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:41:29.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:29.675 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:41:29.676 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:41:29.676 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:29.676 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:29.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:29.676 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:41:29.676 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:29.676 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:41:29.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:29.678 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:41:29.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:41:29.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:29.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:29.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:29.679 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:41:29.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:29.679 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:41:29.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:41:29.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:41:29.683 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:41:29.683 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:29.688 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:41:30.166 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:41:30.209 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:41:30.210 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:41:30.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:30.211 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:41:30.630 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:41:30.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:30.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:30.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:30.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:31.094 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:41:31.557 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:41:31.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:31.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:31.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:31.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:32.020 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:41:32.484 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:41:32.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:32.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:32.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:32.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:32.947 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:41:33.410 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:41:33.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:33.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:33.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:33.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:33.874 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:41:34.337 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:41:34.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:34.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:34.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:34.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:34.800 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:41:35.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:35.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:35.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:35.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:35.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:35.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:35.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:35.224 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:41:40.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:40.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:40.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:40.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:40.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:40.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:40.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:40.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:40.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:40.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:40.241 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:41:40.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:41:40.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:41:40.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:40.245 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:40.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:40.245 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:41:40.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:40.245 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:41:40.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:40.246 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:41:40.246 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:41:40.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:40.247 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:40.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:40.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:41:40.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:40.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:41:40.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:40.248 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:41:40.248 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:41:40.248 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:40.248 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:40.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:40.249 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:41:40.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:40.249 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:41:40.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:41:40.251 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:41:40.251 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:41:40.251 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:40.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:40.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:40.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:40.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:40.253 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:41:45.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:41:45.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:41:45.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:45.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:45.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:45.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:45.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:41:45.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:45.268 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:45.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:41:45.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:41:45.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:41:45.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:41:45.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:45.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:45.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:41:45.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:41:45.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:41:45.273 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:41:45.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:45.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:41:45.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:41:45.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:45.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:45.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:41:45.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:41:45.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:41:45.274 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:41:45.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:45.276 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:41:45.276 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:41:45.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:45.276 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:41:45.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:41:45.277 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:41:45.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:41:45.277 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:41:45.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:45.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:41:45.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:41:45.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:41:45.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:41:45.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:41:45.280 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:41:45.280 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:41:45.280 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:45.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:41:45.285 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:41:45.764 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:41:45.801 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:41:45.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:41:45.804 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:41:45.805 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:41:45.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:41:45.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:41:45.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:41:46.228 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:41:46.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:46.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:46.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:46.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:46.691 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:41:46.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:41:46.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:41:46.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:41:46.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:41:46.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:41:47.157 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:41:47.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:47.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:47.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:47.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:47.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:41:48.087 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:41:48.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:48.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:48.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:48.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:48.553 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:41:49.019 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:41:49.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:49.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:49.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:49.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:49.489 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:41:49.958 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:41:50.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:41:50.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:41:50.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:41:50.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:41:50.424 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:41:50.893 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:41:51.364 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:41:51.833 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:41:52.299 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:41:52.765 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:41:53.231 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:41:53.699 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:41:54.170 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:41:54.636 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:41:55.102 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:41:55.567 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:41:56.039 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:41:56.510 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:41:56.983 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:41:57.456 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:41:57.928 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:41:58.399 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:41:58.872 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:41:59.345 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:41:59.816 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:42:00.287 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:42:00.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:00.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:00.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:00.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:00.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:00.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:00.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:00.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:00.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:00.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:00.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:42:00.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:42:00.493 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:42:00.493 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3310 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:00.493 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:00.493 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:00.493 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:00.493 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:00.493 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:00.493 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:00.494 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:05.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:42:05.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:42:05.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:05.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:05.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:05.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:05.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:05.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:42:05.509 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:05.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:42:05.510 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:42:05.512 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:42:05.513 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:42:05.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:42:05.513 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:05.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:05.514 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:42:05.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:42:05.515 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:42:05.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:05.516 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:42:05.516 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:42:05.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:42:05.516 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:05.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:05.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:42:05.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:42:05.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:42:05.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:05.519 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:42:05.519 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:42:05.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:42:05.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:05.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:05.519 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:42:05.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:42:05.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:42:05.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:05.522 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:42:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:42:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:05.523 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:42:05.523 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:42:05.523 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:42:05.524 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:05.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:05.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:05.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:05.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:05.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:05.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:05.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:05.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:05.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:05.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:05.528 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:42:06.007 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:42:06.052 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:42:06.055 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:42:06.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:06.057 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:42:06.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:06.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:06.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:42:06.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:06.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:06.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:06.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:42:06.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:42:06.097 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:42:06.101 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:42:06.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:06.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:06.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:06.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:06.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:06.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:42:06.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:06.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:06.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:06.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:06.945 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:42:07.419 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:42:07.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:07.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:07.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:07.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:07.891 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:42:08.363 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:42:08.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:08.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:08.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:08.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:08.834 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:42:09.308 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:42:09.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:09.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:09.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:09.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:09.780 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:42:10.253 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:42:10.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:10.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:10.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:10.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:10.726 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:42:11.199 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:42:11.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:42:12.142 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:42:12.615 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:42:13.088 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:42:13.561 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:42:14.034 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:42:14.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:14.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:14.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:14.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:14.124 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1858 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:14.124 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1858 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:14.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:14.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:14.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:14.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:14.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:14.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:14.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:14.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:14.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:42:14.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:42:14.135 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:42:14.135 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:14.135 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:14.135 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:14.135 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:14.135 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:14.135 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:14.135 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:14.135 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:19.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:42:19.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:42:19.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:19.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:19.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:19.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:19.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:19.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:42:19.151 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:19.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:42:19.151 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:42:19.155 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:42:19.155 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:42:19.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:42:19.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:19.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:19.156 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:42:19.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:42:19.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:42:19.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:19.159 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:42:19.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:42:19.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:42:19.159 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:19.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:19.159 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:42:19.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:42:19.159 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:42:19.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:19.161 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:42:19.162 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:42:19.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:42:19.162 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:19.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:19.162 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:42:19.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:42:19.162 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:42:19.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:19.165 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:42:19.166 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:42:19.166 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:42:19.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:19.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:19.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:19.171 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:42:19.646 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:42:19.691 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:42:19.693 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:42:19.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:19.695 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:42:19.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:19.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:19.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:42:19.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:19.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:19.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:19.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:42:19.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:42:19.738 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:42:19.742 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:42:19.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:19.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:19.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:19.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:19.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:20.119 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:42:20.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:20.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:20.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:20.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:20.590 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:42:21.063 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:42:21.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:21.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:21.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:21.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:21.536 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:42:22.008 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:42:22.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:22.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:22.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:22.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:22.481 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:42:22.954 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:42:23.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:23.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:23.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:23.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:23.425 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:42:23.897 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:42:24.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:24.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:24.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:24.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:24.371 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:42:24.843 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:42:25.315 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:42:25.789 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:42:26.262 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:42:26.734 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:42:27.207 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:42:27.680 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:42:27.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:27.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:27.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:27.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:27.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:27.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:27.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:27.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:27.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:27.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:27.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:27.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:27.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:42:27.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:42:27.769 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:42:27.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:27.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:27.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:27.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:27.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:27.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:27.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:42:32.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:42:32.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:42:32.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:32.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:32.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:32.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:32.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:32.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:42:32.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:32.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:42:32.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:42:32.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:42:32.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:42:32.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:42:32.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:32.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:32.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:42:32.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:42:32.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:42:32.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:32.789 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:42:32.789 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:42:32.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:42:32.789 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:32.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:32.789 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:42:32.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:42:32.790 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:42:32.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:32.791 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:42:32.791 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:42:32.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:42:32.791 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:32.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:32.792 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:42:32.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:42:32.792 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:42:32.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:42:32.795 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:42:32.795 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:42:32.795 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:32.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:32.799 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:42:33.279 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:42:33.326 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:42:33.328 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:42:33.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:33.331 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:42:33.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:33.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:33.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:42:33.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:33.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:33.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:33.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:42:33.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:42:33.370 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:42:33.371 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:42:33.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:33.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:33.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:33.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:33.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:33.746 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:42:33.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:33.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:33.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:33.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:34.217 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:42:34.691 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:42:34.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:34.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:34.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:34.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:35.164 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:42:35.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:42:35.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:35.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:35.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:35.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:36.109 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:42:36.582 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:42:36.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:36.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:36.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:36.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:37.054 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:42:37.528 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:42:37.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:37.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:37.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:37.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:38.000 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:42:38.472 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:42:38.946 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:42:39.419 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:42:39.891 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:42:40.362 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:42:40.835 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:42:41.308 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:42:41.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:41.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:41.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:41.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:41.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:41.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:41.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:42:41.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:41.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:41.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:41.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:42:41.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:42:41.446 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:42:41.449 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:42:41.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:41.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:41.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:41.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:41.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:41.780 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:42:42.251 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:42:42.724 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:42:43.197 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:42:43.669 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:42:44.140 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:42:44.613 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:42:45.086 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:42:45.558 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:42:46.029 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:42:46.501 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:42:46.974 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:42:47.447 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:42:47.920 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:42:48.393 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:42:48.865 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:42:49.339 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:42:49.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:49.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:49.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:49.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:49.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:49.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:49.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:49.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:49.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:49.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:49.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:49.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:49.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:42:49.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:42:49.481 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:42:54.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:42:54.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:42:54.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:54.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:54.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:54.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:54.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:42:54.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:42:54.491 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:54.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:42:54.491 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:42:54.493 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:42:54.493 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:42:54.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:42:54.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:54.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:42:54.494 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:42:54.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:42:54.494 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:42:54.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:54.496 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:42:54.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:42:54.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:42:54.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:54.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:42:54.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:42:54.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:42:54.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:42:54.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:54.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:42:54.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:42:54.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:42:54.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:42:54.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:42:54.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:42:54.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:42:54.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:42:54.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:54.502 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:42:54.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:42:54.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:42:54.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:42:54.502 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:42:54.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:42:54.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:42:54.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:42:54.503 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:42:54.503 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:42:54.503 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:54.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:54.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:42:54.508 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:42:54.986 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:42:55.027 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:42:55.028 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:42:55.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:55.030 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:42:55.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:42:55.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:42:55.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:42:55.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:55.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:55.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:55.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:42:55.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:42:55.078 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:42:55.082 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:42:55.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:42:55.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:42:55.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:42:55.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:55.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:42:55.454 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:42:55.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:55.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:55.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:55.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:55.925 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:42:56.398 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:42:56.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:56.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:56.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:56.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:56.871 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:42:57.343 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:42:57.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:57.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:57.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:57.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:57.814 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:42:58.287 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:42:58.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:58.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:58.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:58.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:58.760 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:42:59.232 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:42:59.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:42:59.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:42:59.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:42:59.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:42:59.706 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:43:00.178 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:43:00.651 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:43:01.124 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:43:01.597 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:43:02.069 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:43:02.540 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:43:03.011 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:43:03.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:03.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:03.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:03.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:03.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:03.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:03.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:43:03.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:03.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:03.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:03.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:43:03.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:43:03.146 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:43:03.150 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:43:03.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:03.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:03.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:03.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:03.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:03.481 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:43:03.955 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:43:04.427 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:43:04.899 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:43:05.370 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:43:05.841 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:43:06.312 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:43:06.783 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:43:07.256 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:43:07.729 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:43:08.202 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:43:08.675 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:43:09.148 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:43:09.620 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:43:10.093 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:43:10.566 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:43:11.038 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:43:11.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:11.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:11.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:11.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:11.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:11.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:11.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:11.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:11.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:43:11.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:43:11.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:43:11.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:43:11.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:43:11.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:43:11.182 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:43:11.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3603 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:43:11.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3603 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:43:11.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:43:11.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:43:11.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:43:11.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:43:11.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:43:11.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:43:16.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:43:16.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:43:16.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:43:16.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:43:16.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:43:16.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:43:16.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:43:16.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:43:16.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:43:16.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:43:16.197 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:43:16.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:43:16.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:43:16.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:43:16.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:43:16.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:43:16.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:43:16.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:43:16.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:43:16.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:16.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:43:16.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:43:16.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:43:16.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:43:16.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:43:16.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:43:16.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:43:16.204 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:43:16.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:16.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:43:16.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:43:16.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:43:16.206 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:43:16.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:43:16.206 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:43:16.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:43:16.206 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:43:16.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:16.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:43:16.210 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:43:16.210 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:43:16.210 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:16.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:16.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:16.215 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:43:16.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:43:16.738 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:43:16.740 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:43:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:16.742 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:43:16.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:16.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:16.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:43:16.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:16.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:16.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:16.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:43:16.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:43:16.785 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:43:16.788 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:43:16.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:16.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:16.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:16.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:16.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:17.166 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:43:17.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:17.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:17.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:17.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:17.637 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:43:18.110 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:43:18.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:18.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:18.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:18.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:18.583 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:43:19.055 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:43:19.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:19.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:19.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:19.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:19.529 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:43:20.002 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:43:20.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:20.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:20.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:20.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:20.474 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:43:20.948 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:43:21.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:21.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:21.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:21.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:21.420 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:43:21.892 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:43:22.363 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:43:22.834 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:43:23.307 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:43:23.776 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:43:24.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:43:24.717 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:43:24.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:24.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:24.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:24.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:24.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:24.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:24.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:43:24.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:24.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:24.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:24.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:43:24.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:43:24.853 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:43:24.857 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:43:24.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:24.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:24.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:24.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:24.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:25.188 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:43:25.661 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:43:26.134 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:43:26.606 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:43:27.076 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:43:27.548 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:43:28.018 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:43:28.492 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:43:28.964 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:43:29.437 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:43:29.910 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:43:30.383 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:43:30.855 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:43:31.328 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:43:31.801 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:43:32.273 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:43:32.744 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:43:32.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:32.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:32.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:32.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:32.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:32.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:32.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:32.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:32.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:43:32.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:43:32.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:43:32.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:43:32.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:43:32.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:43:32.890 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:43:37.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:43:37.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:43:37.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:43:37.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:43:37.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:43:37.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:43:37.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:43:37.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:43:37.900 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:43:37.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:43:37.900 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:43:37.901 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:43:37.901 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:43:37.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:43:37.901 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:43:37.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:43:37.901 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:43:37.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:43:37.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:43:37.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:37.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:43:37.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:43:37.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:43:37.902 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:43:37.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:43:37.902 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:43:37.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:43:37.902 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:43:37.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:37.903 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:43:37.903 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:43:37.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:43:37.903 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:43:37.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:43:37.903 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:43:37.904 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:43:37.904 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:43:37.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:37.906 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:43:37.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:43:37.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:43:37.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:43:37.906 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:43:37.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:43:37.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:43:37.907 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:43:37.907 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:43:37.907 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:43:37.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:43:37.912 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:43:38.387 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:43:38.439 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:43:38.440 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:43:38.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:38.441 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:43:38.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:38.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:38.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:43:38.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:38.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:38.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:38.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:43:38.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:43:38.479 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:43:38.482 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:43:38.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:38.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:38.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:38.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:38.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:38.855 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:43:38.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:38.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:38.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:38.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:39.326 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:43:39.799 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:43:39.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:39.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:39.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:39.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:40.272 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:43:40.744 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:43:40.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:40.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:40.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:40.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:41.217 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:43:41.690 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:43:41.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:41.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:41.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:41.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:42.162 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:43:42.628 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:43:42.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:43:42.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:43:42.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:43:42.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:43:43.099 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:43:43.573 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:43:44.046 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:43:44.518 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:43:44.991 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:43:45.464 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:43:45.936 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:43:46.407 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:43:46.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:46.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:46.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:46.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:46.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:46.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:46.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:43:46.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:46.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:46.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:46.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:43:46.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:43:46.543 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:43:46.547 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:43:46.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:46.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:46.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:46.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:46.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:46.876 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:43:47.341 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:43:47.807 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:43:48.274 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:43:48.739 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:43:49.204 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:43:49.669 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:43:50.141 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:43:50.614 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:43:51.087 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:43:51.559 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:43:52.032 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:43:52.505 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:43:52.978 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:43:53.450 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:43:53.924 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:43:54.390 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:43:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:54.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:54.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:54.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:54.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:43:54.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:43:54.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:43:54.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:54.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:54.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:54.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:43:54.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:43:54.625 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:43:54.628 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:43:54.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:43:54.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:43:54.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:43:54.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:54.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:43:54.858 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:43:55.328 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:43:55.801 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:43:56.274 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:43:56.746 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:43:57.218 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:43:57.688 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:43:58.162 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:43:58.634 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:43:59.107 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:43:59.580 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:44:00.053 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:44:00.525 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:44:00.991 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:44:01.462 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:44:01.935 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:44:02.408 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:44:02.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:02.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:02.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:02.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:02.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:02.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:02.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:44:02.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:02.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:02.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:02.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:44:02.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:44:02.689 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:44:02.693 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:44:02.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:02.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:02.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:02.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:02.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:02.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:02.880 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:44:03.353 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:44:03.826 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:44:04.298 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:44:04.771 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:44:05.244 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:44:05.717 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:44:06.190 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:44:06.663 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:44:07.135 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:44:07.608 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:44:08.081 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:44:08.552 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:44:09.019 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:44:09.491 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:44:09.964 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:44:10.437 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:44:10.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:10.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:10.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:10.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:10.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:10.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:10.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:10.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:10.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:44:10.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:44:10.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:44:10.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:44:10.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:44:10.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:44:10.723 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7101 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7101 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7101 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7101 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7101 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7101 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7101 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7102 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7102 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7102 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7102 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7102 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7102 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7102 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:10.723 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7102 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:15.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:44:15.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:44:15.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:44:15.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:44:15.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:44:15.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:44:15.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:44:15.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:44:15.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:44:15.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:44:15.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:44:15.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:44:15.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:44:15.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:44:15.738 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:44:15.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:44:15.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:44:15.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:44:15.739 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:44:15.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:15.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:44:15.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:44:15.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:44:15.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:44:15.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:44:15.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:44:15.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:44:15.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:44:15.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:15.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:44:15.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:44:15.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:44:15.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:44:15.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:44:15.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:44:15.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:44:15.745 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:44:15.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:15.747 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:44:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:44:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:44:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:15.748 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:44:15.748 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:44:15.748 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:44:15.748 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:15.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:15.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:15.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:15.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:15.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:15.753 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:44:16.231 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:44:16.277 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:44:16.278 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:44:16.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:16.280 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:44:16.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:16.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:16.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:44:16.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:16.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:16.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:16.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:44:16.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:44:16.323 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:44:16.327 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:44:16.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:16.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:16.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:16.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:16.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:16.698 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:44:16.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:16.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:16.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:16.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:17.170 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:44:17.641 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:44:17.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:17.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:17.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:17.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:18.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:44:18.582 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:44:18.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:18.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:18.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:18.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:19.053 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:44:19.524 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:44:19.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:19.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:19.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:19.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:19.997 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:44:20.470 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:44:20.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:20.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:20.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:20.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:20.942 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:44:21.413 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:44:21.886 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:44:22.358 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:44:22.831 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:44:23.301 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:44:23.772 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:44:24.245 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:44:24.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:24.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:24.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:24.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:24.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:24.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:24.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:44:24.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:24.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:24.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:24.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:44:24.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:44:24.377 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:44:24.380 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:44:24.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:24.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:24.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:24.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:24.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:24.713 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:44:25.185 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:44:25.654 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:44:26.126 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:44:26.598 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:44:27.072 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:44:27.544 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:44:28.017 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:44:28.490 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:44:28.962 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:44:29.433 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:44:29.907 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:44:30.379 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:44:30.852 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:44:31.323 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:44:31.796 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:44:32.268 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:44:32.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:32.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:32.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:32.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:32.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:32.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:32.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:32.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:32.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:44:32.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:44:32.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:44:32.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:44:32.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:44:32.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:44:32.409 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3602 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3602 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3602 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3602 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3602 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3602 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3602 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:32.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3602 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:44:37.408 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:44:37.408 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:44:37.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:44:37.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:44:37.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:44:37.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:44:37.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:44:37.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:44:37.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:44:37.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:44:37.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:44:37.424 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:44:37.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:44:37.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:44:37.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:44:37.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:44:37.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:44:37.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:44:37.425 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:44:37.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:37.428 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:44:37.428 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:44:37.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:44:37.428 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:44:37.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:44:37.428 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:44:37.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:44:37.428 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:44:37.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:37.431 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:44:37.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:44:37.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:44:37.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:44:37.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:44:37.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:44:37.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:44:37.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:44:37.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:44:37.435 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:44:37.435 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:44:37.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:44:37.440 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:44:37.919 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:44:37.961 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:44:37.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:37.965 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:44:37.969 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:44:37.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:37.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:37.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:44:38.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:38.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:38.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:38.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:44:38.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:44:38.011 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:44:38.014 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:44:38.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:38.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:38.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:38.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:38.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:38.389 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:44:38.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:38.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:38.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:38.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:38.862 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:44:39.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:44:39.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:39.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:39.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:39.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:39.805 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:44:40.278 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:44:40.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:40.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:40.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:40.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:40.750 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:44:41.222 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:44:41.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:41.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:41.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:41.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:41.693 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:44:42.167 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:44:42.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:44:42.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:44:42.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:44:42.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:44:42.639 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:44:43.111 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:44:43.585 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:44:44.058 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:44:44.530 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:44:45.001 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:44:45.474 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:44:45.947 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:44:46.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:46.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:46.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:46.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:46.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:46.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:46.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:44:46.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:46.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:46.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:46.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:44:46.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:44:46.085 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:44:46.089 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:44:46.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:46.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:46.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:46.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:46.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:46.414 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:44:46.879 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:44:47.351 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:44:47.823 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:44:48.297 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:44:48.769 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:44:49.241 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:44:49.712 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:44:50.183 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:44:50.654 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:44:51.128 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:44:51.600 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:44:52.072 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:44:52.546 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:44:53.018 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:44:53.490 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:44:53.961 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:44:54.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:54.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:54.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:54.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:54.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:44:54.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:44:54.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:44:54.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:54.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:54.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:54.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:44:54.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:44:54.142 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:44:54.145 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:44:54.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:44:54.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:44:54.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:44:54.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:54.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:44:54.431 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:44:54.902 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:44:55.376 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:44:55.848 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:44:56.320 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:44:56.791 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:44:57.265 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:44:57.737 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:44:58.209 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:44:58.682 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:44:59.154 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:44:59.627 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:45:00.100 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:45:00.573 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:45:01.045 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:45:01.518 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:45:01.990 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:45:02.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:02.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:02.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:02.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:02.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:02.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:02.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:45:02.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:02.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:02.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:02.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:45:02.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:45:02.225 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:45:02.227 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:45:02.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:02.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:02.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:02.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:02.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:02.462 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:45:02.934 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:45:03.407 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:45:03.879 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:45:04.351 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:45:04.822 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:45:05.296 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:45:05.768 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:45:06.240 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:45:06.711 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:45:07.182 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:45:07.656 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:45:08.128 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:45:08.596 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:45:09.066 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:45:09.537 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:45:10.010 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:45:10.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:10.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:10.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:10.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:10.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:45:10.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:45:10.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:45:10.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:45:10.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:45:10.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:45:10.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:45:10.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:45:10.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:45:10.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:45:10.253 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:45:10.253 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7093 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:45:10.253 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7093 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:45:10.253 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7093 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:45:10.253 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7093 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:45:10.253 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7093 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:45:10.253 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7093 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:45:10.253 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7093 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:45:15.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:45:15.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:45:15.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:45:15.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:45:15.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:45:15.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:45:15.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:45:15.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:45:15.260 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:45:15.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:45:15.261 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:45:15.262 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:45:15.262 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:45:15.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:45:15.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:45:15.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:45:15.263 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:45:15.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:45:15.264 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:45:15.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:45:15.265 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:45:15.265 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:45:15.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:45:15.265 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:45:15.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:45:15.265 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:45:15.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:45:15.265 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:45:15.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:45:15.267 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:45:15.267 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:45:15.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:45:15.267 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:45:15.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:45:15.267 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:45:15.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:45:15.267 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:45:15.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:45:15.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:45:15.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:45:15.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:45:15.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:45:15.270 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:45:15.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:45:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:45:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:45:15.275 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:45:15.753 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:45:15.801 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:45:15.805 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:45:15.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:15.807 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:45:15.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:15.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:15.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:45:15.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:15.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:15.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:15.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:45:15.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:45:15.892 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:45:15.896 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:45:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:15.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:15.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:15.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:15.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:16.225 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:45:16.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:45:16.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:45:16.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:45:16.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:45:16.697 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:45:17.170 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:45:17.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:45:17.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:45:17.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:45:17.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:45:17.642 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:45:18.114 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:45:18.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:45:18.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:45:18.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:45:18.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:45:18.585 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:45:19.058 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:45:19.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:45:19.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:45:19.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:45:19.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:45:19.531 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:45:20.002 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:45:20.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:45:20.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:45:20.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:45:20.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:45:20.473 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:45:20.947 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:45:21.419 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:45:21.891 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:45:22.362 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:45:22.836 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:45:23.308 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:45:23.780 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:45:23.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:23.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:23.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:23.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:23.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:23.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:23.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:45:23.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:23.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:23.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:23.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:45:23.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:45:23.961 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:45:23.963 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:45:23.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:23.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:23.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:23.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:23.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:24.251 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:45:24.724 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:45:25.197 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:45:25.669 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:45:26.140 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:45:26.613 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:45:27.085 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:45:27.557 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:45:28.028 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:45:28.502 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:45:28.974 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:45:29.445 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:45:29.917 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:45:30.390 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:45:30.862 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:45:31.334 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:45:31.805 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:45:31.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:31.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:31.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:31.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:31.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:31.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:31.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:45:31.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:31.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:31.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:31.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:45:31.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:45:32.039 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:45:32.041 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:45:32.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:32.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:32.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:32.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:32.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:32.278 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:45:32.751 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:45:33.223 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:45:33.694 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:45:34.167 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:45:34.640 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:45:35.111 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:45:35.582 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:45:36.056 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:45:36.528 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:45:37.000 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:45:37.471 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:45:37.944 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:45:38.416 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:45:38.888 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:45:39.359 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:45:39.832 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:45:40.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:40.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:40.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:40.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:40.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:40.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:40.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:45:40.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:40.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:40.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:40.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:45:40.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:45:40.109 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:45:40.113 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:45:40.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:40.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:40.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:40.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:40.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:40.301 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:45:40.771 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:45:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:45:41.713 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:45:42.186 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:45:42.659 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:45:43.130 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:45:43.602 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:45:44.075 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:45:44.548 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:45:45.020 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:45:45.493 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:45:45.966 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:45:46.438 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:45:46.911 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:45:47.384 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:45:47.856 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:45:48.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:48.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:48.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:48.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:48.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:48.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:48.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:45:48.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:48.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:48.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:48.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:45:48.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:45:48.182 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:45:48.186 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:45:48.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:48.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:48.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:48.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:48.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:48.326 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 01:45:48.798 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 01:45:49.271 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 01:45:49.743 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 01:45:50.215 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 01:45:50.686 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 01:45:51.160 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 01:45:51.632 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 01:45:52.104 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 01:45:52.575 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 01:45:53.045 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 01:45:53.518 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 01:45:53.991 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 01:45:54.463 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 01:45:54.934 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 01:45:55.407 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 01:45:55.880 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 01:45:56.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:56.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:56.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:56.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:56.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:45:56.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:45:56.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:45:56.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:56.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:56.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:56.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:45:56.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:45:56.253 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:45:56.256 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:45:56.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:45:56.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:45:56.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:45:56.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:56.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:45:56.350 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 01:45:56.818 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 01:45:57.289 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 01:45:57.762 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 01:45:58.234 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 01:45:58.706 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 01:45:59.177 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 01:45:59.651 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 01:46:00.123 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 01:46:00.595 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 01:46:01.066 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 01:46:01.539 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 01:46:02.012 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 01:46:02.484 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 01:46:02.957 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 01:46:03.430 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 01:46:03.901 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 01:46:04.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:04.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:04.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:04.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:04.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:04.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:04.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:46:04.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:04.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:04.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:04.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:46:04.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:46:04.318 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:46:04.320 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:46:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:04.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:04.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:04.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:04.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:04.372 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 01:46:04.843 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 01:46:05.314 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 01:46:05.787 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 01:46:06.260 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 01:46:06.732 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 01:46:07.203 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 01:46:07.674 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 01:46:08.144 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 01:46:08.617 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 01:46:09.090 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 01:46:09.562 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 01:46:10.033 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 01:46:10.503 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 01:46:10.975 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 01:46:11.445 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 01:46:11.919 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 01:46:12.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:12.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:12.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:12.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:12.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:12.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:12.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:46:12.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:12.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:12.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:12.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:46:12.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:46:12.385 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:46:12.390 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:46:12.391 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 01:46:12.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:12.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:12.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:12.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:12.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:12.863 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 01:46:13.333 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 01:46:13.805 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 01:46:14.278 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 01:46:14.750 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 01:46:15.222 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 01:46:15.693 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 01:46:16.166 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 01:46:16.639 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 01:46:17.110 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 01:46:17.582 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 01:46:18.055 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 01:46:18.528 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 01:46:18.999 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 01:46:19.470 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 01:46:19.944 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 01:46:20.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:20.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:20.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:20.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:20.416 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 01:46:20.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:20.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:20.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:20.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:20.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:46:20.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:46:20.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:46:20.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:46:20.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:46:20.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:46:20.422 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:46:25.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:46:25.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:46:25.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:46:25.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:46:25.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:46:25.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:46:25.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:46:25.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:46:25.436 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:46:25.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:46:25.437 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:46:25.438 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:46:25.438 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:46:25.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:46:25.439 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:46:25.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:46:25.439 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:46:25.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:46:25.439 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:46:25.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:25.440 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:46:25.440 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:46:25.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:46:25.440 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:46:25.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:46:25.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:46:25.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:46:25.440 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:46:25.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:25.442 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:46:25.442 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:46:25.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:46:25.442 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:46:25.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:46:25.442 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:46:25.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:46:25.442 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:46:25.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:25.444 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:46:25.444 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:46:25.445 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:46:25.445 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:25.449 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:46:25.927 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:46:25.976 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:46:25.979 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:46:25.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:25.982 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:46:26.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:26.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:26.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:46:26.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:26.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:26.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:26.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:46:26.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:46:26.019 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:46:26.023 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:46:26.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:26.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:26.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:26.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:26.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:26.392 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:46:26.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:26.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:26.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:26.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:26.860 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:46:27.332 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:46:27.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:27.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:27.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:27.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:27.805 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:46:28.278 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:46:28.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:28.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:28.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:28.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:28.750 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:46:29.221 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:46:29.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:29.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:29.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:29.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:29.694 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:46:30.166 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:46:30.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:30.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:30.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:30.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:30.638 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:46:31.110 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:46:31.583 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:46:32.055 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:46:32.528 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:46:32.998 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:46:33.469 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:46:33.940 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:46:34.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:34.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:34.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:34.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:34.041 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1860 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:34.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:34.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:34.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:46:34.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:34.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:34.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:34.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:46:34.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:46:34.074 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:46:34.076 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:46:34.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:34.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:34.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:34.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:34.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:34.410 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:46:34.882 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:46:35.355 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:46:35.827 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:46:36.299 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:46:36.770 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:46:37.241 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:46:37.712 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:46:38.183 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:46:38.653 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:46:39.124 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:46:39.597 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:46:40.065 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:46:40.537 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:46:41.010 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:46:41.482 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:46:41.955 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:46:42.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:42.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:42.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:42.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:42.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:42.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:42.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:42.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:42.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:46:42.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:46:42.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:46:42.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:46:42.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:46:42.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:46:42.103 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:46:42.103 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:42.103 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:42.104 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:42.104 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:42.104 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:42.104 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:42.104 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:47.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:46:47.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:46:47.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:46:47.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:46:47.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:46:47.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:46:47.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:46:47.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:46:47.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:46:47.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:46:47.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:46:47.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:46:47.113 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:46:47.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:46:47.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:46:47.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:46:47.114 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:46:47.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:46:47.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:46:47.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:47.116 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:46:47.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:46:47.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:46:47.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:46:47.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:46:47.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:46:47.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:46:47.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:46:47.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:47.119 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:46:47.119 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:46:47.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:46:47.119 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:46:47.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:46:47.119 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:46:47.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:46:47.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:46:47.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:47.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:46:47.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:46:47.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:46:47.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:46:47.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:46:47.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:46:47.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:46:47.124 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:46:47.124 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:46:47.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:47.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:47.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:47.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:46:47.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:47.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:47.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:47.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:46:47.129 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:46:47.606 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:46:47.655 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:46:47.658 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:46:47.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:47.660 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:46:47.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:47.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:47.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:46:47.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:47.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:47.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:47.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:46:47.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:46:47.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:47.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:46:47.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:46:47.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:47.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:48.079 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:46:48.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:48.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:48.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:48.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:48.552 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:46:49.025 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:46:49.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:49.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:49.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:49.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:49.497 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:46:49.968 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:46:50.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:50.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:50.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:50.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:50.442 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:46:50.914 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:46:51.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:51.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:51.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:51.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:51.387 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:46:51.857 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:46:52.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:52.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:52.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:52.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:52.331 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:46:52.804 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:46:53.276 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:46:53.749 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:46:54.222 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:46:54.694 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:46:55.165 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:46:55.639 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:46:55.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:46:55.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:46:55.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:46:55.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:46:55.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:46:55.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:46:55.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:46:55.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:46:55.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:46:55.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:46:55.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:46:55.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:46:55.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:46:55.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:46:55.735 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:46:55.735 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:55.736 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:55.736 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:55.736 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:55.736 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:55.736 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:46:55.736 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:00.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:47:00.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:47:00.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:00.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:00.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:00.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:00.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:00.740 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:00.740 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:00.740 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:00.740 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:47:00.741 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:47:00.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:47:00.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:00.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:00.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:00.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:47:00.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:00.743 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:47:00.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:00.744 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:47:00.744 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:47:00.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:00.744 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:00.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:00.744 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:47:00.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:00.744 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:47:00.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:00.746 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:47:00.746 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:47:00.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:00.746 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:00.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:00.746 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:47:00.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:00.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:47:00.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:00.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:47:00.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:47:00.750 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:47:00.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:00.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:00.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:00.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:00.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:00.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:00.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:00.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:00.754 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:47:01.233 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:47:01.278 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:47:01.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:47:01.281 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:47:01.283 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:47:01.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:47:01.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:47:01.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:47:01.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:47:01.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:47:01.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:47:01.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:47:01.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:47:01.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:47:01.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:47:01.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:47:01.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:47:01.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:47:01.700 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:47:01.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:01.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:01.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:01.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:02.171 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:47:02.645 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:47:02.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:02.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:02.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:02.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:03.117 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:47:03.589 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:47:03.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:03.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:03.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:03.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:04.060 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:47:04.531 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:47:04.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:04.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:04.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:04.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:05.004 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:47:05.477 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:47:05.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:05.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:05.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:05.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:05.950 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:47:06.423 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:47:06.895 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:47:07.368 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:47:07.841 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:47:08.314 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:47:08.786 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:47:09.257 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:47:09.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:47:09.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:47:09.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:47:09.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:47:09.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:09.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:09.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:09.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:09.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:09.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:09.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:09.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:09.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:47:09.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:47:09.365 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:47:09.365 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1861 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:09.365 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:09.365 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:09.365 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:09.365 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:09.365 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:09.365 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:14.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:47:14.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:47:14.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:14.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:14.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:14.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:14.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:14.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:14.378 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:14.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:14.378 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:47:14.380 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:47:14.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:47:14.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:14.380 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:14.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:14.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:47:14.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:14.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:47:14.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:14.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:47:14.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:47:14.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:14.383 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:14.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:14.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:47:14.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:14.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:47:14.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:14.385 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:47:14.385 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:47:14.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:14.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:14.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:14.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:47:14.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:14.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:47:14.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:47:14.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:47:14.388 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:47:14.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:14.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:14.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:47:14.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:47:14.913 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:47:14.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:47:14.915 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:47:14.917 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:47:14.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:47:14.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:47:14.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:47:14.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:47:14.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:47:14.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:47:14.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:47:14.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:47:15.344 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:47:15.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:15.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:15.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:15.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:15.815 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:47:16.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:47:16.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:16.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:16.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:16.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:16.761 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:47:17.233 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:47:17.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:17.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:17.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:17.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:17.704 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:47:18.175 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:47:18.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:18.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:18.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:18.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:18.648 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:47:19.120 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:47:19.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:19.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:19.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:19.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:19.592 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:47:20.063 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:47:20.537 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:47:21.009 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:47:21.481 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:47:21.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:47:21.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:47:21.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:21.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:21.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:21.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:21.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:21.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:21.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:21.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:21.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:47:21.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:47:21.614 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:47:21.614 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:21.614 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:21.614 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:21.614 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:21.615 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:26.617 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:47:26.617 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:47:26.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:26.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:26.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:26.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:26.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:26.630 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:26.630 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:26.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:26.631 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:47:26.633 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:47:26.633 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:47:26.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:26.633 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:26.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:26.633 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:47:26.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:26.634 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:47:26.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:26.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:47:26.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:47:26.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:26.637 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:26.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:26.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:47:26.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:26.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:47:26.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:26.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:47:26.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:47:26.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:26.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:26.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:26.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:47:26.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:26.640 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:47:26.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:26.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:47:26.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:47:26.643 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:47:26.643 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:26.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:47:27.126 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:47:27.170 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:47:27.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:47:27.173 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:47:27.174 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:47:27.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:47:27.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:47:27.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:47:27.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:47:27.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:47:27.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:47:27.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:47:27.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:47:27.598 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:47:27.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:27.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:27.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:27.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:28.069 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:47:28.543 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:47:28.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:28.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:28.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:28.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:29.015 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:47:29.487 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:47:29.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:29.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:29.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:29.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:29.958 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:47:30.431 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:47:30.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:30.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:30.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:30.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:30.904 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:47:31.376 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:47:31.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:31.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:31.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:31.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:31.849 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:47:31.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:31.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:31.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:31.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:31.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:31.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:31.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:31.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:47:31.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:47:31.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:31.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:31.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:31.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:31.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:31.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:31.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:31.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:31.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:47:32.328 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:47:32.809 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:47:33.289 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:47:33.769 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:47:34.250 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:47:34.730 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:47:35.210 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:47:35.690 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:47:36.171 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:47:36.652 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:47:36.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:47:36.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:47:36.870 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:47:36.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:47:36.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:47:36.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:36.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:36.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:36.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:36.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:36.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:36.879 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:36.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:36.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:47:36.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:47:36.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:47:36.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:36.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:36.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:36.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:47:36.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:36.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:47:36.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:36.881 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:47:36.881 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:47:36.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:36.881 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:36.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:47:36.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:36.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:36.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:47:36.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:36.883 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:47:36.883 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:47:36.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:36.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:36.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:47:36.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:36.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:36.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:47:36.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:36.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:47:36.888 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:47:36.888 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:47:36.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:36.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:36.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:36.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:36.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:36.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:36.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:36.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:36.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:36.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:36.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:36.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:36.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:36.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:47:36.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:47:36.890 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:47:41.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:47:41.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:47:41.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:41.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:41.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:41.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:41.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:41.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:41.908 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:41.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:47:41.909 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:47:41.911 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:47:41.911 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:47:41.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:41.911 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:41.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:47:41.912 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:47:41.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:47:41.912 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:47:41.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:41.913 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:47:41.913 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:47:41.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:41.914 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:41.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:47:41.914 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:47:41.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:47:41.914 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:47:41.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:41.916 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:47:41.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:47:41.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:41.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:47:41.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:47:41.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:47:41.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:47:41.917 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:47:41.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:41.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:47:41.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:47:41.922 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:47:41.922 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:41.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:41.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:41.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:47:41.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:47:42.405 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:47:42.451 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:47:42.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:47:42.454 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:47:42.458 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:47:42.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:47:42.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:47:42.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:47:42.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:47:42.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:47:42.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:47:42.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:47:42.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:47:42.877 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:47:42.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:42.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:42.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:42.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:43.351 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:47:43.823 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:47:43.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:43.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:43.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:43.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:44.295 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:47:44.766 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:47:44.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:44.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:44.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:44.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:45.239 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:47:45.711 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:47:45.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:45.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:45.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:45.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:46.183 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:47:46.654 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:47:46.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:47:46.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:46.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:47:46.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:47:47.127 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:47:47.600 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:47:48.072 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:47:48.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:48.543 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:47:49.016 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:47:49.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:49.488 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:47:49.960 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:47:50.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:50.431 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:47:50.905 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:47:51.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:51.377 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:47:51.849 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:47:52.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:52.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:52.321 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:47:52.785 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:47:53.248 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:47:53.712 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:47:54.175 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:47:54.638 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:47:55.102 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:47:55.565 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:47:56.028 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:47:56.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:47:56.497 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:47:56.968 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:47:57.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:57.441 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:47:57.913 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:47:58.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:58.385 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:47:58.856 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:47:59.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:47:59.330 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:47:59.802 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:48:00.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:00.274 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:48:00.748 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:48:01.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:01.220 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:48:01.692 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:48:02.163 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:48:02.636 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:48:03.108 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:48:03.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:03.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:03.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:03.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:03.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:03.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:03.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:48:03.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:48:03.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:48:03.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:48:03.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:48:03.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:48:03.243 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:48:03.243 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:03.243 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:03.243 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:03.243 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:03.243 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:03.243 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:03.243 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:03.243 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:08.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:48:08.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:48:08.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:48:08.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:48:08.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:48:08.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:48:08.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:48:08.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:48:08.264 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:08.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:48:08.264 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:48:08.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:48:08.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:48:08.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:48:08.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:08.266 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:48:08.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:48:08.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:48:08.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:48:08.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:08.268 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:48:08.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:48:08.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:48:08.268 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:08.268 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:48:08.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:48:08.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:48:08.268 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:48:08.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:08.270 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:48:08.270 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:48:08.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:48:08.270 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:08.270 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:48:08.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:48:08.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:48:08.270 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:48:08.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:48:08.272 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:48:08.272 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:48:08.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:08.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:08.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:08.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:08.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:08.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:08.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:08.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:08.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:08.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:08.277 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:48:08.753 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:48:08.800 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:48:08.802 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:48:08.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:48:08.805 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:48:08.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:08.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:08.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:48:08.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:08.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:08.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:08.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:48:08.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:48:08.844 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:48:08.847 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:48:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 01:48:08.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:08.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:08.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:08.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:09.225 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:48:09.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:09.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:09.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:09.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:09.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 01:48:09.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:09.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:09.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:09.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:09.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:09.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:09.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:09.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:48:09.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:48:09.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:48:09.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:48:09.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:48:09.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:48:09.674 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:48:09.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=303 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=303 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.676 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.676 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.676 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:09.676 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:14.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:48:14.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:48:14.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:48:14.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:48:14.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:48:14.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:48:14.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:48:14.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:48:14.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:14.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:48:14.690 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:48:14.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:48:14.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:48:14.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:48:14.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:14.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:48:14.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:48:14.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:48:14.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:48:14.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:14.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:48:14.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:48:14.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:48:14.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:14.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:48:14.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:48:14.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:48:14.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:48:14.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:14.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:48:14.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:48:14.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:48:14.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:14.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:48:14.701 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:48:14.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:48:14.701 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:48:14.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:14.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:48:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:48:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:48:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:48:14.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:48:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:48:14.704 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:48:14.704 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:48:14.704 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:14.709 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:48:15.188 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:48:15.230 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:48:15.232 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:48:15.234 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:48:15.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:48:15.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:15.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:15.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:48:15.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:15.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:15.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:15.250 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:48:15.250 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:48:15.280 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:48:15.284 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:48:15.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 01:48:15.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:15.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:15.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:15.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:15.653 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:48:15.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:15.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:15.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:15.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:16.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 01:48:16.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:16.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:16.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:16.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:16.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:16.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:16.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:16.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:48:16.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:48:16.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:48:16.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:48:16.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:48:16.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:48:16.096 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:48:16.096 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:16.096 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:16.096 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:16.096 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:16.096 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:16.096 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:16.096 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:48:21.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:48:21.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:48:21.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:48:21.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:48:21.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:48:21.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:48:21.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:48:21.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:48:21.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:21.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:48:21.110 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:48:21.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:48:21.114 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:48:21.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:48:21.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:21.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:48:21.114 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:48:21.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:48:21.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:48:21.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:21.116 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:48:21.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:48:21.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:48:21.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:21.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:48:21.117 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:48:21.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:48:21.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:48:21.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:21.118 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:48:21.118 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:48:21.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:48:21.119 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:48:21.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:48:21.119 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:48:21.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:48:21.119 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:48:21.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:48:21.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:48:21.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:48:21.122 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:48:21.122 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:48:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:48:21.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:48:21.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:48:21.648 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:48:21.650 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:48:21.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:48:21.651 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:48:21.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:21.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:21.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:48:21.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:21.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:21.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:21.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:48:21.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:48:21.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:48:21.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:21.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:21.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:21.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:22.072 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:48:22.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:22.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:22.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:22.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:22.544 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:48:23.017 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:48:23.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:23.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:23.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:23.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:23.490 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:48:23.962 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:48:24.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:24.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:24.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:24.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:24.436 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:48:24.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:48:25.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:25.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:25.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:25.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:25.380 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:48:25.851 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:48:26.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:48:26.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:48:26.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:48:26.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:48:26.324 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:48:26.797 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:48:27.269 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:48:27.743 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:48:28.216 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:48:28.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:48:29.161 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:48:29.634 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:48:30.106 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:48:30.577 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:48:31.050 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:48:31.523 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:48:31.995 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:48:32.469 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:48:32.941 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:48:33.414 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:48:33.887 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:48:34.360 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:48:34.832 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:48:35.306 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:48:35.778 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:48:36.251 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:48:36.722 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:48:37.195 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:48:37.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:48:37.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:37.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:37.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:37.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:37.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:37.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:48:37.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:37.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:37.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:37.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:48:37.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:48:37.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:48:37.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:37.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:37.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:37.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:37.667 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:48:38.139 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:48:38.612 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:48:39.085 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:48:39.558 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:48:40.031 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:48:40.504 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:48:40.976 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:48:41.449 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:48:41.922 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:48:42.395 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:48:42.868 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:48:43.341 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:48:43.813 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:48:44.286 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:48:44.759 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:48:45.231 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:48:45.704 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:48:46.177 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:48:46.649 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:48:47.122 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:48:47.595 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:48:48.068 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:48:48.541 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:48:49.014 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:48:49.486 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:48:49.957 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:48:50.430 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:48:50.903 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:48:51.376 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:48:51.849 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:48:52.322 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:48:52.794 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:48:52.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:48:52.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:52.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:52.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:53.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:48:53.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:48:53.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:48:53.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:53.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:53.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:53.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:48:53.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:48:53.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:48:53.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:48:53.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:48:53.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:53.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:48:53.267 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:48:53.740 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:48:54.212 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 01:48:54.685 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 01:48:55.158 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 01:48:55.630 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 01:48:56.101 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 01:48:56.574 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 01:48:57.047 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 01:48:57.519 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 01:48:57.993 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 01:48:58.465 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 01:48:58.938 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 01:48:59.408 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 01:48:59.879 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 01:49:00.353 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 01:49:00.825 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 01:49:01.297 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 01:49:01.771 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 01:49:02.243 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 01:49:02.716 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 01:49:03.189 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 01:49:03.662 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 01:49:04.134 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 01:49:04.605 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 01:49:05.078 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 01:49:05.551 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 01:49:06.023 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 01:49:06.494 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 01:49:06.968 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 01:49:07.440 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 01:49:07.912 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 01:49:08.383 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 01:49:08.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:49:08.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:08.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:49:08.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:49:08.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:49:08.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:49:08.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:49:08.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:08.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:49:08.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:49:08.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:49:08.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:49:08.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:08.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:49:08.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:49:08.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:49:08.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:08.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:08.853 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 01:49:09.325 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 01:49:09.798 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 01:49:10.270 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 01:49:10.743 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 01:49:11.216 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 01:49:11.689 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 01:49:12.161 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 01:49:12.632 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 01:49:13.106 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 01:49:13.578 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 01:49:14.050 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 01:49:14.521 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 01:49:14.994 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 01:49:15.467 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 01:49:15.939 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 01:49:16.410 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 01:49:16.884 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 01:49:17.356 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 01:49:17.829 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 01:49:18.302 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 01:49:18.775 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 01:49:19.247 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 01:49:19.718 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 01:49:20.191 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 01:49:20.664 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 01:49:21.137 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 01:49:21.607 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 01:49:22.078 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 01:49:22.549 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 01:49:23.022 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 01:49:23.495 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 01:49:23.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:49:23.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:23.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:49:23.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:49:23.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:23.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:23.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:23.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:23.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:49:23.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:49:23.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:49:23.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:49:23.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:49:23.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:49:23.943 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:49:23.943 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.943 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.945 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:23.945 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:28.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:49:28.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:49:28.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:49:28.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:49:28.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:49:28.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:49:28.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:49:28.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:49:28.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:28.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:49:28.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:49:28.964 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:49:28.964 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:49:28.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:49:28.964 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:28.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:49:28.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:49:28.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:49:28.965 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:49:28.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:28.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:49:28.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:49:28.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:49:28.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:28.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:49:28.967 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:49:28.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:49:28.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:49:28.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:28.969 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:49:28.969 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:49:28.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:49:28.969 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:28.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:49:28.969 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:49:28.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:49:28.969 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:49:28.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:28.971 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:49:28.972 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:49:28.972 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:49:28.972 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:28.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:28.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:49:28.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:49:28.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:49:28.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:49:28.974 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:49:33.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:49:33.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:49:33.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:49:33.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:49:33.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:49:33.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:49:33.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:49:33.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:49:33.990 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:33.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:49:33.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:49:33.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:49:33.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:49:33.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:49:33.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:33.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:49:33.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:49:33.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:49:33.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:49:33.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:33.996 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:49:33.996 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:49:33.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:49:33.996 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:33.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:49:33.996 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:49:33.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:49:33.996 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:49:33.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:33.998 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:49:33.998 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:49:33.998 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:49:33.998 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:33.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:49:33.998 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:49:33.998 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:49:33.998 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:49:33.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:34.001 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:49:34.001 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:49:34.001 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:49:34.002 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:34.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:34.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:34.006 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:49:34.484 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:49:34.524 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:49:34.525 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:49:34.527 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:49:34.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:49:34.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:49:34.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:49:34.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:49:34.561 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:49:34.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:34.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:49:34.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:49:34.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:49:34.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:49:34.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:49:34.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:49:34.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:49:34.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:34.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:34.957 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:49:35.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:35.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:35.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:35.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:35.427 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:49:35.898 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:49:36.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:36.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:36.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:36.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:36.371 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:49:36.844 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:49:37.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:37.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:37.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:37.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:49:37.790 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:49:38.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:38.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:38.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:38.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:38.262 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:49:38.730 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:49:39.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:39.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:39.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:39.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:39.201 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:49:39.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:49:40.147 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:49:40.619 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:49:41.090 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:49:41.564 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:49:42.037 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:49:42.509 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:49:42.980 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:49:43.453 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:49:43.926 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:49:44.398 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:49:44.869 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:49:44.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:49:44.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:44.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:49:44.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:49:44.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:44.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:44.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:44.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:44.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:49:44.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:49:44.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:49:44.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:49:44.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:49:44.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:49:44.977 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:49:44.977 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:44.977 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:44.977 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:44.977 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:44.977 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:44.978 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:44.978 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:49:49.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:49:49.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:49:49.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:49:49.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:49:49.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:49:49.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:49:49.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:49:49.993 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:49:49.993 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:49.993 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:49:49.993 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:49:49.997 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:49:49.997 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:49:49.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:49:49.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:49.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:49:49.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:49:49.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:49:49.998 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:49:49.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:50.001 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:49:50.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:49:50.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:49:50.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:50.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:49:50.002 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:49:50.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:49:50.002 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:49:50.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:50.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:49:50.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:49:50.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:49:50.004 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:49:50.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:49:50.004 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:49:50.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:49:50.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:49:50.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:49:50.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:49:50.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:49:50.013 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:49:50.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:50.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:50.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:49:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:49:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:50.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:49:50.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:50.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:50.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:50.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:49:50.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:49:50.496 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:49:50.544 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:49:50.546 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:49:50.548 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:49:50.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:49:50.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:49:50.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:49:50.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:49:50.590 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:49:50.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:50.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:49:50.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:49:50.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:49:50.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:49:50.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:49:50.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:49:50.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:49:50.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:50.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:49:50.969 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:49:51.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:51.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:51.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:51.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:51.442 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:49:51.915 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:49:52.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:52.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:52.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:52.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:52.387 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:49:52.858 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:49:53.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:53.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:53.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:53.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:53.332 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:49:53.800 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:49:54.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:54.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:54.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:54.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:54.270 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:49:54.744 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:49:55.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:49:55.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:49:55.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:49:55.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:49:55.217 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:49:55.689 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:49:56.162 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:49:56.635 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:49:57.107 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:49:57.581 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:49:58.054 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:49:58.526 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:49:58.999 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:49:59.472 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:49:59.944 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:50:00.415 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:50:00.888 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:50:01.361 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:50:01.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:50:01.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:01.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:50:01.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:50:01.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:01.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:01.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:01.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:01.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:50:01.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:50:01.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:50:01.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:50:01.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:50:01.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:50:01.475 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:50:01.475 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2474 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:01.475 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2474 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:01.475 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2474 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:01.475 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2474 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:01.475 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2474 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:01.475 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2474 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:01.475 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2474 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:06.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:50:06.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:50:06.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:50:06.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:50:06.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:50:06.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:50:06.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:50:06.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:50:06.483 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:06.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:50:06.483 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:50:06.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:50:06.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:50:06.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:50:06.484 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:06.484 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:50:06.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:50:06.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:50:06.484 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:50:06.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:06.485 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:50:06.485 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:50:06.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:50:06.485 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:06.485 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:50:06.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:50:06.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:50:06.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:50:06.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:06.487 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:50:06.487 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:50:06.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:50:06.487 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:06.487 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:50:06.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:50:06.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:50:06.487 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:50:06.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:50:06.489 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:50:06.489 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:50:06.489 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:06.494 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:50:06.973 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:50:07.016 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:50:07.019 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:50:07.021 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:50:07.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:50:07.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:50:07.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:50:07.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:50:07.060 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:50:07.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:07.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:50:07.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:50:07.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:50:07.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:50:07.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:50:07.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:50:07.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:50:07.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:07.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:07.445 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:50:07.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:07.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:07.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:07.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:07.916 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:50:08.389 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:50:08.410 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:08.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:08.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:08.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:08.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:08.862 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:50:09.334 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:50:09.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:09.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:09.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:09.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:09.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:50:10.281 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:50:10.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:10.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:10.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:10.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:10.753 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:50:11.226 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:50:11.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:11.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:11.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:11.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:11.699 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:50:12.172 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:50:12.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:50:13.116 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:50:13.588 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:50:14.061 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:50:14.532 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:50:15.005 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:50:15.478 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:50:15.950 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:50:16.423 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:50:16.896 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:50:17.368 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:50:17.839 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:50:18.312 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:50:18.785 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:50:19.269 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:50:19.742 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:50:20.215 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:50:20.688 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:50:21.160 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:50:21.631 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:50:22.104 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:50:22.577 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:50:23.049 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:50:23.520 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:50:23.991 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:50:24.462 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:50:24.935 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:50:25.408 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:50:25.880 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:50:26.351 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:50:26.824 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:50:27.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:50:27.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:27.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:50:27.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:50:27.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:27.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:27.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:27.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:27.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:50:27.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:50:27.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:50:27.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:50:27.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:50:27.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:50:27.155 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:50:27.156 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4460 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:27.156 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4460 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:27.156 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4460 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:27.156 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4460 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:27.156 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4460 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:27.156 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4460 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:27.156 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4460 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:32.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:50:32.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:50:32.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:50:32.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:50:32.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:50:32.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:50:32.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:50:32.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:50:32.173 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:32.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:50:32.173 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:50:32.175 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:50:32.175 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:50:32.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:50:32.175 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:32.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:50:32.175 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:50:32.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:50:32.176 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:50:32.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:32.176 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:50:32.177 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:50:32.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:50:32.177 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:32.177 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:50:32.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:50:32.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:50:32.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:50:32.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:32.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:50:32.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:50:32.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:50:32.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:32.178 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:50:32.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:50:32.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:50:32.178 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:50:32.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:50:32.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:50:32.180 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:50:32.180 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:50:32.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:32.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:32.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:50:32.663 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:50:32.703 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:50:32.704 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:50:32.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:50:32.705 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:50:32.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:50:32.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:50:32.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:50:32.741 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:50:32.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:32.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:50:32.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:50:32.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:50:32.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:50:32.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:50:32.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:50:32.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:50:32.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:32.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:33.136 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:50:33.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:33.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:33.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:33.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:33.607 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:50:33.621 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:34.080 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:50:34.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:34.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:34.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:34.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:34.553 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:50:34.587 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:35.025 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:50:35.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:35.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:35.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:35.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:35.496 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:50:35.547 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:35.970 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:50:36.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:36.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:36.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:36.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:36.442 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:50:36.514 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:36.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:50:37.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:37.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:37.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:37.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:37.388 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:50:37.473 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:37.861 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:50:38.333 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:50:38.440 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:38.804 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:50:39.277 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:50:39.400 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:39.750 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:50:40.222 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:50:40.365 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:40.696 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:50:41.168 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:50:41.332 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:41.640 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:50:42.111 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:50:42.292 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:42.582 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:50:43.056 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:50:43.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:50:43.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:43.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:50:43.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:50:43.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:43.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:43.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:43.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:43.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:50:43.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:50:43.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:50:43.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:50:43.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:50:43.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:50:43.164 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:50:43.164 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.164 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.164 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.164 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.164 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.164 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.164 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.164 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.164 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:43.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:50:48.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:50:48.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:50:48.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:50:48.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:50:48.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:50:48.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:50:48.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:50:48.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:50:48.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:48.178 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:50:48.178 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:50:48.180 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:50:48.180 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:50:48.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:50:48.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:48.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:50:48.181 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:50:48.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:50:48.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:50:48.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:48.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:50:48.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:50:48.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:50:48.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:48.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:50:48.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:50:48.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:50:48.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:50:48.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:48.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:50:48.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:50:48.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:50:48.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:50:48.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:50:48.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:50:48.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:50:48.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:50:48.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:50:48.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:50:48.187 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:50:48.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:50:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:50:48.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:50:48.669 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:50:48.716 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:50:48.719 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:50:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:50:48.721 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:50:48.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:50:48.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:50:48.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:50:48.750 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:50:48.752 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:50:48.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:48.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:50:48.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:50:48.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:50:48.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:50:48.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:50:48.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:50:48.768 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:50:48.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:50:48.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:48.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:50:49.137 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:50:49.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:49.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:49.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:49.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:49.608 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:50:49.622 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:50:50.082 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:50:50.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:50.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:50.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:50.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:50.554 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:50:51.026 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:50:51.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:51.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:51.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:51.497 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:50:51.971 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:50:52.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:52.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:52.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:52.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:52.444 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:50:52.916 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:50:53.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:50:53.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:50:53.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:50:53.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:50:53.389 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:50:53.862 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:50:54.334 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:50:54.807 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:50:55.280 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:50:55.752 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:50:56.225 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:50:56.698 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:50:57.171 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:50:57.644 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:50:58.117 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:50:58.589 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:50:59.062 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:50:59.260 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:50:59.535 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:51:00.007 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:51:00.481 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:51:00.953 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:51:01.425 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:51:01.896 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:51:02.370 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:51:02.842 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:51:03.315 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:51:03.785 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:51:04.259 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:51:04.732 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:51:05.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:05.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:05.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:05.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:05.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:05.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:05.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:05.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:05.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:05.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:05.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:05.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:05.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:05.066 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:51:05.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:05.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3644 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:05.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:05.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:05.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:05.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:05.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:05.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:05.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:10.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:10.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:10.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:10.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:10.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:10.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:10.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:10.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:10.079 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:10.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:10.080 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:51:10.081 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:51:10.082 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:51:10.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:10.082 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:10.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:10.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:51:10.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:10.083 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:51:10.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:10.084 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:51:10.084 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:51:10.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:10.084 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:10.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:10.084 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:51:10.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:10.084 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:51:10.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:10.086 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:51:10.086 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:51:10.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:10.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:10.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:10.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:51:10.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:10.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:51:10.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:10.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:51:10.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:51:10.090 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:51:10.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:10.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:10.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:10.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:10.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:10.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:10.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:10.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:10.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:10.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:10.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:51:10.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:51:10.623 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:51:10.625 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:51:10.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:10.628 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:51:10.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:10.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:10.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:10.664 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:51:10.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:10.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:10.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:10.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:10.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:10.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:10.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:10.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:10.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:10.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:11.045 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:51:11.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:11.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:11.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:11.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:11.516 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:51:11.989 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:51:12.010 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:51:12.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:12.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:12.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:12.462 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:51:12.935 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:51:13.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:13.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:13.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:13.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:13.408 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:51:13.881 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:51:14.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:14.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:14.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:14.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:14.353 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:51:14.827 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:51:15.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:15.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:15.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:15.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:15.299 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:51:15.772 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:51:16.243 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:51:16.716 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:51:17.189 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:51:17.661 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:51:18.135 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:51:18.607 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:51:19.080 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:51:19.553 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:51:20.026 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:51:20.498 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:51:20.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:20.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:20.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:20.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:20.733 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=2297 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:20.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:20.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:20.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:20.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:20.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:20.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:20.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:20.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:20.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:20.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:20.748 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:51:20.748 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2300 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:20.748 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2300 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:20.748 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2300 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:20.748 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2300 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:20.748 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2300 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:20.748 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2300 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:20.748 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2300 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:25.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:25.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:25.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:25.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:25.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:25.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:25.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:25.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:25.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:25.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:25.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:51:25.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:51:25.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:51:25.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:25.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:25.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:51:25.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:25.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:25.765 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:51:25.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:25.767 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:51:25.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:51:25.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:25.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:25.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:51:25.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:25.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:25.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:51:25.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:25.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:51:25.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:51:25.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:25.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:25.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:51:25.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:25.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:25.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:51:25.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:51:25.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:51:25.771 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:51:25.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:25.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:51:26.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:51:26.297 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:51:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:26.300 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:51:26.304 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:51:26.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:26.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:26.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:26.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:26.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:26.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:26.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:26.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:26.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:26.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:26.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:26.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:26.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:26.727 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:51:26.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:26.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:26.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:26.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:26.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:26.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:26.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:26.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:26.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:26.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:26.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:26.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:26.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:26.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:26.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:26.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:26.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:26.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:26.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:26.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:26.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:27.198 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:51:27.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:27.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:27.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:27.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:27.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:27.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:27.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:27.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:27.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:27.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:27.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:27.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:27.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:27.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:27.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:27.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:27.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:27.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:27.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:27.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:27.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:27.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:27.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:27.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:27.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:27.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:27.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:27.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:27.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:27.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:27.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:27.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:27.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:27.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:27.670 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:51:27.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:27.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:27.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:27.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:28.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:28.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:28.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:28.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:28.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:28.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:28.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:28.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:28.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:28.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:28.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:28.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:28.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:28.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:28.072 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:51:33.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:33.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:33.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:33.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:33.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:33.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:33.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:33.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:33.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:33.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:33.083 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:51:33.084 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:51:33.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:51:33.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:33.085 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:33.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:33.086 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:51:33.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:33.086 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:51:33.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:33.087 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:51:33.087 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:51:33.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:33.087 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:33.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:33.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:51:33.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:33.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:51:33.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:33.089 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:51:33.089 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:51:33.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:33.089 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:33.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:33.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:51:33.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:33.089 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:51:33.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:33.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:51:33.092 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:51:33.092 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:51:33.092 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:33.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:33.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:33.096 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:51:33.575 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:51:33.621 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:51:33.623 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:51:33.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:33.624 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:51:33.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:33.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:33.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:33.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:33.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:33.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:33.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:33.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:33.667 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:51:33.669 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 01:51:33.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:33.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:33.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:33.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:33.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:34.047 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:51:34.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:34.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:34.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:34.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:34.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:34.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:34.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:34.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:34.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:34.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:34.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:34.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:34.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:34.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:34.072 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:51:39.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:39.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:39.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:39.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:39.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:39.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:39.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:39.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:39.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:39.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:39.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:51:39.120 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:51:39.120 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:51:39.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:39.121 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:39.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:39.122 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:51:39.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:39.123 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:51:39.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:39.126 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:51:39.126 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:51:39.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:39.127 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:39.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:39.128 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:51:39.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:39.128 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:51:39.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:39.130 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:51:39.130 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:51:39.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:39.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:39.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:39.131 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:51:39.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:39.131 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:51:39.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:39.135 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:51:39.136 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:51:39.136 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:51:39.136 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:51:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:39.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:39.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:39.141 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:51:39.619 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:51:39.661 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:51:39.662 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:51:39.663 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:51:39.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:39.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:39.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:39.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:39.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:39.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:39.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:39.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:39.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:39.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:39.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:39.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:39.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:39.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:39.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:40.087 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:51:40.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:40.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:40.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:40.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:40.558 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:51:41.032 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:51:41.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:41.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:41.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:41.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:41.504 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:51:41.976 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:51:42.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:42.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:42.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:42.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:42.447 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:51:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:42.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:42.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:42.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:42.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:42.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:42.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:42.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:42.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:42.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:42.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:42.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:42.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:42.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:42.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:42.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:42.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:42.919 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:51:43.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:43.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:43.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:43.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:43.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:43.389 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:51:43.862 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:51:44.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:44.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:44.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:44.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:44.335 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:51:44.807 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:51:45.278 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:51:45.748 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:51:46.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:46.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:46.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:46.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:46.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:46.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:46.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:46.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:46.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:46.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:46.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:46.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:46.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:46.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:46.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:46.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:46.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:46.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:46.218 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:51:46.690 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:51:47.163 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:51:47.636 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:51:48.107 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:51:48.578 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:51:49.052 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:51:49.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:49.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:49.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:49.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:49.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:49.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:49.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:49.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:49.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:49.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:49.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:49.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:49.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:49.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:49.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:49.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:49.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:49.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:49.524 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:51:49.996 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:51:50.467 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:51:50.941 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:51:51.413 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:51:51.885 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:51:52.356 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:51:52.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:52.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:52.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:52.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:52.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:52.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:52.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:52.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:52.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:52.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:52.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:52.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:52.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:52.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:52.464 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:51:52.464 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2880 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2880 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2880 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2880 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2880 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2880 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2880 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2880 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2881 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2881 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2881 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:52.465 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2881 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:51:57.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:51:57.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:51:57.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:57.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:57.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:57.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:57.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:51:57.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:57.476 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:57.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:51:57.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:51:57.481 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:51:57.481 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:51:57.481 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:57.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:57.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:51:57.482 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:51:57.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:51:57.483 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:51:57.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:57.484 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:51:57.484 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:51:57.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:57.485 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:57.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:51:57.485 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:51:57.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:51:57.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:51:57.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:57.487 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:51:57.487 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:51:57.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:57.487 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:51:57.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:51:57.487 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:51:57.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:51:57.487 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:51:57.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:57.490 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:51:57.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:51:57.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:51:57.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:51:57.490 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:51:57.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:51:57.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:51:57.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:51:57.491 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:51:57.491 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:51:57.491 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:57.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:57.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:51:57.496 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:51:57.974 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:51:58.020 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:51:58.022 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:51:58.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:51:58.025 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:51:58.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:51:58.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:51:58.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:51:58.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:51:58.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:51:58.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:51:58.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:51:58.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:51:58.446 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:51:58.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:58.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:58.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:58.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:58.918 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:51:59.391 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:51:59.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:51:59.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:51:59.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:51:59.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:51:59.863 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:52:00.336 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:52:00.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:00.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:00.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:00.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:00.809 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:52:01.281 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:52:01.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:01.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:01.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:01.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:01.753 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:52:02.224 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:52:02.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:02.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:02.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:02.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:02.698 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:52:03.170 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:52:03.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:52:04.116 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:52:04.588 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:52:05.059 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:52:05.530 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:52:06.004 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:52:06.476 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:52:06.948 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:52:07.422 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:52:07.894 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:52:08.366 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:52:08.837 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:52:09.308 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:52:09.782 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:52:10.254 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:52:10.726 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:52:11.197 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:52:11.670 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:52:11.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:52:11.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:52:11.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:11.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:11.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:11.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:11.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:52:11.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:52:11.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:52:11.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:52:11.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:52:11.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:52:11.953 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:52:16.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:52:16.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:52:16.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:52:16.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:52:16.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:52:16.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:52:16.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:52:16.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:52:16.969 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:52:16.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:52:16.969 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:52:16.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:52:16.972 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:52:16.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:52:16.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:52:16.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:52:16.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:52:16.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:52:16.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:52:16.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:16.975 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:52:16.975 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:52:16.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:52:16.975 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:52:16.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:52:16.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:52:16.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:52:16.975 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:52:16.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:16.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:52:16.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:52:16.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:52:16.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:52:16.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:52:16.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:52:16.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:52:16.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:52:16.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:16.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:52:16.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:52:16.981 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:52:16.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:16.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:16.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:16.985 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:52:17.464 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:52:17.506 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:52:17.508 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:52:17.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:52:17.510 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:52:17.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:52:17.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:52:17.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:52:17.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:52:17.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:52:17.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:52:17.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:52:17.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:52:17.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:52:17.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:52:17.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:52:17.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:52:17.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:52:17.936 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:52:17.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:17.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:17.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:17.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:18.407 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:52:18.880 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:52:18.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:18.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:18.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:18.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:19.353 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:52:19.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:52:19.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:52:19.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:52:19.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:52:19.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:52:19.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:52:19.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:52:19.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:52:19.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:52:19.824 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:52:19.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:19.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:19.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:19.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:20.296 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:52:20.769 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:52:20.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:20.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:20.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:20.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:21.241 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:52:21.713 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:52:21.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:21.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:21.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:21.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:22.184 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:52:22.657 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:52:23.130 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:52:23.601 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:52:24.073 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:52:24.546 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:52:25.018 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:52:25.490 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:52:25.961 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:52:26.435 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:52:26.908 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:52:27.380 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:52:27.853 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:52:28.326 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:52:28.798 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:52:29.269 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:52:29.742 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:52:30.214 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:52:30.686 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:52:31.157 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:52:31.631 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:52:32.103 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:52:32.575 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:52:33.046 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:52:33.519 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:52:33.992 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:52:34.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:52:34.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:52:34.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:52:34.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:34.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:34.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:34.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:34.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:52:34.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:52:34.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:52:34.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:52:34.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:52:34.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:52:34.295 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:52:34.295 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:52:34.295 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:52:34.295 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:52:34.295 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:52:34.295 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:52:34.295 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:52:34.295 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:52:39.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:52:39.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:52:39.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:52:39.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:52:39.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:52:39.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:52:39.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:52:39.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:52:39.305 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:52:39.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:52:39.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:52:39.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:52:39.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:52:39.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:52:39.309 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:52:39.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:52:39.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:52:39.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:52:39.310 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:52:39.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:39.312 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:52:39.312 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:52:39.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:52:39.312 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:52:39.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:52:39.313 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:52:39.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:52:39.313 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:52:39.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:39.314 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:52:39.314 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:52:39.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:52:39.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:52:39.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:52:39.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:52:39.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:52:39.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:52:39.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:39.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:52:39.319 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:52:39.319 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:52:39.319 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:39.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:39.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:52:39.324 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:52:39.802 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:52:39.845 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:52:39.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:52:39.848 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:52:39.850 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:52:39.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:52:39.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:52:39.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:52:39.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:52:39.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:52:39.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:52:39.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:52:39.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:52:40.274 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:52:40.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:40.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:40.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:40.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:40.745 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:52:41.219 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:52:41.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:41.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:41.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:41.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:41.691 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:52:42.163 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:52:42.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:42.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:42.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:42.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:42.634 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:52:43.107 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:52:43.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:43.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:43.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:43.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:43.580 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:52:44.051 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:52:44.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:52:44.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:52:44.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:52:44.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:52:44.523 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:52:44.996 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:52:45.468 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:52:45.940 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:52:46.411 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:52:46.882 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:52:47.353 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:52:47.826 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:52:48.299 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:52:48.770 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:52:49.242 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:52:49.715 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:52:50.187 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:52:50.659 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:52:51.129 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:52:51.601 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:52:52.074 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:52:52.546 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:52:53.018 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:52:53.489 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:52:53.960 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:52:54.433 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:52:54.906 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:52:55.378 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:52:55.849 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:52:56.322 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:52:56.794 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:52:57.266 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:52:57.737 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:52:58.211 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:52:58.683 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:52:59.155 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:52:59.626 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:53:00.099 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:53:00.572 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:53:01.044 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:53:01.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:53:01.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:53:01.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:01.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:01.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:01.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:01.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:53:01.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:53:01.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:53:01.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:53:01.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:53:01.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:53:01.344 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:53:01.344 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.344 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.345 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.346 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.346 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:01.346 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:06.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:53:06.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:53:06.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:53:06.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:53:06.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:53:06.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:53:06.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:53:06.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:53:06.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:53:06.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:53:06.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:53:06.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:53:06.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:53:06.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:53:06.361 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:53:06.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:53:06.361 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:53:06.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:53:06.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:53:06.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:06.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:53:06.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:53:06.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:53:06.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:53:06.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:53:06.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:53:06.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:53:06.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:53:06.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:06.366 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:53:06.366 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:53:06.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:53:06.366 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:53:06.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:53:06.366 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:53:06.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:53:06.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:53:06.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:06.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:53:06.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:53:06.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:53:06.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:53:06.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:53:06.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:53:06.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:53:06.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:53:06.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:53:06.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:53:06.370 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:53:06.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:06.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:06.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:06.375 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:53:06.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:53:06.897 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:53:06.898 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:53:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:53:06.900 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:53:06.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:53:06.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:53:06.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:53:06.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:53:06.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:53:06.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:53:06.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:53:06.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:53:07.319 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:53:07.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:07.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:07.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:07.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:07.790 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:53:08.263 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:53:08.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:08.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:08.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:08.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:08.736 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:53:09.208 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:53:09.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:09.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:09.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:09.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:09.681 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:53:10.153 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:53:10.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:10.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:10.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:10.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:10.625 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:53:11.096 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:53:11.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:11.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:11.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:11.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:11.570 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:53:12.042 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:53:12.514 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:53:12.985 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:53:13.455 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:53:13.929 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:53:14.401 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:53:14.873 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:53:15.344 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:53:15.818 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:53:16.290 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:53:16.762 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:53:17.233 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:53:17.706 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:53:18.178 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:53:18.650 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:53:19.121 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:53:19.595 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:53:20.067 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:53:20.539 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:53:21.012 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:53:21.485 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:53:21.956 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:53:22.430 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:53:22.902 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:53:23.374 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:53:23.845 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:53:24.316 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:53:24.791 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:53:25.263 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:53:25.734 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:53:26.207 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:53:26.680 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:53:27.152 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:53:27.623 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:53:28.096 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:53:28.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:53:28.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:53:28.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:28.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:28.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:28.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:28.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:53:28.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:53:28.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:53:28.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:53:28.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:53:28.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:53:28.394 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:53:28.394 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:28.394 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:28.394 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:28.394 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:28.394 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:28.394 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:28.394 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:53:33.393 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:53:33.393 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:53:33.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:53:33.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:53:33.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:53:33.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:53:33.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:53:33.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:53:33.405 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:53:33.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:53:33.405 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:53:33.408 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:53:33.409 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:53:33.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:53:33.409 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:53:33.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:53:33.410 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:53:33.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:53:33.410 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:53:33.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:33.412 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:53:33.412 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:53:33.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:53:33.412 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:53:33.412 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:53:33.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:53:33.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:53:33.412 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:53:33.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:33.414 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:53:33.414 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:53:33.414 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:53:33.415 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:53:33.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:53:33.415 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:53:33.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:53:33.415 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:53:33.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:33.417 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:53:33.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:53:33.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:53:33.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:53:33.417 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:53:33.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:53:33.418 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:53:33.418 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:53:33.418 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:53:33.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:33.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:53:33.423 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:53:33.901 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:53:33.943 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:53:33.944 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:53:33.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:53:33.945 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:53:33.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:53:33.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:53:33.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:53:33.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:53:33.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:53:33.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:53:33.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:53:33.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:53:34.368 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:53:34.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:34.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:34.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:34.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:34.839 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:53:35.313 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:53:35.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:35.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:35.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:35.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:35.785 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:53:36.257 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:53:36.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:36.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:36.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:36.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:36.731 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:53:37.203 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:53:37.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:37.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:37.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:37.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:37.675 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:53:38.148 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:53:38.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:53:38.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:53:38.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:53:38.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:53:38.617 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:53:39.087 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:53:39.558 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:53:40.031 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:53:40.504 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:53:40.976 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:53:41.450 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:53:41.922 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:53:42.394 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:53:42.867 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:53:43.340 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:53:43.812 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:53:44.283 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:53:44.756 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:53:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:53:45.701 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:53:46.172 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:53:46.645 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:53:47.118 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:53:47.589 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:53:48.061 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:53:48.534 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:53:49.006 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:53:49.478 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:53:49.949 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:53:50.423 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:53:50.895 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:53:51.367 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:53:51.838 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:53:52.312 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:53:52.784 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:53:53.256 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:53:53.728 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:53:54.201 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:53:54.673 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:53:55.144 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:53:55.618 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:53:56.090 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:53:56.562 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:53:57.035 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:53:57.508 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:53:57.980 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:53:58.451 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:53:58.925 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:53:59.397 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:53:59.869 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:54:00.340 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:54:00.813 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:54:01.285 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:54:01.757 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:54:02.228 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:54:02.701 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:54:03.174 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:54:03.646 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:54:04.117 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:54:04.590 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:54:05.063 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:54:05.535 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:54:06.008 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:54:06.481 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 01:54:06.953 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 01:54:07.424 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 01:54:07.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:54:07.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:54:07.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:07.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:07.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:07.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:07.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:07.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:07.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:07.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:07.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:54:07.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:54:07.449 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:54:07.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:07.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:07.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:07.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:07.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:07.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:07.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:12.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:54:12.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:54:12.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:12.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:12.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:12.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:12.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:12.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:54:12.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:12.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:54:12.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:54:12.461 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:54:12.462 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:54:12.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:54:12.462 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:12.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:12.463 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:54:12.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:54:12.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:54:12.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:12.464 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:54:12.464 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:54:12.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:54:12.465 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:12.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:12.465 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:54:12.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:54:12.465 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:54:12.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:12.467 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:54:12.467 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:54:12.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:54:12.467 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:12.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:12.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:54:12.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:54:12.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:54:12.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:54:12.472 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:54:12.472 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:54:12.472 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:12.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:12.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:12.477 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:54:12.955 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:54:12.999 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:54:13.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:54:13.002 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:54:13.004 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:54:13.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:54:13.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:54:13.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:54:13.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:54:13.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:54:13.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:54:13.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:54:13.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:13.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:13.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:13.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:13.901 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:54:14.373 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:54:14.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:14.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:14.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:14.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:14.845 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:54:15.316 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:54:15.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:15.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:15.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:15.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:15.789 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:54:16.262 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:54:16.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:16.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:16.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:16.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:16.733 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:54:17.205 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:54:17.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:17.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:17.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:17.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:17.676 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:54:18.142 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:54:18.612 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:54:19.083 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:54:19.554 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:54:20.027 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:54:20.499 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:54:20.971 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:54:21.445 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:54:21.917 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:54:22.389 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:54:22.860 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:54:23.333 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:54:23.806 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:54:24.278 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:54:24.749 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:54:25.222 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:54:25.695 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:54:26.166 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:54:26.638 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:54:27.111 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:54:27.583 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:54:28.055 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:54:28.526 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:54:29.000 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:54:29.472 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:54:29.944 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:54:30.418 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:54:30.890 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:54:31.362 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:54:31.833 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:54:32.307 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:54:32.779 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:54:33.251 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:54:33.722 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:54:34.195 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:54:34.668 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:54:35.140 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:54:35.611 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:54:36.084 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:54:36.556 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:54:37.028 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:54:37.499 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:54:37.970 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:54:38.443 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:54:38.916 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:54:39.388 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:54:39.859 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:54:40.332 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:54:40.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:54:40.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:54:40.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:40.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:40.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:40.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:40.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:40.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:40.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:40.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:40.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:54:40.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:54:40.500 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6057 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6057 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6057 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6057 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6057 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6057 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6057 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:40.500 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6057 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:45.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:54:45.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:54:45.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:45.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:45.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:45.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:45.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:45.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:54:45.514 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:45.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:54:45.514 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:54:45.516 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:54:45.516 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:54:45.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:54:45.517 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:45.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:45.517 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:54:45.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:54:45.517 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:54:45.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:45.518 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:54:45.518 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:54:45.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:54:45.519 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:45.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:45.519 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:54:45.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:54:45.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:54:45.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:45.520 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:54:45.520 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:54:45.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:54:45.521 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:45.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:45.521 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:54:45.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:54:45.521 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:54:45.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:45.523 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:54:45.523 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:54:45.524 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:54:45.524 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:45.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:45.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:45.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:45.528 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:54:46.007 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:54:46.046 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:54:46.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:54:46.048 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:54:46.049 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:54:46.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:46.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:46.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:46.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:46.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:46.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:46.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:46.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:46.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:54:46.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:54:46.060 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:54:46.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:46.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:46.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:46.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:46.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:46.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:46.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:46.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:54:51.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:54:51.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:51.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:51.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:51.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:51.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:51.074 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:54:51.074 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:51.074 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:54:51.074 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:54:51.077 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:54:51.077 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:54:51.077 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:54:51.077 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:51.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:51.078 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:54:51.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:54:51.078 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:54:51.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:51.081 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:54:51.081 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:54:51.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:54:51.082 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:51.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:51.082 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:54:51.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:54:51.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:54:51.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:51.084 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:54:51.084 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:54:51.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:54:51.084 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:51.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:51.084 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:54:51.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:54:51.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:54:51.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:51.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:54:51.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:54:51.089 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:54:51.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:51.093 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:54:51.571 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:54:51.620 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:54:51.621 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:54:51.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:54:51.623 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:54:51.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:51.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:51.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:51.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:51.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:51.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:51.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:51.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:51.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:54:51.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:54:51.637 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:54:51.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.638 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.638 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.638 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.638 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.638 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.638 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.638 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:51.638 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:56.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:54:56.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:54:56.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:56.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:56.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:56.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:56.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:56.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:54:56.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:56.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:54:56.649 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:54:56.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:54:56.651 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:54:56.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:54:56.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:56.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:56.652 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:54:56.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:54:56.652 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:54:56.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:56.653 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:54:56.653 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:54:56.653 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:54:56.653 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:56.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:56.654 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:54:56.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:54:56.654 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:54:56.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:56.655 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:54:56.655 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:54:56.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:54:56.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:54:56.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:56.655 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:54:56.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:54:56.655 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:54:56.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:56.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:54:56.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:54:56.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:54:56.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:54:56.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:54:56.658 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:54:56.658 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:54:56.658 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:56.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:56.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:54:56.663 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:54:57.141 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:54:57.185 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:54:57.187 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:54:57.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:54:57.189 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:54:57.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:54:57.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:54:57.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:54:57.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:54:57.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:54:57.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:54:57.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:54:57.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:54:57.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:54:57.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:54:57.207 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:54:57.207 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:02.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:55:02.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:55:02.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:02.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:02.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:02.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:02.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:02.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:02.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:02.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:02.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:55:02.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:55:02.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:55:02.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:02.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:02.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:02.225 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:55:02.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:02.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:55:02.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:02.228 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:55:02.228 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:55:02.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:02.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:02.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:02.229 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:55:02.229 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:02.229 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:55:02.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:02.231 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:55:02.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:55:02.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:02.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:02.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:02.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:55:02.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:02.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:55:02.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:02.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:55:02.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:55:02.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:55:02.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:55:02.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:02.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:55:02.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:55:02.236 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:55:02.237 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:02.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:02.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:02.241 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:55:02.720 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:55:02.764 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:55:02.766 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:55:02.768 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:55:02.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:55:02.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:55:02.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:55:02.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:55:02.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:55:02.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:55:02.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:55:02.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:55:02.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:55:03.187 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:55:03.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:03.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:03.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:03.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:03.659 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:55:04.132 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:55:04.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:04.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:04.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:04.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:04.600 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:55:05.071 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:55:05.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:05.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:05.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:05.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:05.545 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:55:06.017 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:55:06.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:06.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:06.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:06.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:06.489 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:55:06.960 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:55:07.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:07.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:07.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:07.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:07.433 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:55:07.905 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:55:08.377 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:55:08.848 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:55:09.321 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:55:09.794 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:55:10.266 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:55:10.739 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:55:10.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:55:10.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:55:10.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:10.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:10.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:10.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:10.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:10.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:10.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:10.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:10.823 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:55:10.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:55:10.823 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:55:10.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:10.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:10.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:10.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:10.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:10.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:10.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:15.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:55:15.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:55:15.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:15.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:15.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:15.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:15.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:15.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:15.835 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:15.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:15.835 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:55:15.837 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:55:15.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:55:15.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:15.837 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:15.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:15.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:55:15.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:15.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:55:15.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:15.839 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:55:15.839 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:55:15.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:15.839 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:15.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:15.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:55:15.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:15.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:55:15.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:15.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:55:15.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:55:15.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:15.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:15.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:15.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:55:15.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:15.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:55:15.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:15.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:55:15.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:55:15.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:55:15.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:55:15.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:55:15.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:55:15.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:55:15.844 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:55:15.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:15.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:15.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:15.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:55:16.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:55:16.370 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:55:16.371 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:55:16.373 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:55:16.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:55:16.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:55:16.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:55:16.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:55:16.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:55:16.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:55:16.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:55:16.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:55:16.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:55:16.799 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:55:16.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:16.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:16.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:16.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:17.271 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:55:17.744 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:55:17.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:17.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:17.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:17.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:18.216 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:55:18.689 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:55:18.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:18.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:18.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:18.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:19.162 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:55:19.635 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:55:19.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:19.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:19.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:19.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:20.107 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:55:20.580 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:55:20.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:20.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:20.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:20.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:21.052 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:55:21.524 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:55:21.997 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:55:22.470 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:55:22.942 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:55:23.413 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:55:23.883 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:55:24.354 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:55:24.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:55:24.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:55:24.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:24.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:24.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:24.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:24.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:24.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:24.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:24.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:24.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:55:24.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:55:24.434 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:55:24.434 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:24.435 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:24.435 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:24.435 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:24.435 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:24.435 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:24.435 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:24.435 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:29.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:55:29.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:55:29.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:29.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:29.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:29.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:29.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:29.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:29.445 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:29.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:29.446 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:55:29.448 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:55:29.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:55:29.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:29.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:29.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:29.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:55:29.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:29.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:55:29.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:29.451 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:55:29.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:55:29.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:29.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:29.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:29.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:55:29.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:29.451 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:55:29.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:29.453 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:55:29.453 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:55:29.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:29.453 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:29.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:29.453 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:55:29.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:29.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:55:29.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:55:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:55:29.457 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:55:29.457 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:55:29.457 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:29.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:29.462 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:55:29.940 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:55:29.986 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:55:29.986 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:55:29.989 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:55:29.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:55:29.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:55:29.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:55:29.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:55:29.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:55:29.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:55:29.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:55:29.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:55:29.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:55:30.412 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:55:30.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:30.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:30.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:30.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:30.883 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:55:31.354 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:55:31.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:31.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:31.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:31.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:31.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:55:32.299 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:55:32.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:32.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:32.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:32.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:32.772 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:55:33.245 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:55:33.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:33.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:33.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:33.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:33.717 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:55:34.189 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:55:34.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:34.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:34.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:34.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:34.660 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:55:35.134 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:55:35.606 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:55:36.078 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:55:36.549 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:55:37.022 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:55:37.495 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:55:37.966 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:55:38.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:55:38.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:55:38.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:38.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:38.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:38.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:38.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:38.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:38.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:38.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:38.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:55:38.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:55:38.048 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:55:38.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:38.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:38.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:38.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:38.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:43.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:55:43.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:55:43.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:43.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:43.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:43.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:43.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:43.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:43.088 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:43.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:43.089 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:55:43.093 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:55:43.093 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:55:43.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:43.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:43.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:43.095 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:55:43.096 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:43.096 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:55:43.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:43.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:55:43.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:55:43.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:43.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:43.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:43.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:55:43.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:43.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:55:43.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:43.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:55:43.104 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:55:43.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:43.104 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:43.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:43.105 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:55:43.105 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:43.105 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:55:43.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:55:43.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:55:43.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:55:43.110 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:55:43.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:43.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:43.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:43.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:43.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:43.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:43.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:43.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:43.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:43.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:43.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:43.115 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:55:43.593 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:55:43.638 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:55:43.640 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:55:43.641 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:55:43.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:55:43.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:55:43.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:55:43.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:55:43.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:55:43.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:55:43.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:55:43.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:55:43.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:55:44.065 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:55:44.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:44.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:44.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:44.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:44.536 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:55:45.010 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:55:45.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:45.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:45.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:45.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:45.482 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:55:45.954 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:55:46.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:46.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:46.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:46.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:46.428 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:55:46.900 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:55:47.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:47.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:47.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:47.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:47.372 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:55:47.843 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:55:48.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:48.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:48.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:48.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:48.316 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:55:48.788 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:55:49.261 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:55:49.734 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:55:50.206 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:55:50.678 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:55:51.149 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:55:51.620 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:55:51.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:55:51.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:55:51.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:51.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:51.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:51.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:51.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:51.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:51.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:51.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:51.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:55:51.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:55:51.699 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:55:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:55:56.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:55:56.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:55:56.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:56.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:56.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:56.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:56.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:55:56.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:56.715 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:56.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:55:56.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:55:56.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:55:56.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:55:56.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:56.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:56.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:55:56.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:55:56.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:55:56.722 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:55:56.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:56.723 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:55:56.723 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:55:56.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:56.723 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:56.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:55:56.724 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:55:56.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:55:56.724 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:55:56.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:56.726 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:55:56.726 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:55:56.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:56.726 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:55:56.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:55:56.726 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:55:56.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:55:56.727 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:55:56.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:56.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:55:56.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:55:56.731 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:55:56.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:56.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:56.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:55:56.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:55:57.214 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:55:57.262 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:55:57.264 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:55:57.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:55:57.267 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:55:57.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:55:57.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:55:57.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:55:57.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:55:57.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:55:57.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:55:57.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:55:57.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:55:57.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:55:57.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:57.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:57.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:57.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:58.158 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:55:58.631 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:55:58.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:58.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:58.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:58.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:55:59.103 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:55:59.575 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:55:59.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:55:59.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:55:59.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:55:59.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:00.046 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:56:00.520 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:56:00.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:00.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:00.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:00.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:00.992 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:56:01.464 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:56:01.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:01.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:01.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:01.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:01.938 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:56:02.410 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:56:02.882 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:56:03.353 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:56:03.826 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:56:04.299 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:56:04.771 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:56:05.242 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:56:05.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:56:05.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:56:05.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:05.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:05.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:05.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:05.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:56:05.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:56:05.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:56:05.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:56:05.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:56:05.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:56:05.323 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:56:10.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:56:10.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:56:10.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:56:10.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:56:10.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:56:10.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:56:10.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:56:10.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:56:10.335 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:10.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:56:10.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:56:10.339 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:56:10.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:56:10.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:56:10.340 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:10.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:56:10.340 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:56:10.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:56:10.341 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:56:10.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:10.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:56:10.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:56:10.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:56:10.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:10.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:56:10.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:56:10.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:56:10.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:56:10.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:10.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:56:10.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:56:10.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:56:10.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:10.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:56:10.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:56:10.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:56:10.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:56:10.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:10.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:10.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:56:10.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:56:10.349 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:56:10.350 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:10.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:10.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:10.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:10.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:10.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:10.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:56:10.833 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:56:10.881 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:56:10.883 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:56:10.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:56:10.885 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:56:10.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:56:10.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:56:10.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:56:10.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:56:10.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:56:10.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:56:10.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:56:10.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:56:11.301 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:56:11.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:11.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:11.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:11.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:11.772 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:56:12.245 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:56:12.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:12.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:12.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:12.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:12.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:56:13.189 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:56:13.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:13.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:13.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:13.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:13.660 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:56:14.134 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:56:14.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:14.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:14.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:14.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:14.606 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:56:15.078 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:56:15.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:15.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:15.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:15.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:15.549 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:56:16.022 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:56:16.495 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:56:16.967 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:56:17.438 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:56:17.911 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:56:18.383 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:56:18.855 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:56:19.326 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:56:19.799 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:56:20.272 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:56:20.744 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:56:21.215 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:56:21.688 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:56:22.160 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:56:22.632 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:56:23.106 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:56:23.578 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:56:24.050 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:56:24.524 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:56:24.996 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:56:25.468 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:56:25.939 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:56:26.412 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:56:26.885 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:56:26.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:56:26.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:56:26.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:26.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:26.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:26.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:26.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:56:26.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:56:26.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:56:26.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:56:26.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:56:26.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:56:26.935 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:56:31.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:56:31.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:56:31.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:56:31.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:56:31.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:56:31.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:56:31.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:56:31.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:56:31.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:31.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:56:31.954 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:56:31.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:56:31.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:56:31.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:56:31.958 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:31.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:56:31.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:56:31.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:56:31.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:56:31.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:31.962 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:56:31.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:56:31.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:56:31.962 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:31.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:56:31.963 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:56:31.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:56:31.963 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:56:31.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:31.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:56:31.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:56:31.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:56:31.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:31.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:56:31.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:56:31.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:56:31.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:56:31.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:31.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:56:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:56:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:56:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:56:31.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:56:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:56:31.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:56:31.969 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:56:31.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:31.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:31.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:31.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:31.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:56:32.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:56:32.497 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:56:32.499 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:56:32.501 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:56:32.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:56:32.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:56:32.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:56:32.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:56:32.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:56:32.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:56:32.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:56:32.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:56:32.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:56:32.919 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:56:32.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:32.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:32.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:32.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:33.390 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:56:33.864 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:56:33.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:33.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:33.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:33.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:34.335 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:56:34.807 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:56:34.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:34.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:34.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:34.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:35.278 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:56:35.752 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:56:35.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:35.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:35.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:35.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:36.224 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:56:36.696 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:56:36.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:36.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:36.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:36.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:37.167 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:56:37.640 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:56:38.112 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:56:38.584 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:56:39.055 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:56:39.528 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:56:40.000 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:56:40.467 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:56:40.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:56:40.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:56:40.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:40.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:40.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:40.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:40.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:56:40.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:56:40.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:56:40.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:56:40.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:56:40.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:56:40.570 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:40.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:56:45.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:56:45.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:56:45.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:56:45.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:56:45.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:56:45.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:56:45.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:56:45.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:56:45.584 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:45.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:56:45.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:56:45.588 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:56:45.588 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:56:45.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:56:45.589 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:45.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:56:45.589 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:56:45.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:56:45.590 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:56:45.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:45.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:56:45.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:56:45.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:56:45.592 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:45.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:56:45.592 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:56:45.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:56:45.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:56:45.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:45.594 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:56:45.594 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:56:45.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:56:45.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:56:45.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:56:45.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:56:45.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:56:45.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:56:45.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:45.596 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:56:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:56:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:56:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:56:45.596 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:56:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:56:45.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:56:45.597 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:56:45.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:56:45.602 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:56:46.081 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:56:46.126 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:56:46.128 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:56:46.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:56:46.131 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:56:46.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:56:46.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:56:46.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:56:46.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:56:46.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:56:46.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:56:46.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:56:46.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:56:46.553 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:56:46.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:46.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:46.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:46.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:47.024 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:56:47.497 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:56:47.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:47.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:47.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:47.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:47.970 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:56:48.442 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:56:48.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:48.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:48.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:48.913 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:56:49.386 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:56:49.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:49.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:49.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:49.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:49.859 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:56:50.331 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:56:50.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:56:50.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:56:50.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:56:50.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:56:50.804 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:56:51.277 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:56:51.749 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:56:52.223 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:56:52.695 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:56:53.167 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:56:53.638 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:56:54.112 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:56:54.584 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:56:55.056 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:56:55.526 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:56:55.998 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:56:56.471 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:56:56.943 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:56:57.415 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:56:57.886 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:56:58.360 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:56:58.832 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:56:59.304 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:56:59.778 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:57:00.250 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:57:00.722 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:57:01.193 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:57:01.666 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:57:02.139 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:57:02.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:02.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:02.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:02.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:02.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:02.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:02.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:02.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:02.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:02.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:02.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:02.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:02.189 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:57:07.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:07.192 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:07.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:07.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:07.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:07.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:07.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:07.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:07.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:07.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:07.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:57:07.207 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:57:07.207 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:57:07.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:07.208 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:07.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:07.208 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:57:07.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:07.208 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:57:07.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:07.210 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:57:07.210 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:57:07.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:07.210 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:07.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:07.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:57:07.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:07.210 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:57:07.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:07.211 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:57:07.211 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:57:07.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:07.211 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:07.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:07.212 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:57:07.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:07.212 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:57:07.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:07.213 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:57:07.214 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:57:07.214 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:57:07.214 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:07.219 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:57:07.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:57:07.739 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:57:07.741 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:57:07.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:57:07.744 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:57:07.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:07.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:07.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:57:07.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:07.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:07.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:07.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:07.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:07.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:07.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:07.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:07.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:07.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:07.788 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:57:07.788 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:07.788 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:07.788 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:07.788 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:07.788 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:07.788 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:07.788 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:12.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:12.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:12.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:12.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:12.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:12.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:12.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:12.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:12.802 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:12.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:12.802 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:57:12.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:57:12.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:57:12.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:12.805 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:12.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:12.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:57:12.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:12.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:57:12.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:12.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:57:12.809 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:57:12.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:12.809 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:12.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:12.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:57:12.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:12.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:57:12.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:12.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:57:12.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:57:12.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:12.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:12.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:12.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:57:12.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:12.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:57:12.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:12.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:57:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:57:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:57:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:57:12.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:12.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:57:12.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:57:12.815 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:57:12.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:12.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:12.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:12.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:12.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:12.820 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:57:13.298 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:57:13.346 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:57:13.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:57:13.348 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:57:13.349 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:57:13.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:13.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:13.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:57:13.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:13.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:13.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:13.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:13.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:13.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:13.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:13.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:13.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:13.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:13.405 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:57:13.405 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:13.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:13.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:13.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:13.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:13.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:13.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:18.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:18.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:18.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:18.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:18.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:18.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:18.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:18.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:18.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:18.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:18.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:57:18.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:57:18.420 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:57:18.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:18.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:18.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:18.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:57:18.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:18.421 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:57:18.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:18.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:57:18.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:57:18.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:18.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:18.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:18.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:57:18.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:18.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:57:18.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:18.424 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:57:18.424 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:57:18.424 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:18.424 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:18.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:18.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:57:18.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:18.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:57:18.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:18.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:57:18.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:57:18.428 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:57:18.428 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:18.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:18.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:18.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:18.432 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:57:18.911 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:57:18.955 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:57:18.956 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:57:18.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:57:18.957 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:57:18.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:18.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:18.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:57:19.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:19.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:19.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:19.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:19.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:19.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:19.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:19.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:19.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:19.007 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:57:19.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:19.007 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:19.007 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:19.007 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:19.007 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:19.007 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:19.007 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:19.007 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:19.007 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:24.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:24.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:24.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:24.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:24.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:24.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:24.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:24.020 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:24.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:24.020 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:57:24.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:57:24.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:57:24.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:24.023 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:24.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:24.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:57:24.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:24.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:57:24.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:24.024 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:57:24.024 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:57:24.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:24.024 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:24.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:24.025 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:57:24.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:24.025 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:57:24.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:24.026 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:57:24.026 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:57:24.026 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:24.026 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:24.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:24.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:57:24.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:24.027 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:57:24.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:57:24.029 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:57:24.029 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:57:24.029 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:24.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:24.034 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:57:24.512 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:57:24.575 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:57:24.577 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:57:24.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:57:24.579 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:57:24.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:24.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:24.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:57:24.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:24.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:24.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:24.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:24.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:24.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:24.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:24.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:24.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:24.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:24.624 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:24.625 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:29.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:29.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:29.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:29.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:29.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:29.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:29.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:29.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:29.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:29.637 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:29.637 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:57:29.639 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:57:29.639 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:57:29.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:29.640 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:29.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:29.641 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:57:29.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:29.641 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:57:29.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:29.642 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:57:29.642 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:57:29.642 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:29.642 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:29.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:29.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:57:29.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:29.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:57:29.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:29.645 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:57:29.645 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:57:29.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:29.645 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:29.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:29.645 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:57:29.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:29.645 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:57:29.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:29.648 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:57:29.648 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:57:29.648 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:57:29.649 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:29.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:29.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:29.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:29.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:29.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:29.653 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:57:30.132 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:57:30.175 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:57:30.177 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:57:30.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:57:30.177 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:57:30.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:30.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:30.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:57:30.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:30.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:30.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:57:30.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:30.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:30.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:30.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:30.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:30.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:30.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:30.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:30.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:30.233 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:57:30.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:30.234 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:35.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:35.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:35.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:35.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:35.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:35.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:35.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:35.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:35.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:35.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:35.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:57:35.251 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:57:35.252 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:57:35.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:35.252 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:35.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:35.253 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:57:35.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:35.253 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:57:35.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:35.254 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:57:35.254 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:57:35.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:35.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:35.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:35.255 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:57:35.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:35.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:57:35.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:35.256 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:57:35.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:57:35.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:35.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:35.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:35.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:57:35.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:35.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:57:35.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:35.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:57:35.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:57:35.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:57:35.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:57:35.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:57:35.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:57:35.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:57:35.260 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:57:35.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:57:35.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:35.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:57:35.743 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:57:35.789 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:57:35.791 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:57:35.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:57:35.794 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:57:35.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:35.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:35.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:57:35.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:35.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:35.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:57:35.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:35.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:35.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:35.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:35.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:35.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:35.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:35.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:35.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:35.846 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:35.846 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:57:35.846 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:35.846 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:35.846 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:35.846 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:35.846 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:35.846 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:35.846 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:57:40.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:57:40.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:57:40.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:40.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:40.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:40.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:40.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:57:40.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:40.861 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:40.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:57:40.861 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:57:40.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:57:40.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:57:40.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:40.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:40.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:57:40.864 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:57:40.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:57:40.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:57:40.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:40.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:57:40.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:57:40.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:40.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:40.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:57:40.868 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:57:40.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:57:40.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:57:40.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:40.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:57:40.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:57:40.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:40.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:57:40.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:57:40.870 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:57:40.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:57:40.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:57:40.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:40.873 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:40.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:57:40.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:57:40.874 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:57:40.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:57:40.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:40.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:57:40.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:40.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:40.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:40.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:57:40.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:57:41.357 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:57:41.407 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:57:41.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:57:41.410 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:57:41.412 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:57:41.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:57:41.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:57:41.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:57:41.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:57:41.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:57:41.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:57:41.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:57:41.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:57:41.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:57:41.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:41.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:41.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:41.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:42.301 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:57:42.774 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:57:42.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:42.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:42.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:42.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:43.247 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:57:43.719 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:57:43.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:43.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:43.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:43.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:44.190 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:57:44.663 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:57:44.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:44.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:44.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:44.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:45.135 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:57:45.607 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:57:45.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:57:45.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:57:45.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:57:45.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:57:46.078 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:57:46.552 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:57:47.024 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:57:47.496 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:57:47.967 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:57:48.440 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:57:48.913 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:57:49.385 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:57:49.858 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 01:57:50.331 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 01:57:50.803 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 01:57:51.273 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 01:57:51.744 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 01:57:52.218 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 01:57:52.690 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 01:57:53.162 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 01:57:53.633 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 01:57:54.106 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 01:57:54.574 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 01:57:55.045 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 01:57:55.519 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 01:57:55.991 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 01:57:56.463 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 01:57:56.934 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 01:57:57.407 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 01:57:57.880 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 01:57:58.352 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 01:57:58.823 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 01:57:59.296 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 01:57:59.769 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 01:58:00.240 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 01:58:00.711 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 01:58:01.185 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 01:58:01.657 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 01:58:02.129 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 01:58:02.600 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 01:58:03.073 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 01:58:03.546 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 01:58:04.018 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 01:58:04.489 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 01:58:04.962 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 01:58:05.434 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 01:58:05.906 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 01:58:06.377 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 01:58:06.851 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 01:58:07.323 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 01:58:07.795 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 01:58:08.266 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 01:58:08.736 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 01:58:09.207 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 01:58:09.681 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 01:58:10.153 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 01:58:10.625 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 01:58:11.096 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 01:58:11.570 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 01:58:12.042 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 01:58:12.514 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 01:58:12.985 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 01:58:13.458 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 01:58:13.931 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 01:58:14.402 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 01:58:14.873 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 01:58:14.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:58:14.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:58:14.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:14.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:14.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:14.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:14.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:14.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:14.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:14.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:58:14.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:58:14.900 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:58:14.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7352 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7352 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7352 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:14.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:19.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:58:19.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:58:19.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:19.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:19.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:19.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:19.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:19.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:58:19.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:19.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:58:19.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:58:19.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:58:19.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:58:19.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:58:19.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:19.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:19.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:58:19.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:58:19.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:58:19.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:19.920 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:58:19.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:58:19.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:58:19.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:19.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:19.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:58:19.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:58:19.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:58:19.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:19.922 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:58:19.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:58:19.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:58:19.922 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:19.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:19.922 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:58:19.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:58:19.922 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:58:19.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:19.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:58:19.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:58:19.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:58:19.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:58:19.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:58:19.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:58:19.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:58:19.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:58:19.925 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:58:19.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:19.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:19.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:19.930 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:58:20.408 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:58:20.454 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:58:20.456 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:58:20.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:58:20.459 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:58:20.879 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:58:20.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:20.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:20.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:20.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:21.353 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:58:21.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:58:21.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:21.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:21.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:21.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:22.297 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:58:22.773 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:58:22.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:22.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:22.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:22.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:23.244 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:58:23.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:58:23.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:23.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:23.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:23.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:23.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:23.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:23.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:23.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:23.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:58:23.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:58:23.494 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:58:23.494 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:23.494 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:23.494 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:23.494 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:23.494 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:23.494 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:23.494 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:28.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:58:28.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:58:28.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:28.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:28.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:28.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:28.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:28.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:58:28.506 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:28.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:58:28.507 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:58:28.509 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:58:28.509 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:58:28.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:58:28.510 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:28.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:28.511 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:58:28.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:58:28.511 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:58:28.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:28.512 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:58:28.512 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:58:28.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:58:28.512 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:28.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:28.512 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:58:28.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:58:28.513 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:58:28.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:28.514 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:58:28.514 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:58:28.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:58:28.514 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:28.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:28.515 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:58:28.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:58:28.515 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:58:28.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:28.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:58:28.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:58:28.518 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:58:28.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:28.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:28.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:28.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:58:29.001 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:58:29.045 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:58:29.048 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:58:29.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:58:29.050 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:58:29.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:58:29.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:29.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:29.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:29.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:29.948 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:58:30.420 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:58:30.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:30.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:30.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:30.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:30.895 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:58:31.367 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:58:31.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:31.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:31.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:31.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:31.840 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:58:32.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:58:32.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:32.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:32.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:32.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:32.785 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:58:33.258 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:58:33.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:33.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:33.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:33.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:33.731 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:58:34.203 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:58:34.676 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:58:35.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:35.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:35.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:35.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:35.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:35.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:35.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:35.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:35.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:58:35.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:58:35.066 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1413 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1413 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:35.066 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:40.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:58:40.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:58:40.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:40.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:40.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:40.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:40.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:40.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:58:40.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:40.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:58:40.080 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:58:40.080 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:58:40.080 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:58:40.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:58:40.080 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:40.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:40.080 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:58:40.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:58:40.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:58:40.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:40.081 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:58:40.081 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:58:40.081 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:58:40.081 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:40.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:40.082 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:58:40.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:58:40.082 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:58:40.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:40.083 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:58:40.083 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:58:40.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:58:40.083 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:40.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:40.084 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:58:40.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:58:40.084 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:58:40.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:58:40.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:58:40.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:58:40.087 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:58:40.087 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:40.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:40.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:40.092 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:58:40.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:58:40.614 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:58:40.616 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:58:40.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:58:40.619 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:58:41.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:58:41.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:41.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:41.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:41.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:41.514 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:58:41.988 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:58:42.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:42.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:42.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:42.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:42.459 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:58:42.933 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:58:43.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:43.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:43.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:43.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:43.405 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:58:43.877 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:58:44.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:44.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:44.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:44.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:44.350 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:58:44.823 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:58:45.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:45.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:45.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:45.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:45.295 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:58:45.770 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:58:46.242 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:58:46.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:46.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:46.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:46.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:46.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:46.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:46.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:46.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:58:46.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:58:46.637 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:58:46.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:51.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:58:51.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:58:51.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:51.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:51.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:51.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:51.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:51.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:58:51.647 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:51.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:58:51.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:58:51.649 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:58:51.650 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:58:51.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:58:51.650 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:51.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:51.651 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:58:51.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:58:51.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:58:51.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:51.652 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:58:51.652 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:58:51.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:58:51.652 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:51.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:51.652 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:58:51.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:58:51.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:58:51.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:51.654 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:58:51.654 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:58:51.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:58:51.654 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:58:51.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:51.654 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:58:51.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:58:51.654 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:58:51.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:51.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:58:51.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:58:51.657 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:58:51.658 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:51.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:58:51.662 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:58:52.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:58:52.184 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:58:52.185 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:58:52.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:58:52.187 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:58:52.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:58:52.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:52.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:52.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:52.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:53.087 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:58:53.559 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:58:53.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:53.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:53.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:53.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:54.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:58:54.506 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:58:54.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:54.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:54.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:54.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:54.980 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:58:55.452 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:58:55.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:55.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:55.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:55.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:55.924 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:58:56.397 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:58:56.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:56.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:56.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:56.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:56.870 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:58:57.342 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:58:57.817 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:58:58.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:58:58.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:58:58.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:58:58.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:58:58.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:58:58.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:58:58.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:58:58.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:58:58.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:58:58.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:58:58.201 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:58:58.201 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:03.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:03.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:03.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:03.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:03.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:03.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:03.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:03.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:03.217 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:03.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:03.217 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:59:03.219 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:59:03.219 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:59:03.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:03.220 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:03.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:03.220 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:59:03.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:03.220 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:59:03.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:03.221 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:59:03.221 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:59:03.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:03.221 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:03.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:03.222 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:59:03.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:03.222 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:59:03.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:03.223 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:59:03.223 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:59:03.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:03.223 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:03.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:03.224 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:59:03.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:03.224 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:59:03.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:03.226 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:59:03.226 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:59:03.226 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:59:03.226 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:03.231 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:59:03.710 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:59:03.755 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:59:03.758 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:59:03.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:03.760 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:59:04.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:59:04.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:04.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:04.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:04.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:04.657 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:59:05.129 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:59:05.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:05.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:05.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:05.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:05.602 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:59:06.065 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:59:06.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:06.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:06.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:06.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:06.529 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:59:06.992 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:59:07.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:07.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:07.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:07.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:07.455 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:59:07.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:07.919 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 01:59:08.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:08.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:08.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:08.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:08.382 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 01:59:08.845 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 01:59:09.315 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 01:59:09.788 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 01:59:10.261 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 01:59:10.733 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 01:59:11.208 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 01:59:11.680 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 01:59:11.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:11.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:11.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:11.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:11.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:11.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:11.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:11.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:11.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:11.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:11.784 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:11.784 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:16.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:16.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:16.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:16.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:16.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:16.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:16.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:16.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:16.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:16.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:16.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:59:16.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:59:16.797 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:59:16.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:16.797 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:16.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:16.797 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:59:16.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:16.797 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:59:16.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:16.800 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:59:16.800 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:59:16.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:16.800 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:16.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:16.800 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:59:16.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:16.800 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:59:16.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:16.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:59:16.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:59:16.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:16.803 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:16.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:16.803 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:59:16.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:16.803 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:59:16.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:16.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:59:16.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:59:16.807 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:59:16.807 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:16.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:16.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:59:17.289 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:59:17.337 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:59:17.339 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:59:17.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:17.341 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:59:17.761 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:59:17.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:17.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:17.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:17.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:18.237 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:59:18.709 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:59:18.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:18.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:18.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:18.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:19.183 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:59:19.655 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:59:19.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:19.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:19.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:19.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:20.126 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:59:20.599 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:59:20.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:20.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:20.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:20.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:21.073 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:59:21.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:21.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:21.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:21.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:21.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:21.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:21.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:21.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:21.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:21.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:21.358 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:59:26.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:26.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:26.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:26.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:26.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:26.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:26.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:26.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:26.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:26.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:26.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:59:26.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:59:26.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:59:26.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:26.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:26.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:26.380 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:59:26.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:26.380 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:59:26.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:26.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:59:26.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:59:26.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:26.384 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:26.384 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:59:26.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:26.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:26.384 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:59:26.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:26.388 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:59:26.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:59:26.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:26.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:26.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:59:26.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:26.389 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:26.389 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:59:26.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:26.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:59:26.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:59:26.394 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:59:26.394 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:26.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:26.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:26.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:26.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:26.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:26.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:26.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:26.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:26.399 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:59:26.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:59:26.926 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:59:26.929 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:59:26.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:26.931 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:59:26.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:26.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:26.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:26.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:26.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:26.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:26.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:26.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:26.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:26.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:26.950 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:59:26.951 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:26.951 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:26.951 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:26.951 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:26.951 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:26.951 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:26.951 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:26.951 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:31.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:31.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:31.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:31.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:31.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:31.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:31.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:31.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:31.962 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:31.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:31.963 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:59:31.966 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:59:31.967 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:59:31.967 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:31.967 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:31.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:31.968 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:59:31.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:31.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:59:31.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:31.970 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:59:31.970 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:59:31.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:31.970 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:31.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:31.970 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:59:31.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:31.970 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:59:31.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:31.973 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:59:31.973 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:59:31.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:31.973 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:31.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:31.973 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:59:31.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:31.973 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:59:31.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:31.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:59:31.977 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:59:31.977 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:59:31.977 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:31.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:31.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:31.982 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:59:32.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:59:32.505 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:59:32.507 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:59:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:32.509 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:59:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:32.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:32.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:32.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:32.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:32.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:32.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:32.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:32.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:32.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:32.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:32.523 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:59:32.524 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:32.524 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:32.524 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:32.524 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:32.524 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:32.524 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:32.524 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:37.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:37.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:37.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:37.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:37.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:37.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:37.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:37.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:37.536 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:37.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:37.536 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:59:37.539 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:59:37.539 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:59:37.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:37.540 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:37.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:37.540 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:59:37.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:37.540 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:59:37.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:37.542 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:59:37.543 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:59:37.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:37.543 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:37.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:37.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:59:37.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:37.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:59:37.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:37.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:59:37.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:59:37.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:37.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:37.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:37.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:59:37.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:37.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:59:37.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:59:37.548 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:59:37.548 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:59:37.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:59:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:37.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:59:38.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:59:38.080 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:59:38.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:38.083 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:59:38.086 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:59:38.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:38.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:38.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:38.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:38.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:38.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:38.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:38.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:38.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:38.102 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:59:38.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:38.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:38.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:38.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:38.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:38.103 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:38.103 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:43.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:43.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:43.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:43.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:43.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:43.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:43.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:43.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:43.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:43.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:43.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:59:43.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:59:43.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:59:43.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:43.116 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:43.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:43.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:59:43.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:43.117 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:59:43.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:43.118 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:59:43.118 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:59:43.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:43.118 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:43.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:43.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:59:43.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:43.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:59:43.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:43.120 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:59:43.120 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:59:43.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:43.120 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:43.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:43.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:59:43.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:43.121 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:59:43.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:43.123 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:59:43.123 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:59:43.124 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:59:43.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:43.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:43.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:43.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:43.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:43.128 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:59:43.607 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:59:43.656 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:59:43.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:43.658 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:59:43.660 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:59:43.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:59:43.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:59:43.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:59:43.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:59:43.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:59:43.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:59:43.671 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:59:43.671 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:59:44.074 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:59:44.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:44.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:44.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:44.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:44.545 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:59:45.019 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:59:45.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:45.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:45.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:45.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:45.491 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:59:45.963 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:59:46.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:46.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:46.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:46.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:46.434 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:59:46.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:59:46.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:59:46.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:59:46.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:59:46.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:59:46.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:59:46.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:46.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:46.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:46.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:46.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:46.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:46.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:46.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:46.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:46.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:46.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:46.770 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:59:46.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=789 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:46.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:46.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:46.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:46.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:46.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:46.771 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:51.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:51.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:51.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:51.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:51.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:51.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:51.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:51.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:51.786 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:51.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 01:59:51.787 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 01:59:51.790 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 01:59:51.790 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 01:59:51.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:51.791 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:51.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:51.791 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 01:59:51.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 01:59:51.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 01:59:51.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:51.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 01:59:51.793 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 01:59:51.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:51.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:51.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:51.793 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 01:59:51.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 01:59:51.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 01:59:51.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:51.795 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 01:59:51.795 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 01:59:51.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:51.795 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 01:59:51.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:51.795 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 01:59:51.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 01:59:51.795 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 01:59:51.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:51.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 01:59:51.799 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 01:59:51.799 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 01:59:51.799 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 01:59:51.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:51.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 01:59:51.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:51.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:51.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:51.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 01:59:51.803 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 01:59:52.282 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 01:59:52.322 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 01:59:52.323 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 01:59:52.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:52.326 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 01:59:52.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:59:52.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:59:52.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 01:59:52.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:59:52.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:59:52.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:59:52.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 01:59:52.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 01:59:52.749 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 01:59:52.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:52.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:52.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:52.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:53.221 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 01:59:53.694 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 01:59:53.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:53.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:53.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:53.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:54.166 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 01:59:54.638 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 01:59:54.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:54.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:54.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:54.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:55.112 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 01:59:55.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 01:59:55.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 01:59:55.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:59:55.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 01:59:55.584 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 01:59:55.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:55.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:55.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:55.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:56.056 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 01:59:56.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 01:59:56.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 01:59:56.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 01:59:56.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 01:59:56.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 01:59:56.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 01:59:56.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 01:59:56.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 01:59:56.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 01:59:56.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 01:59:56.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 01:59:56.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 01:59:56.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 01:59:56.077 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 01:59:56.078 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:56.078 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:56.078 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:56.078 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:56.078 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:56.078 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:56.078 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 01:59:56.078 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:01.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:01.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:01.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:01.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:01.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:01.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:01.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:01.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:01.091 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:01.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:01.091 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:00:01.094 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:00:01.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:00:01.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:01.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:01.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:01.095 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:00:01.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:01.095 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:00:01.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:01.097 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:00:01.097 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:00:01.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:01.097 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:01.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:01.097 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:00:01.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:01.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:00:01.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:01.099 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:00:01.099 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:00:01.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:01.099 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:01.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:01.099 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:00:01.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:01.099 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:00:01.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:01.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:00:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:00:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:00:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:00:01.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:00:01.102 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:00:01.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:01.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:01.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:01.107 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:00:01.585 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:00:01.625 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:00:01.626 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:00:01.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:00:01.628 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:00:01.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:01.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:01.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:00:01.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:01.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:01.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:01.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:00:01.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:00:02.052 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:00:02.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:02.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:02.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:02.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:02.523 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:00:02.997 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:00:03.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:03.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:03.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:03.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:03.469 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:00:03.941 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:00:04.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:04.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:04.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:04.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:04.412 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:00:04.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:04.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:04.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:04.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:04.886 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:00:05.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:05.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:05.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:05.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:05.358 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:00:05.830 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:00:06.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:06.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:06.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:06.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:06.304 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:00:06.776 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:00:07.248 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:00:07.722 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:00:08.194 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:00:08.666 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:00:09.137 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:00:09.610 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:00:09.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:09.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:09.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:00:09.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:09.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:09.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:09.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:09.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:09.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:09.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:09.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:09.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:09.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:09.719 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:00:09.720 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:09.720 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:09.720 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:09.720 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:09.720 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:09.720 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:09.720 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:14.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:14.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:14.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:14.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:14.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:14.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:14.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:14.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:14.730 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:14.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:14.730 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:00:14.733 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:00:14.733 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:00:14.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:14.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:14.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:14.734 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:00:14.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:14.734 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:00:14.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:14.736 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:00:14.736 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:00:14.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:14.736 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:14.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:14.737 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:00:14.737 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:14.737 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:00:14.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:14.739 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:00:14.739 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:00:14.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:14.739 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:14.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:14.739 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:00:14.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:14.739 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:00:14.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:14.742 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:00:14.742 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:00:14.742 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:00:14.743 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:14.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:14.747 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:00:15.226 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:00:15.270 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:00:15.272 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:00:15.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:00:15.274 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:00:15.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:15.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:15.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:00:15.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:15.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:15.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:15.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:00:15.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:00:15.693 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:00:15.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:15.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:15.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:15.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:16.164 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:00:16.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:00:16.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:16.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:16.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:16.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:17.110 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:00:17.582 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:00:17.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:17.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:17.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:17.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:18.056 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:00:18.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:18.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:18.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:18.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:18.528 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:00:18.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:18.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:18.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:18.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:19.000 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:00:19.471 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:00:19.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:19.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:19.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:19.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:19.945 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:00:20.417 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:00:20.889 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:00:21.360 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:00:21.833 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:00:22.306 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:00:22.778 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:00:23.249 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:00:23.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:23.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:00:23.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:23.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:23.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:23.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:23.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:23.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:23.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:23.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:23.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:23.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:23.360 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:00:23.361 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:23.361 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:23.361 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:23.361 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:23.361 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:23.361 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:23.361 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:28.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:28.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:28.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:28.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:28.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:28.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:28.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:28.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:28.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:28.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:28.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:00:28.379 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:00:28.379 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:00:28.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:28.380 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:28.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:28.380 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:00:28.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:28.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:00:28.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:28.382 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:00:28.382 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:00:28.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:28.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:28.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:28.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:00:28.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:28.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:00:28.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:28.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:00:28.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:00:28.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:28.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:28.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:28.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:00:28.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:28.384 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:00:28.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:28.387 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:00:28.387 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:00:28.387 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:00:28.387 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:28.392 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:00:28.870 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:00:28.918 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:00:28.920 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:00:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:00:28.922 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:00:28.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:28.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:28.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:00:28.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:28.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:28.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:28.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:00:28.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:00:29.337 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:00:29.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:29.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:29.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:29.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:29.808 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:00:30.279 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:00:30.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:30.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:30.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:30.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:30.752 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:00:31.225 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:00:31.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:31.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:31.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:31.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:31.697 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:00:31.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:31.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:31.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:31.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:32.168 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:00:32.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:32.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:32.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:32.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:32.641 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:00:33.114 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:00:33.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:33.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:33.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:33.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:33.585 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:00:34.056 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:00:34.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:00:35.001 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:00:35.473 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:00:35.945 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:00:36.416 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:00:36.889 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:00:36.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:36.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:36.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:00:37.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:37.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:37.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:37.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:37.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:37.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:37.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:37.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:37.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:37.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:37.004 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:00:37.004 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1863 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:37.004 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1863 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:37.004 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:37.004 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:37.004 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:37.004 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:37.004 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:37.005 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:42.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:42.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:42.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:42.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:42.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:42.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:42.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:42.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:42.030 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:42.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:42.030 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:00:42.034 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:00:42.035 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:00:42.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:42.036 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:42.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:42.037 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:00:42.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:42.037 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:00:42.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:42.040 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:00:42.041 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:00:42.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:42.041 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:42.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:42.042 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:00:42.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:42.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:00:42.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:42.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:00:42.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:00:42.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:42.045 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:42.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:42.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:00:42.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:42.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:00:42.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:42.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:00:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:00:42.052 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:00:42.052 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:00:42.052 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:42.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:42.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:42.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:42.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:42.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:42.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:42.057 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:00:42.536 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:00:42.575 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:00:42.576 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:00:42.577 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:00:42.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:00:42.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:42.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:42.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:00:42.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:42.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:42.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:42.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:00:42.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:00:42.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:42.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:42.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:42.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:43.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:00:43.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:43.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:43.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:43.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:43.479 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:00:43.953 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:00:44.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:44.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:44.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:44.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:44.424 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:00:44.896 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:00:45.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:45.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:45.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:45.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:45.367 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:00:45.841 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:00:46.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:46.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:46.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:46.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:46.313 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:00:46.785 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:00:47.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:47.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:47.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:47.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:47.256 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:00:47.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:47.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:47.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:47.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:47.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:47.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:47.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:47.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:47.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:47.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:47.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:47.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:47.645 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:00:47.645 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1208 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:47.645 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:47.645 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:47.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:47.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:47.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:47.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:00:52.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:52.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:52.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:52.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:52.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:52.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:52.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:52.656 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:52.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:52.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:00:52.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:00:52.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:00:52.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:00:52.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:52.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:52.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:52.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:00:52.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:00:52.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:00:52.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:52.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:00:52.664 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:00:52.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:52.664 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:52.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:52.665 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:00:52.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:00:52.665 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:00:52.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:52.666 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:00:52.666 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:00:52.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:52.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:00:52.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:52.667 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:00:52.667 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:00:52.667 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:00:52.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:52.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:52.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:00:52.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:00:52.670 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:00:52.671 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:00:52.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:52.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:00:52.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:52.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:52.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:52.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:00:52.675 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:00:53.152 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:00:53.205 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:00:53.207 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:00:53.209 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:00:53.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:00:53.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:53.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:53.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:00:53.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:53.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:53.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:53.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:00:53.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:00:53.623 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:00:53.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:53.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:53.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:53.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:54.095 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:00:54.566 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:00:54.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:54.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:54.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:54.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:55.039 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:00:55.511 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:00:55.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:55.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:55.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:55.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:55.983 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:00:56.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:00:56.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:00:56.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:56.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:00:56.454 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:00:56.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:56.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:56.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:56.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:56.928 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:00:57.400 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:00:57.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:57.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:57.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:57.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:57.872 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:00:58.343 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:00:58.813 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:00:58.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:00:58.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:00:58.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:00:58.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:00:58.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:00:58.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:00:58.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:00:58.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:00:58.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:00:58.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:00:58.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:00:58.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:00:58.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:00:58.870 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:01:03.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:03.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:03.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:03.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:03.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:03.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:03.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:03.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:03.874 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:03.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:03.874 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:01:03.875 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:01:03.875 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:01:03.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:03.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:03.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:03.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:01:03.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:03.875 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:01:03.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:03.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:01:03.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:01:03.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:03.876 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:03.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:03.876 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:01:03.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:03.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:01:03.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:03.877 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:01:03.877 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:01:03.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:03.877 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:03.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:03.877 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:01:03.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:03.877 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:01:03.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:03.878 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:01:03.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:01:03.879 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:01:03.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:03.883 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:01:04.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:01:04.390 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:01:04.391 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:01:04.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:01:04.392 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:01:04.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:04.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:04.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:01:04.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:01:04.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:01:04.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:01:04.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:01:04.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:01:04.809 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:01:04.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:04.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:04.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:04.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:05.275 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:01:05.741 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:01:05.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:05.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:05.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:05.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:06.207 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:01:06.674 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:01:06.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:06.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:06.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:06.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:07.139 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:01:07.604 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:01:07.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:07.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:07.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:01:07.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:07.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:07.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:07.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:07.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:07.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:07.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:07.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:07.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:07.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:07.635 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:01:12.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:12.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:12.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:12.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:12.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:12.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:12.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:12.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:12.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:12.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:12.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:01:12.641 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:01:12.641 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:01:12.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:12.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:12.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:12.642 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:01:12.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:12.642 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:01:12.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:12.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:01:12.643 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:01:12.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:12.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:12.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:12.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:01:12.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:12.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:01:12.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:12.644 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:01:12.644 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:01:12.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:12.644 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:12.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:12.644 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:01:12.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:12.644 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:01:12.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:12.646 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:01:12.646 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:01:12.647 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:01:12.647 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:12.651 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:01:13.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:01:13.160 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:01:13.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:01:13.169 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:01:13.170 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:01:13.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:13.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:13.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:01:13.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:01:13.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:01:13.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:01:13.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:01:13.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:01:13.578 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:01:13.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:13.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:13.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:13.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:14.043 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:01:14.506 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:01:14.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:14.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:14.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:14.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:14.969 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:01:15.432 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:01:15.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:15.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:15.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:15.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:15.895 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:01:16.358 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:01:16.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:16.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:16.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:16.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:16.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:16.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:01:16.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:16.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:16.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:16.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:16.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:16.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:16.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:16.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:16.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:16.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:16.672 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:01:21.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:21.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:21.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:21.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:21.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:21.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:21.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:21.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:21.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:21.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:21.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:01:21.679 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:01:21.679 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:01:21.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:21.679 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:21.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:01:21.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:21.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:21.680 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:01:21.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:21.681 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:01:21.681 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:01:21.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:21.681 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:21.681 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:01:21.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:21.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:21.681 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:01:21.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:21.682 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:01:21.682 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:01:21.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:21.682 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:21.682 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:01:21.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:21.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:21.682 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:01:21.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:21.684 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:01:21.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:01:21.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:01:21.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:01:21.684 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:01:21.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:01:21.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:01:21.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:01:21.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:01:21.685 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:01:21.685 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:01:21.685 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:21.689 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:01:22.155 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:01:22.197 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:01:22.198 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:01:22.198 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:01:22.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:01:22.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:22.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:22.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:01:22.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:01:22.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:01:22.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:01:22.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:01:22.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:01:22.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:22.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:22.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:22.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:22.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:22.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:22.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:22.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:22.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:22.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:22.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:22.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:22.472 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:01:27.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:27.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:27.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:27.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:27.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:27.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:27.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:27.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:27.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:27.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:27.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:01:27.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:01:27.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:01:27.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:27.484 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:27.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:27.484 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:01:27.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:27.484 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:01:27.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:27.486 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:01:27.486 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:01:27.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:27.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:27.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:27.486 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:01:27.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:27.486 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:01:27.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:27.488 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:01:27.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:01:27.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:27.488 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:27.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:27.489 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:01:27.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:27.489 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:01:27.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:27.491 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:01:27.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:01:27.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:01:27.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:01:27.491 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:01:27.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:01:27.492 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:01:27.492 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:01:27.492 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:27.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:27.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:27.497 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:01:27.961 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:01:28.011 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:01:28.012 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:01:28.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:01:28.013 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:01:28.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:28.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:28.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:01:28.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:01:28.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:01:28.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:01:28.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:01:28.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:01:28.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:28.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:28.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:28.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:28.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:28.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:28.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:28.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:28.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:28.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:28.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:28.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:28.232 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:01:33.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:33.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:33.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:33.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:33.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:33.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:33.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:33.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:33.237 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:33.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:33.237 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:01:33.238 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:01:33.238 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:01:33.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:33.238 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:33.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:33.238 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:01:33.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:33.238 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:01:33.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:33.239 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:01:33.239 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:01:33.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:33.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:33.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:33.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:01:33.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:33.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:01:33.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:33.240 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:01:33.240 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:01:33.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:33.240 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:33.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:33.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:01:33.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:33.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:01:33.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:33.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:01:33.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:01:33.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:01:33.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:01:33.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:01:33.242 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:01:33.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:33.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:33.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:33.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:33.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:33.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:33.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:33.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:33.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:33.247 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:01:33.710 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:01:33.755 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:01:33.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:01:33.756 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:01:33.756 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:01:33.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:33.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:33.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:01:33.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:01:33.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:01:33.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:01:33.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:01:33.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:01:34.173 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:01:34.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:34.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:34.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:34.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:34.637 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:01:35.100 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:01:35.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:35.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:35.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:35.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:35.563 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:01:36.025 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:01:36.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:36.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:36.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:36.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:36.488 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:01:36.950 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:01:37.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:37.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:37.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:37.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:37.412 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:01:37.874 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:01:38.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:38.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:38.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:38.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:38.336 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:01:38.798 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:01:39.260 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:01:39.722 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:01:40.184 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:01:40.646 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:01:41.108 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:01:41.572 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:01:42.039 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:01:42.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:42.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:42.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:42.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:42.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:42.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:42.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:42.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:42.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:42.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:42.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:42.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:42.367 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:01:47.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:47.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:47.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:47.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:47.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:47.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:47.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:47.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:47.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:47.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:01:47.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:01:47.373 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:01:47.374 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:01:47.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:47.374 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:47.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:47.374 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:01:47.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:01:47.374 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:01:47.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:47.374 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:01:47.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:01:47.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:47.375 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:47.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:47.375 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:01:47.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:01:47.375 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:01:47.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:47.375 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:01:47.375 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:01:47.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:47.376 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:01:47.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:47.376 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:01:47.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:01:47.376 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:01:47.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:01:47.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:01:47.377 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:01:47.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:47.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:01:47.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:01:47.846 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:01:47.890 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:01:47.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:01:47.891 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:01:47.892 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:01:47.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:47.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:47.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:01:47.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:01:47.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:01:47.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:01:47.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:01:47.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:01:48.309 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:01:48.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:48.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:48.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:48.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:48.771 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:01:49.233 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:01:49.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:49.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:49.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:49.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:49.695 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:01:50.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:01:50.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:50.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:50.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:50.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:50.619 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:01:51.081 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:01:51.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:51.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:51.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:51.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:51.543 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:01:52.005 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:01:52.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:52.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:52.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:52.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:52.467 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:01:52.931 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:01:53.397 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:01:53.863 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:01:54.329 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:01:54.794 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:01:55.256 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:01:55.718 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:01:56.180 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:01:56.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:01:56.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:01:56.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:01:56.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:01:56.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:01:56.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:01:56.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:01:56.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:01:56.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:01:56.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:01:56.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:01:56.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:01:56.531 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:02:01.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:01.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:01.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:01.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:01.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:01.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:01.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:01.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:01.536 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:01.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:01.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:02:01.537 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:02:01.537 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:02:01.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:01.538 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:01.538 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:01.538 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:01.538 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:02:01.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:01.539 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:02:01.539 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:02:01.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:01.539 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:01.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:01.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:02:01.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:01.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:02:01.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:02:01.541 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:02:01.541 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:02:01.541 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:01.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:01.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:01.546 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:02:02.012 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:02:02.053 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:02:02.053 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:02:02.054 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:02.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:02.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:02:02.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:02:02.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:02:02.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:02:02.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:02:02.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:02:02.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:02:02.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:02:02.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:02:02.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:02.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:02.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:02.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:02.936 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:02:03.398 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:02:03.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:03.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:03.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:03.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:03.860 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:02:04.323 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:02:04.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:04.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:04.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:04.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:04.785 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:02:05.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:02:05.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:02:05.123 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:02:05.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:02:05.170 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.211 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.247 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:02:05.247 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.280 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.322 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.359 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.400 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.442 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.479 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.520 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:05.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:05.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:05.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:05.562 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.599 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:05.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:02:05.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:02:05.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:05.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:05.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:05.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:05.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:05.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:05.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:05.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:05.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:05.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:05.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:05.643 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:02:10.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:10.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:10.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:10.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:10.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:10.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:10.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:10.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:10.650 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:10.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:10.650 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:02:10.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:02:10.651 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:02:10.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:10.651 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:10.651 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:02:10.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:10.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:10.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:02:10.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:10.652 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:02:10.652 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:02:10.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:10.652 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:10.653 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:02:10.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:10.653 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:10.653 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:02:10.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:10.654 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:02:10.654 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:02:10.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:10.654 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:10.654 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:02:10.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:10.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:10.654 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:02:10.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:02:10.656 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:02:10.656 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:02:10.656 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:10.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:10.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:10.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:10.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:10.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:10.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:10.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:10.661 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:02:11.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:02:11.169 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:02:11.170 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:02:11.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:11.170 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:11.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:11.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:11.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:11.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:11.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:11.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:11.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:11.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:11.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:11.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:11.210 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:02:16.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:16.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:16.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:16.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:16.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:16.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:16.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:16.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:16.228 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:16.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:16.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:02:16.229 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:02:16.229 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:02:16.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:16.230 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:16.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:16.230 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:02:16.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:16.230 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:02:16.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:16.232 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:02:16.232 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:02:16.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:16.232 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:16.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:02:16.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:16.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:16.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:02:16.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:16.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:02:16.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:02:16.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:16.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:16.234 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:02:16.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:16.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:16.234 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:02:16.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:16.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:02:16.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:02:16.236 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:02:16.237 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:16.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:16.241 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:02:16.720 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:02:16.764 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:02:16.767 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:02:16.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:16.769 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:17.191 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:02:17.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:17.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:17.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:17.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:17.665 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:02:18.138 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:02:18.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:18.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:18.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:18.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:18.609 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:02:19.082 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:02:19.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:19.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:19.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:19.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:19.554 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:02:20.018 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:02:20.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:20.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:20.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:20.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:20.482 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:02:20.945 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:02:21.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:21.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:21.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:21.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:21.419 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:02:21.888 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:02:22.351 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:02:22.820 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:02:23.283 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:02:23.745 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:02:24.208 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:02:24.671 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:02:25.133 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:02:25.597 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:02:25.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:25.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:25.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:25.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:25.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:25.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:25.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:25.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:25.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:25.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:25.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:25.800 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:02:25.800 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2086 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:25.800 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2086 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:25.800 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2086 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:25.800 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2086 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:25.800 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2086 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:25.800 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2086 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:25.800 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2086 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:30.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:30.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:30.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:30.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:30.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:30.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:30.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:30.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:30.804 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:30.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:30.804 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:02:30.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:02:30.806 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:02:30.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:30.806 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:30.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:30.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:02:30.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:30.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:02:30.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:30.806 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:02:30.806 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:02:30.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:30.807 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:30.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:30.807 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:02:30.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:30.807 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:02:30.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:30.807 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:02:30.807 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:02:30.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:30.808 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:30.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:30.808 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:02:30.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:30.808 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:02:30.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:02:30.809 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:02:30.809 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:02:30.809 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:30.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:30.814 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:02:31.290 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:02:31.334 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:02:31.337 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:02:31.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:31.339 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:31.754 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:02:31.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:31.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:31.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:31.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:32.217 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:02:32.680 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:02:32.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:32.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:32.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:32.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:33.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:02:33.621 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:02:33.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:33.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:33.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:33.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:34.092 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:02:34.563 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:02:34.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:34.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:34.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:34.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:35.033 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:02:35.504 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:02:35.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:35.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:35.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:35.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:35.974 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:02:36.437 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:02:36.900 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:02:37.368 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:02:37.831 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:02:38.294 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:02:38.757 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:02:39.223 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:02:39.690 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:02:40.153 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:02:40.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:40.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:40.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:40.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:40.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:40.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:40.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:40.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:40.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:40.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:40.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:40.374 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:02:40.374 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2090 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:40.374 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2090 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:40.374 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2090 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:40.374 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2090 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:40.374 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2090 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:40.374 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2090 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:40.374 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2090 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:40.374 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2090 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:45.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:45.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:45.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:45.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:45.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:45.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:45.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:45.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:45.392 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:45.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:45.392 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:02:45.393 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:02:45.393 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:02:45.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:45.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:45.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:45.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:02:45.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:45.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:02:45.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:45.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:02:45.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:02:45.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:45.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:45.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:02:45.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:45.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:45.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:02:45.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:45.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:02:45.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:02:45.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:45.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:45.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:02:45.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:45.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:45.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:02:45.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:45.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:02:45.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:02:45.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:02:45.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:02:45.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:02:45.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:02:45.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:02:45.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:02:45.399 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:02:45.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:45.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:02:45.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:02:45.923 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:02:45.924 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:02:45.924 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:45.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:46.340 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:02:46.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:46.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:46.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:46.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:46.810 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:02:47.274 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:02:47.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:47.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:47.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:47.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:47.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:02:48.206 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:02:48.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:48.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:48.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:48.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:48.677 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:02:48.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:48.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:48.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:48.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:48.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:48.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:48.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:48.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:48.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:48.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:48.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:48.961 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=777 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=777 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=777 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=777 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=777 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=777 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=778 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=778 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=778 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=778 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=778 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=778 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=778 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:48.961 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=778 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:53.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:53.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:53.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:53.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:53.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:53.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:53.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:53.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:53.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:53.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:53.977 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:02:53.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:02:53.981 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:02:53.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:53.981 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:53.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:53.981 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:02:53.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:53.982 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:02:53.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:53.984 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:02:53.984 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:02:53.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:53.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:53.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:53.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:02:53.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:53.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:02:53.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:53.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:02:53.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:02:53.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:53.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:53.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:53.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:02:53.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:53.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:02:53.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:53.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:02:53.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:02:53.988 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:02:53.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:53.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:53.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:02:54.466 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:02:54.518 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:02:54.521 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:02:54.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:54.524 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:02:54.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:02:54.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:02:54.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:02:54.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:02:54.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:02:54.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:02:54.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:02:54.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:02:54.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:54.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:02:54.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:02:54.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:02:54.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:02:54.929 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:02:54.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:02:54.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:02:54.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:02:54.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:02:54.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:54.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:54.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:54.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:54.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:54.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:54.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:54.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:54.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:54.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:54.953 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:02:54.953 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:54.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:54.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:54.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:54.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:54.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:54.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:02:59.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:02:59.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:02:59.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:59.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:59.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:59.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:59.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:02:59.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:59.955 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:59.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:02:59.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:02:59.956 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:02:59.956 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:02:59.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:59.956 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:59.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:02:59.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:02:59.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:02:59.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:02:59.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:02:59.957 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:02:59.957 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:02:59.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:59.957 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:59.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:02:59.957 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:02:59.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:02:59.957 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:02:59.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:02:59.958 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:02:59.958 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:02:59.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:59.958 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:02:59.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:02:59.958 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:02:59.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:02:59.958 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:02:59.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:59.959 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:02:59.959 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:02:59.959 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:02:59.960 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:59.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:02:59.964 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:03:00.436 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:03:00.472 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:03:00.473 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:03:00.496 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:03:00.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:03:00.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:00.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:00.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:00.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:00.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:00.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:00.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:00.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:00.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:00.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:00.510 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:03:00.510 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:00.510 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:00.510 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:00.510 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:00.510 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:00.510 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:00.510 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:05.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:05.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:05.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:05.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:05.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:05.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:05.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:05.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:05.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:05.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:05.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:03:05.525 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:03:05.525 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:03:05.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:05.525 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:05.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:05.525 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:03:05.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:05.525 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:03:05.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:05.527 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:03:05.527 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:03:05.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:05.527 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:05.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:05.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:03:05.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:05.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:03:05.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:05.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:03:05.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:03:05.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:05.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:05.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:05.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:03:05.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:05.530 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:03:05.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:05.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:03:05.533 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:03:05.533 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:03:05.533 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:05.537 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:03:06.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:03:06.057 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:03:06.058 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:03:06.058 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:03:06.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:03:06.479 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:03:06.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:06.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:06.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:06.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:06.951 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:03:07.415 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:03:07.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:07.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:07.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:07.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:07.878 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:03:08.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:08.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:08.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:08.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:08.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:08.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:08.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:08.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:08.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:08.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:08.064 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:03:13.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:13.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:13.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:13.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:13.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:13.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:13.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:13.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:13.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:13.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:13.080 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:03:13.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:03:13.082 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:03:13.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:13.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:13.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:13.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:03:13.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:13.083 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:03:13.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:13.085 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:03:13.085 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:03:13.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:13.085 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:13.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:13.085 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:03:13.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:13.085 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:03:13.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:13.087 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:03:13.087 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:03:13.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:13.087 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:13.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:13.087 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:03:13.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:13.087 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:03:13.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:03:13.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:03:13.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:03:13.090 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:03:13.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:13.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:13.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:13.095 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:03:13.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:03:13.611 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:03:13.613 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:03:13.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:03:13.615 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:03:13.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:13.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:13.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:03:13.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:03:13.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:03:13.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:03:13.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:03:13.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:03:14.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:03:14.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:14.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:14.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:14.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:14.515 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:03:14.988 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:03:15.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:15.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:15.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:15.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:15.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:03:15.933 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:03:16.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:16.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:16.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:16.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:16.404 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:03:16.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:16.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:16.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:16.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:16.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:16.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:16.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:16.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:16.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:16.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:16.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:16.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:16.430 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:03:16.430 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:16.430 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:16.430 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:16.430 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:16.431 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:16.431 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:16.431 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:21.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:21.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:21.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:21.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:21.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:21.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:21.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:21.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:21.447 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:21.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:21.448 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:03:21.452 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:03:21.452 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:03:21.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:21.453 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:21.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:21.454 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:03:21.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:21.454 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:03:21.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:21.456 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:03:21.456 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:03:21.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:21.457 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:21.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:21.457 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:03:21.457 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:21.457 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:03:21.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:21.459 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:03:21.459 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:03:21.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:21.459 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:21.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:21.459 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:03:21.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:21.459 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:03:21.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:21.462 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:03:21.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:03:21.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:03:21.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:03:21.462 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:21.463 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:03:21.463 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:03:21.463 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:03:21.463 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:21.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:21.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:21.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:21.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:21.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:21.468 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:03:21.946 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:03:21.987 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:03:21.988 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:03:21.989 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:03:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:03:21.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:21.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:21.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:03:21.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:03:21.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:03:21.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:03:21.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:03:21.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:03:22.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:03:22.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:22.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:22.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:22.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:22.885 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:03:23.358 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:03:23.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:23.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:23.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:23.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:23.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:03:24.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:24.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:24.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:24.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:24.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:24.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:24.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:24.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:24.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:24.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:24.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:24.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:24.083 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:03:29.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:29.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:29.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:29.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:29.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:29.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:29.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:29.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:29.099 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:29.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:29.099 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:03:29.101 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:03:29.102 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:03:29.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:29.102 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:29.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:29.103 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:03:29.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:29.103 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:03:29.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:29.104 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:03:29.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:03:29.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:29.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:29.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:29.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:03:29.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:29.104 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:03:29.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:29.106 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:03:29.106 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:03:29.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:29.106 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:29.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:29.106 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:03:29.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:29.106 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:03:29.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:29.108 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:03:29.108 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:03:29.109 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:03:29.109 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:29.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:29.113 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:03:29.591 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:03:29.631 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:03:29.633 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:03:29.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:03:29.635 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:03:29.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:29.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:29.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:03:29.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:03:29.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:03:29.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:03:29.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:03:29.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:03:30.059 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:03:30.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:30.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:30.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:30.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:30.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:03:31.003 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:03:31.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:31.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:31.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:31.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:31.476 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:03:31.948 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:03:32.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:32.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:32.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:32.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:32.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:03:32.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:32.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:32.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:32.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:32.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:32.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:32.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:32.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:32.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:32.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:32.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:32.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:32.450 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=723 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=723 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=723 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:32.450 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=723 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:37.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:37.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:37.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:37.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:37.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:37.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:37.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:37.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:37.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:37.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:37.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:03:37.489 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:03:37.489 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:03:37.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:37.490 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:37.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:37.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:03:37.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:37.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:03:37.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:37.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:03:37.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:03:37.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:37.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:37.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:37.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:03:37.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:37.497 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:03:37.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:37.499 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:03:37.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:03:37.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:37.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:37.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:37.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:03:37.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:37.500 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:03:37.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:37.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:03:37.504 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:03:37.504 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:03:37.504 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:37.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:37.509 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:03:37.987 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:03:38.030 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:03:38.031 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:03:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:03:38.033 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:03:38.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:38.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:38.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:03:38.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:03:38.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:03:38.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:03:38.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:03:38.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:03:38.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:03:38.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:38.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:38.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:38.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:38.930 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:03:39.401 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:03:39.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:39.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:39.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:39.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:39.874 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:03:40.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:40.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:40.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:40.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:40.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:40.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:40.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:40.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:40.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:40.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:40.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:40.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:40.129 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:03:40.129 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:40.129 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:40.129 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:40.129 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:40.129 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:40.129 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:40.129 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:40.129 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:45.132 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:45.132 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:45.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:45.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:45.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:45.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:45.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:45.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:45.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:45.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:45.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:03:45.146 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:03:45.147 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:03:45.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:45.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:45.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:45.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:03:45.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:45.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:03:45.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:45.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:03:45.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:03:45.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:45.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:45.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:45.150 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:03:45.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:45.150 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:03:45.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:45.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:03:45.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:03:45.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:45.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:45.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:45.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:03:45.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:45.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:03:45.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:45.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:03:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:03:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:03:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:03:45.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:03:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:03:45.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:03:45.155 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:03:45.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:45.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:03:45.637 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:03:45.680 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:03:45.681 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:03:45.682 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:03:45.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:03:45.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:45.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:45.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:03:45.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:03:45.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:03:45.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:03:45.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:03:45.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:03:46.105 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:03:46.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:46.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:46.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:46.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:46.576 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:03:47.049 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:03:47.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:47.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:47.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:47.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:47.521 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:03:47.993 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:03:48.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:48.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:48.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:48.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:48.467 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:03:48.939 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:03:49.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:49.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:49.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:49.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:49.411 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:03:49.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:49.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:49.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:49.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:49.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:49.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:49.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:49.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:49.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:49.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:49.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:49.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:49.442 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:03:49.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:49.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:03:54.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:54.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:54.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:54.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:54.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:54.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:54.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:54.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:54.453 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:54.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:03:54.454 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:03:54.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:03:54.458 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:03:54.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:54.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:54.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:54.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:03:54.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:03:54.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:03:54.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:54.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:03:54.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:03:54.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:54.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:54.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:54.462 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:03:54.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:03:54.462 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:03:54.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:54.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:03:54.463 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:03:54.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:54.463 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:03:54.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:54.463 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:03:54.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:03:54.464 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:03:54.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:54.466 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:03:54.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:03:54.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:03:54.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:03:54.466 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:03:54.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:03:54.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:03:54.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:03:54.467 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:03:54.467 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:03:54.467 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:54.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:03:54.472 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:03:54.951 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:03:54.995 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:03:54.999 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:03:54.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:03:55.002 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:03:55.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:55.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:55.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:03:55.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:03:55.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:03:55.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:03:55.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:03:55.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:03:55.423 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:03:55.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:55.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:55.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:55.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:55.894 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:03:56.367 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:03:56.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:56.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:56.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:56.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:56.840 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:03:57.312 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:03:57.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:57.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:57.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:57.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:57.782 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:03:58.256 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:03:58.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:58.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:58.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:58.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:58.728 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:03:58.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:03:58.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:03:58.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:03:58.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:03:58.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:03:58.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:03:58.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:03:58.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:03:58.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:03:58.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:03:58.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:03:58.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:03:58.991 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:03.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:03.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:03.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:03.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:03.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:03.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:04.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:04.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:04.013 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:04.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:04.013 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:04:04.015 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:04:04.015 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:04:04.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:04.015 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:04.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:04.016 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:04:04.016 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:04.016 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:04:04.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:04.018 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:04:04.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:04:04.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:04.018 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:04.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:04.018 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:04:04.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:04.018 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:04:04.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:04.019 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:04:04.019 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:04:04.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:04.019 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:04.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:04.019 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:04:04.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:04.019 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:04:04.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:04:04.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:04:04.021 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:04:04.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:04.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:04:04.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:04:04.548 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:04:04.550 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:04:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:04.552 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:04:04.976 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:04:05.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:05.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:05.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:05.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:05.449 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:04:05.922 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:04:06.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:06.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:06.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:06.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:06.394 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:04:06.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:06.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:06.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:06.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:06.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:06.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:06.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:06.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:06.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:06.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:06.569 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:11.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:11.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:11.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:11.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:11.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:11.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:11.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:11.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:11.582 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:11.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:11.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:04:11.585 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:04:11.586 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:04:11.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:11.586 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:11.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:11.586 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:04:11.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:11.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:04:11.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:11.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:04:11.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:04:11.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:11.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:11.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:11.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:04:11.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:11.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:04:11.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:11.592 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:04:11.593 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:04:11.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:11.593 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:11.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:11.593 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:04:11.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:11.593 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:04:11.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:11.596 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:04:11.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:04:11.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:04:11.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:11.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:04:11.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:04:11.597 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:04:11.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:11.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:11.602 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:04:12.080 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:04:12.130 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:04:12.132 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:04:12.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:12.134 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:04:12.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:04:12.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:04:12.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:04:12.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:12.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:12.545 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:04:12.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:12.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:12.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:12.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:13.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:04:13.474 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:04:13.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:13.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:13.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:13.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:13.946 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:04:14.418 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:04:14.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:14.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:14.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:14.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:14.891 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:04:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:15.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:15.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:15.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:15.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:15.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:15.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:15.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:15.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:15.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:15.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:15.186 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:20.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:20.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:20.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:20.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:20.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:20.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:20.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:20.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:20.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:20.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:20.196 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:04:20.198 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:04:20.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:04:20.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:20.198 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:20.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:20.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:04:20.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:20.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:04:20.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:20.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:04:20.199 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:04:20.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:20.199 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:20.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:20.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:04:20.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:20.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:04:20.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:20.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:04:20.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:04:20.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:20.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:20.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:20.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:04:20.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:20.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:04:20.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:20.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:04:20.204 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:04:20.204 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:04:20.204 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:20.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:20.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:04:20.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:04:20.736 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:04:20.739 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:04:20.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:20.741 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:04:20.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:04:20.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:04:20.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:04:20.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:20.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:20.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:20.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:20.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:20.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:20.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:20.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:20.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:20.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:20.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:20.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:20.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:20.786 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:20.786 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:20.786 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:20.786 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:20.786 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:20.786 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:20.786 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:20.786 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:25.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:25.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:25.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:25.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:25.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:25.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:25.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:25.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:25.801 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:25.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:25.801 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:04:25.803 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:04:25.804 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:04:25.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:25.804 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:25.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:25.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:04:25.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:25.805 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:04:25.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:25.806 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:04:25.806 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:04:25.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:25.806 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:25.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:25.807 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:04:25.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:25.807 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:04:25.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:25.809 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:04:25.809 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:04:25.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:25.809 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:25.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:25.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:04:25.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:25.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:04:25.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:25.811 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:04:25.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:04:25.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:04:25.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:04:25.812 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:04:25.812 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:04:25.812 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:25.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:25.817 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:04:26.296 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:04:26.338 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:04:26.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:26.341 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:04:26.342 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:04:26.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:04:26.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:04:26.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:04:26.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:26.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:26.760 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:04:26.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:26.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:26.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:26.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:27.224 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:04:27.687 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:04:27.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:27.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:27.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:27.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:28.150 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:04:28.614 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:04:28.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:28.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:28.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:28.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:29.077 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:04:29.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:29.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:29.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:29.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:29.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:29.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:29.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:29.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:29.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:29.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:29.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:29.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:29.389 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:29.389 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:29.389 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:29.389 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:29.389 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:29.389 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:29.389 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:29.389 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:34.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:34.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:34.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:34.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:34.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:34.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:34.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:34.404 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:34.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:34.404 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:04:34.405 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:04:34.405 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:04:34.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:34.405 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:34.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:34.405 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:04:34.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:34.405 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:04:34.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:34.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:04:34.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:04:34.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:34.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:34.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:34.407 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:04:34.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:34.407 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:04:34.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:34.409 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:04:34.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:04:34.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:34.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:34.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:34.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:04:34.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:34.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:04:34.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:04:34.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:04:34.411 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:04:34.411 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:04:34.411 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:04:34.892 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:04:34.933 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:04:34.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:34.936 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:04:34.937 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:04:34.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:04:34.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:04:34.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:04:34.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:34.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:34.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:34.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:34.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:34.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:34.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:34.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:34.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:34.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:34.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:34.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:34.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:34.983 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:34.984 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.984 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.984 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.984 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.984 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.984 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.984 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.984 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.985 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.985 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.985 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.985 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.985 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.985 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:34.985 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:39.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:39.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:39.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:39.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:39.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:39.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:39.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:39.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:39.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:39.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:39.997 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:04:39.999 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:04:39.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:04:39.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:39.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:39.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:40.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:04:40.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:40.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:04:40.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:40.002 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:04:40.002 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:04:40.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:40.002 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:40.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:40.002 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:04:40.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:40.002 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:04:40.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:40.005 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:04:40.005 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:04:40.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:40.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:40.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:04:40.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:40.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:40.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:04:40.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:40.008 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:04:40.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:04:40.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:04:40.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:04:40.008 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:04:40.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:04:40.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:04:40.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:04:40.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:04:40.009 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:04:40.009 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:04:40.009 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:40.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:40.013 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:04:40.492 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:04:40.533 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:04:40.536 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:04:40.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:40.538 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:04:40.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:40.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:40.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:40.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:40.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:40.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:40.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:40.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:40.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:40.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:40.553 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:40.553 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:45.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:45.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:45.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:45.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:45.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:45.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:45.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:45.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:45.567 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:45.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:45.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:04:45.570 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:04:45.570 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:04:45.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:45.571 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:45.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:45.571 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:04:45.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:45.572 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:04:45.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:45.573 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:04:45.573 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:04:45.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:45.573 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:45.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:45.573 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:04:45.574 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:45.574 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:04:45.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:45.575 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:04:45.575 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:04:45.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:45.575 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:45.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:45.575 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:04:45.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:45.575 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:04:45.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:04:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:04:45.578 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:04:45.578 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:04:45.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:45.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:45.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:45.582 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:04:46.061 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:04:46.100 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:04:46.102 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:04:46.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:46.105 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:04:46.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:46.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:46.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:46.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:46.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:46.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:46.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:46.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:46.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:46.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:46.120 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:46.121 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:46.121 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:46.121 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:46.121 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:51.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:51.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:51.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:51.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:51.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:51.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:51.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:51.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:51.135 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:51.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:51.135 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:04:51.140 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:04:51.140 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:04:51.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:51.140 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:51.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:51.140 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:04:51.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:51.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:04:51.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:51.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:04:51.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:04:51.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:51.144 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:51.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:51.144 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:04:51.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:51.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:04:51.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:51.146 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:04:51.146 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:04:51.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:51.147 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:51.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:51.147 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:04:51.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:51.147 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:04:51.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:51.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:04:51.151 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:04:51.151 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:04:51.151 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:51.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:51.156 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:04:51.635 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:04:51.678 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:04:51.680 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:04:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:51.681 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:04:51.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:51.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:51.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:51.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:51.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:51.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:51.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:51.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:51.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:51.693 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:51.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:51.693 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:51.693 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:51.693 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:51.693 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:51.693 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:51.693 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:51.693 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:51.693 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:56.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:56.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:56.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:56.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:56.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:56.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:56.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:56.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:56.706 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:56.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:04:56.706 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:04:56.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:04:56.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:04:56.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:56.710 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:56.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:56.710 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:04:56.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:04:56.710 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:04:56.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:56.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:04:56.712 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:04:56.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:56.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:56.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:56.713 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:04:56.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:04:56.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:04:56.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:56.715 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:04:56.715 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:04:56.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:56.715 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:04:56.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:56.715 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:04:56.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:04:56.715 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:04:56.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:56.718 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:04:56.718 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:04:56.718 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:04:56.718 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:04:56.723 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:04:57.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:04:57.248 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:04:57.250 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:04:57.252 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:04:57.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:04:57.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:04:57.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:04:57.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:04:57.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:04:57.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:04:57.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:04:57.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:04:57.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:04:57.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:04:57.270 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:04:57.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:04:57.270 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.270 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.270 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.271 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:04:57.272 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:02.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:02.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:02.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:02.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:02.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:02.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:02.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:02.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:02.279 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:02.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:02.279 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:05:02.282 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:05:02.282 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:05:02.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:02.282 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:02.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:02.283 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:05:02.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:02.283 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:05:02.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:02.285 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:05:02.285 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:05:02.285 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:02.286 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:02.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:02.286 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:05:02.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:02.286 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:05:02.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:02.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:05:02.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:05:02.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:02.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:02.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:02.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:05:02.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:02.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:05:02.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:02.294 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:05:02.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:05:02.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:05:02.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:05:02.294 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:05:02.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:05:02.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:05:02.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:05:02.295 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:05:02.295 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:05:02.295 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:02.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:02.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:02.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:02.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:02.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:02.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:02.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:02.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:02.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:02.300 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:05:02.778 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:05:02.826 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:05:02.827 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:05:02.829 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:05:02.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:03.242 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:05:03.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:03.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:03.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:03.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:03.706 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:05:04.169 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:05:04.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:04.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:04.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:04.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:04.632 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:05:05.096 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:05:05.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:05.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:05.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:05.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:05.559 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:05:05.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:05:05.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:05:05.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:05:05.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:05:05.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:05:05.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:05:05.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:05:05.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:05:06.024 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:05:06.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:06.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:06.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:06.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:06.495 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:05:06.969 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:05:07.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:07.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:07.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:07.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:07.441 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:05:07.913 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:05:08.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:05:08.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:05:08.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:08.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:08.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:08.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:08.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:08.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:08.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:08.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:08.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:08.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:08.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:08.048 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:05:08.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:08.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:08.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:08.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:08.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:08.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:08.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:13.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:13.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:13.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:13.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:13.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:13.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:13.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:13.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:13.052 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:13.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:13.052 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:05:13.054 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:05:13.054 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:05:13.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:13.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:13.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:13.054 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:05:13.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:13.054 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:05:13.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:13.056 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:05:13.056 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:05:13.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:13.056 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:13.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:13.056 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:05:13.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:13.057 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:05:13.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:13.058 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:05:13.058 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:05:13.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:13.058 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:13.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:13.058 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:05:13.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:13.059 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:05:13.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:13.061 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:05:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:05:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:05:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:05:13.061 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:05:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:05:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:05:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:05:13.062 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:05:13.062 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:05:13.062 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:13.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:13.067 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:05:13.545 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:05:13.592 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:05:13.593 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:05:13.594 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:05:13.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:13.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:05:13.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:05:13.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:05:13.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:13.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:13.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:13.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:13.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:13.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:13.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:13.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:13.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:13.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:13.636 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:05:13.636 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:13.636 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:13.636 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:13.636 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:13.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:13.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:13.637 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:18.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:18.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:18.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:18.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:18.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:18.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:18.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:18.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:18.648 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:18.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:18.648 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:05:18.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:05:18.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:05:18.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:18.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:18.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:18.652 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:05:18.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:18.652 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:05:18.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:18.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:05:18.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:05:18.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:18.655 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:18.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:18.655 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:05:18.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:18.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:05:18.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:18.658 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:05:18.658 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:05:18.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:18.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:18.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:18.658 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:05:18.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:18.658 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:05:18.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:18.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:05:18.662 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:05:18.662 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:05:18.662 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:18.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:18.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:18.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:18.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:18.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:18.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:05:19.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:05:19.195 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:05:19.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:19.197 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:05:19.198 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:05:19.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:05:19.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:05:19.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:05:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:19.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:19.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:19.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:19.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:19.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:19.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:19.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:19.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:19.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:19.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:19.236 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:05:24.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:24.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:24.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:24.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:24.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:24.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:24.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:24.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:24.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:24.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:24.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:05:24.255 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:05:24.255 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:05:24.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:24.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:24.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:24.256 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:05:24.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:24.256 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:05:24.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:24.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:05:24.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:05:24.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:24.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:24.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:24.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:05:24.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:24.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:05:24.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:24.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:05:24.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:05:24.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:24.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:24.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:24.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:05:24.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:24.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:05:24.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:24.265 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:05:24.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:05:24.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:05:24.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:05:24.265 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:05:24.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:05:24.266 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:05:24.266 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:05:24.266 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:05:24.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:24.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:24.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:24.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:24.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:24.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:24.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:24.271 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:05:24.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:05:24.796 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:05:24.798 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:05:24.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:24.799 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:05:24.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:05:24.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:05:24.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:05:24.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:24.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:24.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:24.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:24.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:24.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:24.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:24.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:24.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:24.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:24.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:24.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:24.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:24.843 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:05:24.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:24.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:24.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:24.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:24.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:24.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:24.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:29.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:29.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:29.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:29.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:29.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:29.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:29.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:29.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:29.856 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:29.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:29.857 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:05:29.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:05:29.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:05:29.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:29.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:29.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:29.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:05:29.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:29.863 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:05:29.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:29.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:05:29.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:05:29.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:29.864 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:29.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:29.864 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:05:29.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:29.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:05:29.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:29.866 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:05:29.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:05:29.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:29.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:29.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:29.867 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:05:29.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:29.867 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:05:29.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:29.870 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:05:29.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:05:29.871 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:05:29.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:29.875 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:05:30.354 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:05:30.404 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:05:30.406 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:05:30.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:30.408 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:05:30.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:05:30.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:05:30.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:05:30.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:30.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:30.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:30.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:30.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:30.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:30.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:30.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:30.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:30.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:30.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:30.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:30.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:30.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:30.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:30.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:30.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:30.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:30.463 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:05:35.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:35.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:35.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:35.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:35.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:35.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:35.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:35.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:35.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:35.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:35.478 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:05:35.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:05:35.482 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:05:35.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:35.483 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:35.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:35.483 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:05:35.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:35.484 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:05:35.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:35.485 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:05:35.485 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:05:35.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:35.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:35.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:35.486 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:05:35.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:35.486 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:05:35.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:35.488 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:05:35.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:05:35.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:35.488 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:35.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:35.489 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:05:35.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:35.489 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:05:35.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:35.492 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:05:35.492 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:05:35.492 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:05:35.493 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:35.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:35.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:35.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:35.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:35.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:35.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:35.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:35.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:35.497 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:05:35.976 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:05:36.018 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:05:36.019 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:05:36.020 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:05:36.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:36.022 [DEBUG] fake_trx.py:382 (BTS@172.18.205.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-22 02:05:36.022 [INFO] fake_trx.py:385 (BTS@172.18.205.20:5700) Artificial TRXC delay set to 200
2026-04-22 02:05:36.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-22 02:05:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:36.452 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:05:36.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:36.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:36.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:36.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:36.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:36.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:36.925 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:05:37.399 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:05:37.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:37.660 [DEBUG] fake_trx.py:382 (BTS@172.18.205.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-22 02:05:37.660 [INFO] fake_trx.py:385 (BTS@172.18.205.20:5700) Artificial TRXC delay set to 0
2026-04-22 02:05:37.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-22 02:05:37.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:37.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:37.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:37.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:37.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:37.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:37.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:37.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:37.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:37.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:37.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:37.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:37.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:37.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:37.670 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:05:42.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:42.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:42.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:42.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:42.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:42.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:42.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:42.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:42.686 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:42.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:42.686 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:05:42.688 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:05:42.688 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:05:42.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:42.689 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:42.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:42.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:05:42.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:42.690 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:05:42.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:42.691 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:05:42.691 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:05:42.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:42.691 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:42.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:42.691 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:05:42.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:42.692 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:05:42.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:42.693 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:05:42.693 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:05:42.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:42.693 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:42.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:42.693 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:05:42.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:42.693 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:05:42.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:42.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:05:42.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:05:42.696 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:05:42.697 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:42.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:05:43.179 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:05:43.223 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:05:43.225 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:05:43.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:43.227 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:05:43.229 [DEBUG] fake_trx.py:382 (BTS@172.18.205.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-22 02:05:43.230 [INFO] fake_trx.py:385 (BTS@172.18.205.20:5700) Artificial TRXC delay set to 200
2026-04-22 02:05:43.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-22 02:05:43.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:43.651 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:05:43.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:43.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:43.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:43.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:43.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.127 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:05:44.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.605 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:05:44.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.864 [DEBUG] fake_trx.py:382 (BTS@172.18.205.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-22 02:05:44.864 [INFO] fake_trx.py:385 (BTS@172.18.205.20:5700) Artificial TRXC delay set to 0
2026-04-22 02:05:44.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-22 02:05:44.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:44.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:44.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:44.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:44.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:44.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:44.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:44.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:44.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:44.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:44.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:44.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:44.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:44.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:44.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:44.873 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:05:44.873 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=468 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:44.873 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=468 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:44.873 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=468 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:44.873 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=468 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:44.873 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=468 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:44.873 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=468 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:44.873 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=468 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:44.873 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=468 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:49.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:49.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:49.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:49.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:49.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:49.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:49.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:49.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:49.889 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:49.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:49.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:05:49.894 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:05:49.894 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:05:49.895 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:49.895 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:49.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:49.895 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:05:49.895 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:49.895 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:05:49.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:49.898 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:05:49.898 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:05:49.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:49.898 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:49.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:49.898 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:05:49.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:49.899 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:05:49.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:49.901 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:05:49.901 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:05:49.901 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:49.901 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:49.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:49.901 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:05:49.901 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:49.901 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:05:49.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:49.904 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:05:49.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:05:49.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:05:49.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:05:49.904 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:49.905 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:05:49.905 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:05:49.905 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:05:49.905 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:49.910 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:05:50.387 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:05:50.436 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:05:50.437 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:05:50.438 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:05:50.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:50.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:05:50.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:05:50.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:05:50.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:50.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:50.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:50.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:50.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:50.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:50.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:50.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:50.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:50.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:50.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:50.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:50.481 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:50.481 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:55.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:55.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:55.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:55.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:55.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:55.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:55.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:55.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:55.490 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:55.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:05:55.490 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:05:55.492 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:05:55.493 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:05:55.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:55.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:55.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:55.494 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:05:55.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:05:55.494 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:05:55.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:55.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:05:55.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:05:55.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:55.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:55.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:55.495 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:05:55.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:05:55.495 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:05:55.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:55.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:05:55.497 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:05:55.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:55.497 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:05:55.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:55.497 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:05:55.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:05:55.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:05:55.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:55.500 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:05:55.500 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:05:55.500 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:05:55.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:55.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:05:55.505 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:05:55.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:05:56.023 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:05:56.025 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:05:56.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:56.027 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:05:56.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:05:56.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:05:56.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:05:56.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:56.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:05:56.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:05:56.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:05:56.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:05:56.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:05:56.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:05:56.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:05:56.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:05:56.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:05:56.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:05:56.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:05:56.059 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:05:56.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:56.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:56.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:56.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:56.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:56.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:56.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:05:56.060 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:01.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:06:01.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:06:01.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:06:01.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:06:01.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:06:01.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:06:01.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:06:01.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:06:01.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:01.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:06:01.073 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:06:01.076 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:06:01.076 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:06:01.077 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:06:01.077 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:01.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:06:01.077 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:06:01.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:06:01.078 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:06:01.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:01.079 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:06:01.080 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:06:01.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:06:01.080 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:01.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:06:01.080 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:06:01.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:06:01.081 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:06:01.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:01.083 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:06:01.083 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:06:01.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:06:01.083 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:01.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:06:01.083 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:06:01.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:06:01.083 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:06:01.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:01.086 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:06:01.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:01.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:06:01.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:06:01.087 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:06:01.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:01.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:01.092 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:06:01.571 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:06:01.622 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:06:01.625 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:06:01.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:01.628 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:06:01.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:01.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:01.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:01.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:01.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:01.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:01.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:01.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:01.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:01.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:01.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:01.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:01.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:01.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:01.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:01.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:01.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:01.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:01.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:01.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:01.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:01.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:01.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:01.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:01.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:01.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:01.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:01.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:01.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:01.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:02.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:06:02.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:02.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:02.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:02.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:02.514 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:06:02.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:06:03.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:03.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:03.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:03.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:03.456 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:06:03.929 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:06:04.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:04.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:04.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:04.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:04.402 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:06:04.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:04.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:04.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:04.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:04.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:04.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:04.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:04.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:04.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:04.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:04.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:04.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:04.875 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:06:04.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:04.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:04.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:04.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:04.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:04.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:04.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:04.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:04.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:04.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:04.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:04.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:04.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:04.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:04.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:04.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:04.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:04.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:04.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:04.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:04.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:04.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:05.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:05.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:05.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:05.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:05.346 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:06:05.819 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:06:06.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:06.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:06.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:06.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:06.292 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:06:06.764 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:06:07.237 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:06:07.710 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:06:07.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:07.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:07.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:07.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:07.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:07.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:07.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:07.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:07.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:07.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:07.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:07.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:08.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:08.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:08.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:08.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:08.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:08.182 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:06:08.655 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:06:09.128 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:06:09.601 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:06:10.074 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:06:10.547 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:06:11.019 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:06:11.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:11.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:11.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:11.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:11.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:11.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:11.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:11.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:11.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:11.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:11.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:11.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:11.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:11.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:11.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:11.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:11.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:11.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:11.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:11.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:11.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:11.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:11.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:11.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:11.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:11.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:11.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:11.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:11.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:11.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:11.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:11.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:11.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:11.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:11.489 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:06:11.960 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:06:12.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:12.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:12.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:12.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:12.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:12.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:12.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:12.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:12.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:12.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:12.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:12.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:12.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:12.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:12.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:12.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:12.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:12.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:12.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:12.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:12.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:12.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:12.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:12.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:12.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:12.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:12.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:12.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:12.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:12.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:12.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:12.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:12.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:12.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:12.429 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:06:12.902 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:06:13.374 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:06:13.845 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:06:14.315 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:06:14.789 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:06:15.261 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:06:15.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:15.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:15.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:15.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:15.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:15.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:15.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:15.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:15.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:15.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:15.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:15.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:15.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:15.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:15.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:15.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:15.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:15.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:15.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:15.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:15.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:15.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:15.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:15.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:15.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:15.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:15.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:15.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:15.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:15.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:15.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:15.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:15.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:15.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:15.733 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:06:16.204 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:06:16.678 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:06:17.150 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:06:17.622 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:06:18.095 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:06:18.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:18.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:18.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:18.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:18.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:18.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:18.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:18.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:18.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:18.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:18.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:18.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:18.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:18.567 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:06:18.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:18.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:18.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:18.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:19.040 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:06:19.510 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:06:19.981 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:06:20.452 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:06:20.925 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:06:21.398 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:06:21.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:21.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:21.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:21.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:21.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:21.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:21.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:21.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:21.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:21.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:21.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:21.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:21.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:21.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:21.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:21.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:21.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:21.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:21.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:21.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:21.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:21.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:21.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:21.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:21.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:21.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:21.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:21.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:21.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:21.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:21.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:21.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:21.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:21.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:21.870 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:06:22.345 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:06:22.817 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:06:22.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:22.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:22.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:22.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:23.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:23.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:23.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:23.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:23.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:23.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:23.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:23.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:23.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:23.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:23.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:23.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:23.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:23.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:23.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:23.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:23.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:23.288 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:06:23.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:23.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:23.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:23.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:23.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:23.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:23.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:23.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:23.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:23.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:23.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:23.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:23.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:23.759 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:06:24.230 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:06:24.703 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:06:25.176 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:06:25.648 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:06:26.121 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:06:26.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:26.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:26.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:26.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:26.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:26.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:26.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:26.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:26.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:26.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:26.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:26.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:26.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:26.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:26.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:26.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:26.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:26.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:26.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:26.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:26.594 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:06:26.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:26.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:26.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:26.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:26.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:26.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:26.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:26.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:26.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:26.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:26.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:26.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:26.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:27.066 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:06:27.537 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:06:28.007 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:06:28.478 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:06:28.949 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:06:29.422 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:06:29.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:29.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:29.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:29.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:29.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:29.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:29.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:29.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:29.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:29.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:29.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:29.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:29.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:29.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:29.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:29.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:29.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:29.895 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:06:30.367 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:06:30.837 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:06:31.311 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:06:31.783 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:06:32.255 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:06:32.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:32.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:32.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:32.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:32.726 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:06:32.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:32.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:32.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:32.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:32.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:32.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:32.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:32.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:32.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:32.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:32.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:32.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:32.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:32.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:32.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:32.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:32.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:32.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:32.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:32.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:32.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:32.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:32.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:32.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:32.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:33.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:33.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:33.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:33.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:33.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:33.197 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:06:33.668 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:06:33.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:33.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:33.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:33.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:33.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:33.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:33.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:33.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:33.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:33.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:33.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:33.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:33.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:33.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:33.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:33.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:33.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:33.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:33.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:33.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:33.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:33.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:33.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:33.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:33.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:33.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:33.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:33.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:33.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:33.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:33.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:33.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:33.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:33.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:34.138 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:06:34.609 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:06:35.082 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:06:35.555 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:06:36.027 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:06:36.498 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:06:36.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:36.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:36.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:36.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:36.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:36.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:36.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:36.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:36.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:36.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:36.877 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:36.877 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:36.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:36.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:36.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:36.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:36.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:36.969 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:06:37.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:37.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:37.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:37.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:37.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:37.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:37.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:37.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:37.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:37.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:37.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:37.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:37.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:37.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:37.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:37.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:37.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:37.439 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:06:37.910 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:06:38.383 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:06:38.856 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:06:39.327 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:06:39.799 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:06:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:40.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:40.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:40.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:40.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:40.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:40.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:40.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:40.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:40.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:40.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:40.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:40.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:40.271 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:06:40.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:40.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:40.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:40.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:40.744 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:06:41.216 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:06:41.687 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:06:42.160 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:06:42.633 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:06:43.104 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:06:43.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:43.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:43.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:43.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:43.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:43.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:43.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:43.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:43.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:43.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:43.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:43.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:43.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:43.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:43.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:43.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:43.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:43.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:43.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:43.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:43.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:43.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:43.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:43.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:43.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:43.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:43.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:43.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:43.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:43.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:43.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:43.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:43.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:43.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:43.575 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:06:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:44.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:44.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:44.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:44.046 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 02:06:44.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:44.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:44.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:44.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:44.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:06:44.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:06:44.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:06:44.058 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:06:44.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:06:44.058 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:06:44.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:06:44.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=9286 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:44.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=9286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:44.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=9286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:44.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=9286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:44.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=9286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:44.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=9286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:44.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=9286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:44.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=9286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:49.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:06:49.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:06:49.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:06:49.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:06:49.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:06:49.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:06:49.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:06:49.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:06:49.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:49.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:06:49.070 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:06:49.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:06:49.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:06:49.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:06:49.074 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:49.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:06:49.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:06:49.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:06:49.075 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:06:49.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:49.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:06:49.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:06:49.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:06:49.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:49.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:06:49.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:06:49.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:06:49.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:06:49.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:49.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:06:49.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:06:49.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:06:49.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:49.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:06:49.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:06:49.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:06:49.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:06:49.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:49.082 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:06:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:06:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:06:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:06:49.082 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:06:49.083 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:06:49.083 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:06:49.083 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:49.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:49.088 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:06:49.567 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:06:49.611 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:06:49.613 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:06:49.615 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:06:49.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:49.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:49.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:49.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:49.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:49.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:49.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:49.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:49.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:49.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:49.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:49.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:49.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:49.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:49.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:49.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:49.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:49.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:49.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:49.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:49.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:49.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:49.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:49.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:49.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:49.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:49.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:49.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:49.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:49.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:49.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:49.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:49.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:49.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:49.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:49.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:49.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:49.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:49.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:49.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:49.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:49.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:49.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:49.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:49.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:49.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:49.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:50.038 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:06:50.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:50.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:50.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:50.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:50.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:50.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:50.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:50.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:50.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:50.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:50.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:50.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:50.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:50.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:50.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:50.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:50.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:50.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:06:50.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:06:50.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:06:50.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:06:50.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:06:50.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:06:50.133 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:06:55.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:06:55.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:06:55.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:06:55.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:06:55.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:06:55.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:06:55.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:06:55.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:06:55.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:55.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:06:55.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:06:55.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:06:55.145 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:06:55.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:06:55.145 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:55.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:06:55.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:06:55.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:06:55.146 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:06:55.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:55.146 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:06:55.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:06:55.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:06:55.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:55.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:06:55.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:06:55.147 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:06:55.147 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:06:55.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:55.149 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:06:55.149 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:06:55.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:06:55.149 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:06:55.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:06:55.149 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:06:55.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:06:55.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:06:55.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:55.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:06:55.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:06:55.152 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:06:55.152 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:06:55.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:55.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:55.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:55.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:06:55.156 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:06:55.635 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:06:55.680 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:06:55.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:55.684 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:06:55.687 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:06:55.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:55.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:55.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:55.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:55.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:55.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:55.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:55.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:55.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:55.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:55.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:55.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:55.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:56.101 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:06:56.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:56.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:56.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:56.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:56.569 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:06:56.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:56.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:56.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:56.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:56.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:56.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:56.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:56.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:56.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:56.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:56.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:56.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:56.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:56.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:56.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:56.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:56.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.040 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:06:57.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:57.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:57.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:57.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:57.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:57.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:57.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:57.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:57.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:57.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:57.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:57.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:57.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:57.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:57.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:57.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:57.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:57.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:57.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:57.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:57.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:57.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:57.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:06:57.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:57.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:57.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:06:57.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:06:57.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:57.512 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:06:57.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:06:57.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:06:57.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:06:57.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:06:57.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:06:57.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:06:57.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:06:57.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:06:57.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:06:57.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:06:57.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:06:57.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:06:57.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:06:57.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:06:57.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:06:57.917 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:06:57.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:06:57.917 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=600 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:57.917 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:57.917 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:57.917 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:57.917 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:57.917 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:57.917 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:06:57.917 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:02.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:07:02.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:07:02.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:02.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:02.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:02.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:02.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:02.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:02.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:02.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:02.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:07:02.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:07:02.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:07:02.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:02.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:02.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:02.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:07:02.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:02.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:07:02.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:02.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:07:02.932 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:07:02.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:02.932 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:02.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:02.932 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:07:02.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:02.932 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:07:02.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:02.934 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:07:02.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:07:02.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:02.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:02.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:02.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:07:02.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:02.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:07:02.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:02.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:07:02.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:07:02.937 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:07:02.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:02.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:07:03.421 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:07:03.465 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:07:03.466 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:07:03.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:03.467 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:07:03.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:03.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:03.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:03.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:03.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:03.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:03.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:03.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:03.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:03.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:03.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:03.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:03.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:03.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:03.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:03.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:03.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:03.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:03.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:03.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:03.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:03.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:03.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:03.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:03.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:03.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:03.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:03.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:03.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:03.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:03.893 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:07:03.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:03.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:03.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:03.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:04.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:04.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:04.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:04.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:04.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:04.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:04.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:04.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:04.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:04.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:04.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:04.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:04.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:04.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:04.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:04.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:04.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:04.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:04.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:04.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:04.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:04.364 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:07:04.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:04.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:04.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:04.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:04.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:04.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:04.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:04.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:04.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:04.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:04.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:04.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:04.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:04.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:04.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:04.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:04.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:04.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:04.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:04.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:04.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:04.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:04.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:04.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:04.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:04.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:07:04.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:07:04.767 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:07:04.768 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:04.768 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:04.768 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:04.768 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:04.768 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:09.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:07:09.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:07:09.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:09.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:09.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:09.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:09.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:09.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:09.776 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:09.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:09.777 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:07:09.779 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:07:09.779 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:07:09.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:09.780 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:09.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:09.781 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:07:09.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:09.781 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:07:09.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:09.782 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:07:09.782 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:07:09.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:09.783 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:09.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:09.783 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:07:09.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:09.783 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:07:09.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:09.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:07:09.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:07:09.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:09.785 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:09.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:09.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:07:09.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:09.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:07:09.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:09.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:07:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:07:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:07:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:07:09.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:07:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:07:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:07:09.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:07:09.790 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:07:09.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:07:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:09.795 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:07:10.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:07:10.331 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:07:10.334 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:07:10.336 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:07:10.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:10.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:10.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:10.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:10.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:10.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:10.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:10.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:10.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:10.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:10.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:10.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:10.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:10.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:10.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:10.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:10.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:10.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:10.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:10.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:10.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:10.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:10.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:10.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:10.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.745 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:07:10.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:10.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:10.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:10.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:10.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:10.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:10.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:10.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:10.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:10.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:10.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:10.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:10.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:10.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:10.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:10.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:10.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:10.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:10.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:11.216 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:07:11.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:11.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:11.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:11.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:11.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:11.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:11.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:11.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:11.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:11.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:11.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:11.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:11.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:11.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:11.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:11.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:11.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:11.686 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:07:11.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:11.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:11.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:11.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:11.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:11.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:11.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:11.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:11.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:11.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:11.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:11.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:11.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:11.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:11.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:11.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:11.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:07:11.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:07:11.857 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:07:11.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:11.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:11.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:11.858 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:11.858 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:11.858 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:11.858 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:11.858 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:16.856 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:07:16.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:07:16.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:16.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:16.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:16.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:16.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:16.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:16.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:16.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:16.864 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:07:16.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:07:16.866 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:07:16.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:16.866 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:16.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:16.866 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:07:16.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:16.866 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:07:16.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:16.868 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:07:16.869 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:07:16.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:16.869 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:16.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:16.869 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:07:16.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:16.869 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:07:16.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:16.871 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:07:16.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:07:16.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:16.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:16.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:16.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:07:16.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:16.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:07:16.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:16.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:07:16.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:07:16.874 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:07:16.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:16.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:16.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:16.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:16.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:16.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:16.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:07:17.358 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:07:17.410 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:07:17.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:17.413 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:07:17.415 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:07:17.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:17.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:17.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:17.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:17.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:17.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:17.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:17.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:17.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:17.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:17.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:17.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:17.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:17.831 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:07:17.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:17.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:17.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:17.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:18.301 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:07:18.772 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:07:18.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:18.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:18.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:18.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:19.245 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:07:19.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:19.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:19.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:19.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:19.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:19.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:19.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:19.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:19.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:19.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:19.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:19.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:19.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:19.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:19.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:19.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:19.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:19.713 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:07:19.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:19.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:19.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:19.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:20.185 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:07:20.655 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:07:20.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:20.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:20.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:20.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:21.126 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:07:21.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:21.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:21.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:21.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:21.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:21.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:21.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:21.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:21.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:21.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:21.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:21.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:21.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:21.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:21.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:21.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:21.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:21.597 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:07:21.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:21.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:21.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:21.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:22.067 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:07:22.538 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:07:23.009 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:07:23.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:23.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:23.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:23.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:23.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:23.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:23.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:23.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:23.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:23.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:23.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:23.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:23.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:23.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:23.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:23.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:23.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:23.479 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:07:23.951 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:07:24.421 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:07:24.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:24.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:24.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:24.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:24.892 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:07:24.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:24.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:24.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:24.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:24.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:24.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:24.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:24.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:24.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:07:24.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:07:24.903 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:07:24.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:24.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:29.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:07:29.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:07:29.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:29.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:29.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:29.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:29.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:29.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:29.916 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:29.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:29.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:07:29.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:07:29.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:07:29.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:29.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:29.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:29.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:07:29.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:29.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:07:29.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:29.923 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:07:29.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:07:29.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:29.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:29.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:29.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:07:29.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:29.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:07:29.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:29.925 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:07:29.925 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:07:29.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:29.925 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:29.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:29.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:07:29.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:29.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:07:29.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:29.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:07:29.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:07:29.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:07:29.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:07:29.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:07:29.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:07:29.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:07:29.929 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:07:29.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:29.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:29.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:29.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:07:30.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:07:30.460 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:07:30.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:30.464 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:07:30.466 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:07:30.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:30.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:30.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:30.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:30.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:30.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:30.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:30.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:30.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:30.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:30.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:30.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:30.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:30.885 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:07:30.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:30.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:30.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:30.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:31.356 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:07:31.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:07:31.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:31.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:31.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:31.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:32.297 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:07:32.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:32.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:32.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:32.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:32.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:32.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:32.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:32.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:32.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:32.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:32.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:32.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:32.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:32.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:32.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:32.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:32.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:32.770 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:07:32.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:32.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:32.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:32.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:33.243 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:07:33.715 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:07:33.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:33.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:33.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:33.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:34.186 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:07:34.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:34.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:34.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:34.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:34.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:34.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:34.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:34.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:34.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:34.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:34.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:34.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:34.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:34.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:34.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:34.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:34.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:34.657 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:07:34.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:34.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:34.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:34.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:35.130 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:07:35.602 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:07:36.075 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:07:36.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:36.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:36.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:36.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:36.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:36.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:36.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:36.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:36.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:36.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:36.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:36.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:36.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:36.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:36.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:36.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:36.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:36.546 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:07:37.019 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:07:37.491 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:07:37.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:37.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:37.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:37.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:37.963 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:07:37.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:37.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:37.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:37.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:37.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:37.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:37.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:37.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:37.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:07:37.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:07:37.973 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:07:37.973 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.974 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.975 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:37.975 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:07:42.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:07:42.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:07:42.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:42.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:42.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:42.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:42.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:07:42.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:42.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:42.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:07:42.985 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:07:42.988 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:07:42.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:07:42.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:42.988 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:42.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:07:42.988 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:07:42.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:07:42.988 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:07:42.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:42.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:07:42.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:07:42.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:42.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:42.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:07:42.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:07:42.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:07:42.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:07:42.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:42.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:07:42.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:07:42.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:42.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:07:42.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:07:42.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:07:42.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:07:42.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:07:42.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:42.995 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:07:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:07:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:07:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:07:42.995 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:07:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:07:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:07:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:07:42.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:07:42.996 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:07:42.996 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:07:42.996 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:42.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:07:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:07:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:07:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:07:43.001 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:07:43.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:07:43.524 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:07:43.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:43.528 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:07:43.530 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:07:43.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:43.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:43.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:43.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:43.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:43.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:43.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:43.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:43.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:43.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:43.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:43.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:43.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:43.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:43.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:43.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:43.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:43.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:43.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:43.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:43.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:43.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:43.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:43.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:43.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:43.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:43.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:43.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:43.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:43.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:43.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:07:43.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:43.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:43.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:44.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:44.422 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:07:44.895 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:07:45.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:45.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:45.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:45.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:45.364 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:07:45.834 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:07:45.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:45.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:45.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:45.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:45.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:45.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:45.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:45.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:45.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:45.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:45.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:45.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:45.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:45.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:45.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:45.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:46.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:46.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:46.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:46.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:46.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:46.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:46.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:46.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:46.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:46.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:46.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:46.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:46.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:46.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:46.117 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:46.117 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:46.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:46.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:46.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:46.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:46.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:46.302 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:07:46.771 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:07:47.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:47.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:47.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:47.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:47.242 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:07:47.713 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:07:48.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:07:48.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:07:48.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:07:48.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:07:48.184 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:07:48.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:48.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:48.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:48.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:48.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:48.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:48.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:48.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:48.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:48.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:48.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:48.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:48.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:48.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:48.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:48.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:48.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:48.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:48.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:48.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:48.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:48.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:48.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:48.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:48.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:48.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:48.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:48.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:48.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:48.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:48.656 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:07:48.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:48.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:48.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:48.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:49.129 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:07:49.601 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:07:50.071 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:07:50.543 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:07:50.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:50.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:50.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:50.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:50.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:50.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:50.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:50.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:50.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:50.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:50.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:50.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:50.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:50.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:50.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:50.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:50.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:51.016 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:07:51.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:51.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:51.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:51.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:51.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:51.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:51.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:51.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:51.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:51.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:51.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:51.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:51.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:51.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:51.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:51.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:51.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:51.489 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:07:51.961 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:07:52.431 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:07:52.902 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:07:53.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:53.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:53.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:53.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:53.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:53.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:53.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:53.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:53.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:53.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:53.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:53.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:53.373 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:07:53.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:53.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:53.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:53.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:53.844 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:07:53.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:54.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:54.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:54.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:54.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:54.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:54.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:54.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:54.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:54.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:54.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:54.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:54.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:54.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:54.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:54.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:54.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:54.314 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:07:54.785 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:07:55.259 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:07:55.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:55.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:55.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:55.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:55.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:55.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:55.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:55.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:55.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:55.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:55.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:55.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:55.731 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:07:55.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:55.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:55.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:55.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:55.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:56.202 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:07:56.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:56.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:56.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:56.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:56.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:56.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:56.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:56.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:56.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:56.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:56.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:56.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:56.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:56.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:56.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:56.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:56.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:56.674 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:07:57.144 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:07:57.615 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:07:58.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:58.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:58.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:58.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:58.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:58.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:58.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:58.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:58.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:58.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:58.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:58.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:58.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:58.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:58.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:58.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:58.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:58.086 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:07:58.557 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:07:58.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:58.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:58.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:58.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:58.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:07:58.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:07:58.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:07:58.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:58.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:58.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:58.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:07:58.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:07:58.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:07:58.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:07:58.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:07:58.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:58.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:07:59.027 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:07:59.498 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:07:59.971 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:08:00.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:00.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:00.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:00.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:00.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:00.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:00.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:00.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:00.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:00.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:00.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:00.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:00.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:00.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:00.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:00.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:00.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:00.443 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:08:00.915 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:08:00.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:00.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:01.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:01.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:01.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:01.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:01.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:01.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:01.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:01.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:01.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:01.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:01.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:01.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:01.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:01.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:01.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:01.386 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:08:01.860 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:08:02.332 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:08:02.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:02.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:02.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:02.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:02.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:02.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:02.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:02.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:02.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:02.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:02.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:02.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:02.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:02.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:02.741 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4271 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4271 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4271 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4272 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4272 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4272 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4272 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4272 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4272 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4272 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:02.741 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4272 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:07.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:07.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:07.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:07.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:07.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:07.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:07.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:07.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:07.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:07.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:07.749 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:08:07.751 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:08:07.751 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:08:07.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:07.751 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:07.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:07.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:08:07.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:07.751 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:08:07.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:07.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:08:07.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:08:07.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:07.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:07.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:07.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:08:07.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:07.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:08:07.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:07.756 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:08:07.756 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:08:07.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:07.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:07.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:07.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:08:07.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:07.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:08:07.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:07.759 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:08:07.759 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:08:07.759 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:08:07.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:07.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:07.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:07.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:07.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:07.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:07.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:07.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:07.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:07.764 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:08:08.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:08:08.294 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:08:08.296 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:08:08.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.298 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:08:08.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:08.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:08.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:08.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:08.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:08.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:08.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:08.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:08.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:08.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:08.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:08.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:08.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:08.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:08.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:08.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:08.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:08.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:08.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:08.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:08.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:08.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:08.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:08.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:08.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:08.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:08.710 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:08:08.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:08.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:08.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:08.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:08.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:08.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:08.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:08.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:08.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:08.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:08.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:08.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:08.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:08.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:08.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:08.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:09.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:09.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:09.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:09.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:09.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:09.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:09.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:09.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:09.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:09.175 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:08:09.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:09.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:09.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:09.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:09.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:09.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:09.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:09.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:09.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:09.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:09.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:09.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:09.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:09.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:09.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:09.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:09.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:09.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:09.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:09.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:09.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:09.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:09.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:09.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:09.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:09.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:09.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:09.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:09.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:09.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.643 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:08:09.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:09.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:09.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:09.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:09.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:09.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:09.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:09.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:09.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:09.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:09.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:09.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:09.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:09.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:09.739 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=430 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=430 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=430 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=430 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=430 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=430 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=430 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=431 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:09.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:14.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:14.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:14.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:14.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:14.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:14.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:14.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:14.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:14.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:14.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:14.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:08:14.754 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:08:14.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:08:14.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:14.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:14.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:14.755 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:08:14.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:14.755 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:08:14.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:14.757 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:08:14.757 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:08:14.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:14.758 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:14.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:14.758 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:08:14.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:14.758 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:08:14.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:14.760 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:08:14.760 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:08:14.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:14.760 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:14.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:14.760 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:08:14.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:14.760 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:08:14.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:14.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:08:14.764 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:08:14.764 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:08:14.764 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:14.768 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:08:15.245 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:08:15.291 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:08:15.294 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:08:15.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:15.296 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:08:15.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:15.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:15.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:15.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:15.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:15.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:15.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:15.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:15.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:15.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:15.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:15.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:15.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:15.711 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:08:15.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:15.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:15.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:15.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:16.176 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:08:16.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:16.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:16.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:16.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:16.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:16.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:16.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:16.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:16.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:16.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:16.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:16.212 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:16.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:16.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:16.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:16.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:16.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:16.646 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:08:16.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:16.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:16.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:16.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:16.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:16.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:16.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:16.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:16.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:16.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:16.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:16.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:16.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:16.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:16.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:16.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:16.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:16.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:16.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:16.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:16.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:17.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:08:17.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:17.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:17.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:17.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:17.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:17.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:17.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:17.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:17.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:17.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:17.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:17.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:17.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:17.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:17.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:17.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:17.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:17.588 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:08:17.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:17.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:17.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:17.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:17.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:17.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:17.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:17.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:17.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:17.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:17.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:17.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:17.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:17.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:17.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:17.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:17.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:17.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:17.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:17.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:17.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:18.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:18.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:18.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:18.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:18.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:18.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:18.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:18.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:18.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:18.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:18.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:18.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.057 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:08:18.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:18.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:18.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:18.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:18.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:18.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:18.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:18.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:18.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:18.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:18.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:18.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:18.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:18.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.528 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:08:18.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:18.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:18.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:18.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:18.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:18.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:18.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:18.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:18.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:18.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:18.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:18.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:18.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:18.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:18.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:18.995 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:08:19.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:19.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:19.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:19.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:19.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:19.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:19.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:19.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:19.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:19.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:19.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:19.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:19.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:19.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:19.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:19.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:19.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:19.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:19.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:19.403 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:08:19.403 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:19.403 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:19.403 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:19.403 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:19.403 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:19.403 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:19.403 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:24.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:24.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:24.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:24.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:24.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:24.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:24.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:24.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:24.415 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:24.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:24.415 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:08:24.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:08:24.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:08:24.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:24.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:24.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:24.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:08:24.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:24.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:08:24.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:24.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:08:24.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:08:24.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:24.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:24.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:24.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:08:24.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:24.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:08:24.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:24.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:08:24.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:08:24.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:24.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:24.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:24.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:08:24.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:24.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:08:24.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:24.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:08:24.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:08:24.425 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:08:24.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:24.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:24.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:24.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:24.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:08:24.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:08:24.959 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:08:24.961 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:08:24.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:24.964 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:08:24.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:24.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:24.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:24.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:24.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:24.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:24.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:24.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:25.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:25.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:25.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:25.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:25.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:25.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:25.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.374 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:08:25.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:25.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:25.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:25.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:25.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:25.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:25.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:25.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:25.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:25.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:25.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:25.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:25.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:25.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.838 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:08:25.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:25.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:25.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:25.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:25.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:25.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:25.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:25.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:25.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:25.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:26.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:26.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:26.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:26.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:26.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:26.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:26.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:26.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:26.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:26.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:26.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:26.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:26.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:26.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:26.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:26.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:26.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:26.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:26.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:26.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:26.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:26.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:26.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:26.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:26.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:26.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:26.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:26.245 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:08:26.245 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.245 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.246 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.247 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:26.247 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:31.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:31.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:31.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:31.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:31.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:31.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:31.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:31.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:31.252 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:31.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:31.252 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:08:31.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:08:31.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:08:31.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:31.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:31.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:31.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:08:31.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:31.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:08:31.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:31.256 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:08:31.256 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:08:31.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:31.257 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:31.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:31.257 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:08:31.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:31.257 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:08:31.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:31.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:08:31.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:08:31.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:31.258 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:31.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:31.259 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:08:31.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:31.259 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:08:31.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:08:31.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:08:31.262 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:08:31.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:31.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:31.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:31.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:31.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:31.266 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:08:31.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:08:31.791 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:08:31.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:31.794 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:08:31.797 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:08:31.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:31.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:31.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:31.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:31.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:31.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:31.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:31.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:31.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:31.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:31.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:31.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:31.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:32.217 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:08:32.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:32.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:32.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:32.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:32.688 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:08:32.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:32.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:32.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:32.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:32.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:32.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:32.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:32.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:32.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:32.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:32.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:32.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:32.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:32.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:32.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:32.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:32.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:33.159 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:08:33.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:33.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:33.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:33.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:33.632 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:08:33.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:33.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:33.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:33.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:33.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:33.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:33.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:33.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:33.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:33.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:33.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:33.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:33.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:33.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:33.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:33.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:33.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:34.104 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:08:34.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:34.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:34.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:34.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:34.576 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:08:34.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:34.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:34.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:34.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:34.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:34.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:34.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:34.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:34.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:34.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:34.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:34.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:34.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:34.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:34.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:34.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:34.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:35.047 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:08:35.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:35.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:35.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:35.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:35.518 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:08:35.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:35.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:35.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:35.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:35.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:35.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:35.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:35.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:35.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:35.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:35.856 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:35.856 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:35.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:35.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:35.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:35.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:35.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:35.991 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:08:36.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:36.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:36.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:36.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:36.463 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:08:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:36.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:36.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:36.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:36.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:36.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:36.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:36.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:36.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:36.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:36.522 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:36.522 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:36.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:36.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:36.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:36.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:36.935 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:08:37.406 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:08:37.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:37.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:37.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:37.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:37.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:37.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:37.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:37.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:37.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:37.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:37.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:37.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:37.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:37.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:37.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:37.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:37.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:37.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:08:38.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:38.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:38.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:38.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:38.350 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:08:38.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:38.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:38.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:38.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:38.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:38.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:38.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:38.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:38.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:38.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:38.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:38.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:38.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:38.818 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:08:39.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:39.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:39.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:39.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:39.289 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:08:39.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:39.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:39.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:39.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:39.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:39.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:39.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:39.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:39.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:39.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:39.298 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:39.298 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:44.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:44.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:44.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:44.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:44.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:44.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:44.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:44.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:44.306 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:44.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:44.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:08:44.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:08:44.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:08:44.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:44.308 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:44.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:44.309 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:08:44.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:44.309 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:08:44.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:44.310 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:08:44.310 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:08:44.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:44.310 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:44.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:44.310 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:08:44.311 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:44.311 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:08:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:44.312 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:08:44.312 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:08:44.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:44.312 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:44.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:44.313 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:08:44.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:44.313 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:08:44.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:44.315 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:08:44.316 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:08:44.316 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:08:44.316 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:44.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:44.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:44.321 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:08:44.800 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:08:44.843 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:08:44.844 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:08:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:44.847 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:08:44.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:44.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:44.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:44.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:44.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:44.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:44.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:44.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:44.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:44.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:44.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:44.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:44.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:45.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:45.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:45.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:45.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:45.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:45.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:45.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:45.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:45.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:45.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:45.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:45.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:45.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:45.267 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:08:45.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:45.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:45.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:45.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:45.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:45.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:45.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:45.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:45.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:45.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:45.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:45.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:45.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:45.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:45.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:45.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:45.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:45.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:45.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:45.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:45.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:45.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:45.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:45.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:45.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:45.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:45.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:45.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:45.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.738 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:08:45.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:45.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:45.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:45.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:45.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:45.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:45.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:45.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:45.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:45.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:45.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:45.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:45.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:45.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:45.909 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:08:45.909 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:45.910 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:45.910 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:45.910 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:45.910 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:45.910 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:45.910 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:50.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:50.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:50.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:50.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:50.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:50.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:50.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:50.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:50.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:50.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:50.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:08:50.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:08:50.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:08:50.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:50.922 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:50.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:50.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:08:50.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:50.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:08:50.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:50.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:08:50.925 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:08:50.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:50.925 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:50.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:50.925 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:08:50.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:50.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:08:50.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:50.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:08:50.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:08:50.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:50.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:50.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:50.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:08:50.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:50.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:08:50.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:50.930 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:08:50.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:08:50.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:08:50.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:08:50.931 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:08:50.931 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:08:50.931 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:50.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:50.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:50.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:50.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:50.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:50.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:50.936 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:08:51.414 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:08:51.458 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:08:51.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:51.461 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:08:51.464 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:08:51.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:51.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:51.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:51.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:51.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:51.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:51.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:51.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:51.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:51.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:51.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:51.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:51.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:51.637 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=152 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:51.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:51.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:51.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:51.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:51.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:51.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:51.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:51.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:51.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:51.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:51.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:51.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:51.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:51.881 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:08:51.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:51.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:51.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:51.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:51.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:51.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:51.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:51.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:51.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:51.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:51.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:51.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:51.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:51.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:51.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:52.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:52.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:52.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:52.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:52.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:52.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:52.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:52.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:52.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:52.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:52.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:52.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:52.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:52.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:52.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:52.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:52.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:52.352 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:08:52.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:52.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:52.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:52.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:52.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:52.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:52.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:52.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:52.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:52.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:52.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:52.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:52.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:52.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:52.520 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:08:52.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:52.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:52.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:52.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:52.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:52.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:52.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:57.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:57.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:57.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:57.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:57.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:57.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:57.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:57.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:57.535 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:57.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:08:57.535 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:08:57.538 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:08:57.538 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:08:57.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:57.539 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:57.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:57.539 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:08:57.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:08:57.540 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:08:57.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:57.541 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:08:57.541 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:08:57.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:57.541 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:57.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:57.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:08:57.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:08:57.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:08:57.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:57.543 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:08:57.543 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:08:57.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:57.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:08:57.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:57.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:08:57.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:08:57.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:08:57.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:08:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:08:57.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:08:57.547 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:08:57.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:08:57.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:08:58.029 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:08:58.070 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:08:58.072 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:08:58.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:58.074 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:08:58.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:58.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:58.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:58.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:58.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:58.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:58.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:58.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:58.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:58.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:58.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:58.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:58.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:58.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:58.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:58.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:58.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:58.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:58.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:58.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:58.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:58.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:58.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:58.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:58.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:58.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:58.497 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:08:58.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:58.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:58.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:58.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:58.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:58.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:58.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:58.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:58.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:58.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:58.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:58.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:58.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:58.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:58.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:58.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:58.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:58.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:58.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:58.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:08:58.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:58.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:58.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:08:58.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:08:58.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:58.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:08:58.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:08:58.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:58.968 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:08:59.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:08:59.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:08:59.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:08:59.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:08:59.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:08:59.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:08:59.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:08:59.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:08:59.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:08:59.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:08:59.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:08:59.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:08:59.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:08:59.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:08:59.133 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:08:59.133 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:59.134 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:59.134 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:59.134 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:59.134 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:59.134 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:08:59.134 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:04.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:04.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:04.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:04.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:04.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:04.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:04.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:04.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:04.146 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:04.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:04.147 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:09:04.150 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:09:04.150 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:09:04.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:04.150 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:04.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:04.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:09:04.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:04.151 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:09:04.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:04.152 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:09:04.152 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:09:04.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:04.153 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:04.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:04.153 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:09:04.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:04.153 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:09:04.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:04.155 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:09:04.155 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:09:04.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:04.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:04.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:04.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:09:04.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:04.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:09:04.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:04.158 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:09:04.158 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:09:04.158 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:09:04.158 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:04.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:04.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:04.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:04.163 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:09:04.642 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:09:04.692 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:09:04.694 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:09:04.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:04.696 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:09:04.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:04.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:04.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:04.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:04.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:04.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:04.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:04.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:04.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:04.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:04.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:04.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:04.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:04.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:04.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:04.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:04.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:04.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:04.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:04.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:04.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:04.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:04.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:04.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:04.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:04.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:04.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:04.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:04.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:05.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:05.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:05.114 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:09:05.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:05.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:05.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:05.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:05.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:05.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:05.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:05.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:05.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:05.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:05.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:05.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:05.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:05.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:05.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:05.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:05.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:05.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:05.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:05.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:05.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:05.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:05.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:05.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:05.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:05.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:05.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:05.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.585 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:09:05.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:05.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:05.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:05.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:05.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:05.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:05.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:05.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:05.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:05.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:05.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:05.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:05.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:05.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:05.756 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.758 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.758 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:05.758 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:10.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:10.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:10.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:10.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:10.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:10.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:10.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:10.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:10.766 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:10.767 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:10.767 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:09:10.769 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:09:10.769 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:09:10.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:10.769 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:10.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:10.769 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:09:10.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:10.770 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:09:10.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:10.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:09:10.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:09:10.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:10.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:10.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:10.771 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:09:10.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:10.771 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:09:10.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:10.772 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:09:10.772 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:09:10.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:10.772 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:10.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:10.772 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:09:10.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:10.772 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:09:10.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:10.774 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:09:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:09:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:09:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:09:10.774 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:09:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:09:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:09:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:09:10.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:09:10.775 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:09:10.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:10.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:10.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:10.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:10.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:10.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:10.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:10.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:10.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:09:11.257 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:09:11.304 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:09:11.306 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:09:11.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:11.308 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:09:11.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:11.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:11.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:11.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:11.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:11.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:11.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:11.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:11.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:11.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:11.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:11.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:11.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:11.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:11.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:11.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:11.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:11.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:11.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:11.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:11.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:11.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:11.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:11.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:11.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:11.723 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:09:11.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:11.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:11.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:11.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:11.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:11.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:11.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:11.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:11.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:12.191 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:09:12.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:12.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:12.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:12.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:12.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:12.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:12.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:12.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:12.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:12.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:12.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:12.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:12.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:12.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:12.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:12.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:12.662 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:09:12.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:12.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:12.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:12.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:13.133 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:09:13.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:13.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:13.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:13.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:13.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:13.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:13.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:13.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:13.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:13.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:13.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:13.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:13.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:13.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:13.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:13.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:13.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:13.606 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:09:13.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:13.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:13.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:13.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:14.079 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:09:14.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:14.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:14.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:14.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:14.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:14.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:14.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:14.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:14.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:14.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:14.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:14.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:14.408 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:14.408 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:14.408 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:09:14.408 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:14.408 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:14.408 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:14.408 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:14.408 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:19.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:19.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:19.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:19.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:19.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:19.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:19.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:19.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:19.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:19.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:19.424 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:09:19.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:09:19.427 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:09:19.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:19.427 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:19.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:19.427 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:09:19.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:19.428 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:09:19.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:19.429 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:09:19.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:09:19.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:19.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:19.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:19.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:09:19.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:19.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:09:19.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:19.431 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:09:19.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:09:19.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:19.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:19.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:19.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:09:19.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:19.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:09:19.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:19.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:09:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:09:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:09:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:09:19.433 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:09:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:09:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:09:19.434 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:09:19.434 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:09:19.434 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:19.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:19.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:19.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:19.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:19.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:19.439 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:09:19.917 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:09:19.955 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:09:19.957 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:09:19.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:19.959 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:09:19.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:19.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:19.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:19.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:19.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:19.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:19.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:19.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:20.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:20.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:20.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:20.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:20.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:20.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:20.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:20.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:20.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:20.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:20.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:20.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:20.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:20.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:20.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:20.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:20.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:20.389 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:09:20.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:20.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:20.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:20.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:20.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:20.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:20.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:20.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:20.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:20.883 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:09:20.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:20.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:20.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:20.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:20.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:20.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:20.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:20.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:20.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:20.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:20.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:20.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:20.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:20.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:20.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:20.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:20.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:21.355 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:09:21.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:21.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:21.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:21.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:21.826 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:09:21.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:21.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:21.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:21.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:21.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:21.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:21.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:22.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:22.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:22.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:22.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:22.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:22.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:22.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:22.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:22.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:22.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:22.297 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:09:22.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:22.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:22.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:22.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:22.768 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:09:23.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:23.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:23.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:23.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:23.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:23.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:23.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:23.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:23.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:23.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:23.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:23.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:23.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:23.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:23.102 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:23.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:28.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:28.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:28.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:28.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:28.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:28.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:28.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:28.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:28.115 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:28.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:28.116 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:09:28.118 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:09:28.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:09:28.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:28.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:28.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:28.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:09:28.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:28.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:09:28.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:28.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:09:28.121 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:09:28.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:28.121 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:28.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:28.121 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:09:28.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:28.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:09:28.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:28.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:09:28.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:09:28.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:28.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:28.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:09:28.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:28.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:28.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:09:28.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:28.127 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:09:28.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:09:28.128 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:09:28.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:28.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:28.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:28.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:09:28.610 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:09:28.664 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:09:28.666 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:09:28.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:28.669 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:09:28.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:28.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:28.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:28.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:28.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:28.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:28.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:28.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:28.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:28.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:28.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:28.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:28.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:29.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:29.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:29.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:29.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:29.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:29.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:29.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:29.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:29.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:29.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:29.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:29.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:29.082 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:09:29.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:29.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:29.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:29.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:29.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:29.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:29.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:29.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:29.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:29.554 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:09:29.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:29.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:29.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:29.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:29.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:29.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:29.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:29.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:29.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:29.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:29.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:29.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:29.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:29.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:29.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:29.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:29.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:30.025 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:09:30.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:30.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:30.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:30.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:30.498 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:09:30.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:30.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:30.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:30.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:30.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:30.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:30.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:30.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:30.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:30.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:30.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:30.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:30.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:30.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:30.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:30.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:30.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:30.970 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:09:31.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:31.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:31.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:31.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:31.442 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:09:31.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:31.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:31.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:31.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:31.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:31.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:31.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:31.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:31.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:31.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:31.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:31.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:31.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:31.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:31.778 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:09:31.778 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:31.778 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:31.778 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:31.778 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:31.778 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:31.778 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:31.779 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:36.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:36.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:36.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:36.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:36.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:36.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:36.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:36.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:36.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:36.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:36.785 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:09:36.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:09:36.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:09:36.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:36.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:36.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:36.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:09:36.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:36.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:09:36.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:36.789 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:09:36.789 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:09:36.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:36.789 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:36.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:36.789 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:09:36.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:36.789 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:09:36.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:36.791 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:09:36.791 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:09:36.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:36.791 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:36.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:36.791 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:09:36.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:36.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:09:36.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:36.794 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:09:36.794 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:09:36.794 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:09:36.795 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:36.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:36.799 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:09:37.277 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:09:37.321 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:09:37.322 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:09:37.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:37.323 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:09:37.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:37.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:37.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:37.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:37.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:37.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:37.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:37.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:37.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:37.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:37.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:37.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:37.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:37.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:37.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:37.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:37.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:37.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:37.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:37.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:37.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:37.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:37.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:37.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:37.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:37.744 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:09:37.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:37.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:37.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:37.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:37.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:37.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:37.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:37.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:37.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:38.216 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:09:38.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:38.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:38.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:38.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:38.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:38.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:38.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:38.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:38.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:38.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:38.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:38.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:38.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:38.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:38.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:38.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:38.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:38.689 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:09:38.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:38.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:38.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:38.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:39.162 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:09:39.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:39.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:39.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:39.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:39.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:39.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:39.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:39.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:39.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:39.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:39.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:09:39.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:09:39.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:39.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:09:39.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:09:39.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:39.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:39.629 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:09:39.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:39.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:39.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:39.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:40.100 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:09:40.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:40.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:09:40.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:40.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:40.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:40.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:40.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:40.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:40.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:40.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:40.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:40.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:40.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:40.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:40.433 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:40.433 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:45.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:45.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:45.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:45.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:45.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:45.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:45.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:45.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:45.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:45.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:45.473 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:09:45.481 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:09:45.481 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:09:45.481 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:45.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:45.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:45.482 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:09:45.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:45.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:09:45.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:45.486 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:09:45.487 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:09:45.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:45.487 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:45.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:45.487 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:09:45.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:45.488 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:09:45.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:45.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:09:45.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:09:45.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:45.492 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:45.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:45.492 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:09:45.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:45.492 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:09:45.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:09:45.498 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:09:45.498 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:09:45.498 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:45.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:45.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:45.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:45.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:45.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:45.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:45.503 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:09:45.980 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:09:46.034 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:09:46.037 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:09:46.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:46.040 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:09:46.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:46.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:46.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:46.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:46.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:46.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:46.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:46.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:46.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:46.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:46.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:46.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:46.079 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:46.080 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:46.080 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:51.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:51.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:51.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:51.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:51.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:51.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:51.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:51.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:51.091 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:51.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:51.091 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:09:51.093 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:09:51.093 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:09:51.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:51.093 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:51.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:51.093 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:09:51.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:51.093 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:09:51.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:51.095 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:09:51.095 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:09:51.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:51.095 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:51.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:51.095 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:09:51.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:51.095 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:09:51.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:51.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:09:51.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:09:51.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:51.097 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:51.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:51.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:09:51.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:51.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:09:51.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:51.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:09:51.100 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:09:51.100 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:09:51.100 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:51.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:51.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:51.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:51.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:51.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:51.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:51.104 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:09:51.582 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:09:51.631 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:09:51.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:51.635 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:09:51.637 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:09:51.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:51.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:51.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:51.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:51.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:51.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:51.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:51.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:51.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:51.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:51.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:51.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:51.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:51.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:51.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:51.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:51.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:51.699 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:09:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:51.699 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:56.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:56.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:56.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:56.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:56.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:56.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:56.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:56.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:56.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:56.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:09:56.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:09:56.715 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:09:56.715 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:09:56.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:56.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:56.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:56.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:09:56.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:09:56.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:09:56.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:56.718 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:09:56.718 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:09:56.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:56.718 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:56.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:56.718 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:09:56.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:09:56.718 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:09:56.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:56.720 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:09:56.720 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:09:56.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:56.720 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:09:56.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:56.720 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:09:56.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:09:56.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:09:56.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:56.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:09:56.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:09:56.723 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:09:56.723 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:09:56.728 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:09:57.207 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:09:57.249 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:09:57.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:09:57.252 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:09:57.256 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:09:57.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:09:57.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:09:57.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:09:57.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:09:57.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:09:57.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:09:57.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:09:57.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:09:57.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:09:57.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:09:57.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:09:57.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:09:57.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:09:57.308 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:09:57.308 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:57.308 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:57.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:57.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:57.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:57.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:09:57.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:10:02.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:10:02.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:10:02.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:02.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:02.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:02.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:02.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:02.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:10:02.318 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:02.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:10:02.318 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:10:02.323 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:10:02.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:10:02.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:10:02.324 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:02.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:02.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:10:02.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:10:02.325 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:10:02.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:02.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:10:02.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:10:02.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:10:02.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:02.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:10:02.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:02.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:10:02.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:10:02.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:02.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:10:02.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:10:02.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:10:02.332 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:02.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:02.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:10:02.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:10:02.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:10:02.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:02.335 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:10:02.335 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:10:02.335 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:10:02.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:02.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:02.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:10:02.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:10:02.338 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:10:07.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:10:07.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:10:07.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:07.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:07.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:07.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:07.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:07.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:10:07.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:07.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:10:07.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:10:07.355 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:10:07.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:10:07.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:10:07.356 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:07.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:07.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:10:07.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:10:07.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:10:07.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:07.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:10:07.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:10:07.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:10:07.358 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:07.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:07.358 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:10:07.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:10:07.358 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:10:07.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:07.360 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:10:07.360 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:10:07.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:10:07.360 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:07.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:07.360 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:10:07.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:10:07.360 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:10:07.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:07.362 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:10:07.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:10:07.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:10:07.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:10:07.362 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:10:07.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:10:07.363 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:10:07.363 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:10:07.363 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:07.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:07.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:07.368 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:10:07.845 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:10:07.889 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:10:07.891 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:10:07.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:07.894 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:10:07.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:07.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:07.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:07.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:07.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:07.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:07.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:07.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:07.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:07.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:07.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:07.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:07.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:08.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:10:08.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:08.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:08.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:08.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:08.784 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:10:08.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:08.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:08.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:08.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:08.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:08.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:08.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:08.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:08.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:08.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:08.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:08.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:08.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:08.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:08.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:08.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:08.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:09.254 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:10:09.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:09.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:09.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:09.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:09.725 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:10:09.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:09.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:09.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:09.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:09.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:09.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:09.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:09.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:09.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:09.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:09.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:09.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:09.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:09.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:09.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:09.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:09.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:10.198 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:10:10.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:10.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:10.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:10.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:10.671 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:10:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:10.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:10.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:10.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:10.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:10.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:10.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:10.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:10.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:10.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:10.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:10.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:10.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:10.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:10.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:10.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:11.138 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:10:11.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:11.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:11.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:11.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:11.609 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:10:11.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:11.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:11.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:11.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:11.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:11.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:11.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:11.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:11.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:11.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:11.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:11.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:11.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:11.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:11.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:11.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:11.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:12.082 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:10:12.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:12.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:12.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:12.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:12.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:12.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:12.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:12.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:12.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:12.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:12.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:12.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:12.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:12.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:12.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:12.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:12.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:12.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:12.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:12.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:12.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:12.555 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:10:13.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:13.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:13.027 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:10:13.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:13.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:13.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:13.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:13.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:13.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:13.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:13.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:13.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:13.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:13.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:13.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:13.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:13.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:13.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:13.500 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:10:13.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:13.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:13.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:13.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:13.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:13.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:13.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:13.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:13.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:13.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:13.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:13.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:13.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:13.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:13.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:13.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:13.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:13.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:13.973 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:10:14.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:14.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:14.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:14.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:14.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:14.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:14.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:14.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:14.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:14.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:14.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:14.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:14.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:14.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:14.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:14.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:14.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:14.445 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:10:14.916 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:10:14.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:14.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:14.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:14.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:14.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:14.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:14.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:14.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:14.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:14.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:14.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:14.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:14.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:14.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:14.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:14.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:14.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:14.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:15.387 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:10:15.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:15.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:15.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:15.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:15.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:15.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:15.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:15.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:15.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:15.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:15.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:15.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:15.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:15.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:15.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:15.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:15.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:15.858 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:10:16.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:16.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:16.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:16.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:16.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:16.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:16.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:16.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:16.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:16.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:16.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:16.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:16.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:16.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:16.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:16.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:16.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:16.329 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:10:16.802 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:10:16.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:16.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:16.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:16.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:16.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:16.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:16.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:16.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:16.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:16.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:16.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:16.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:16.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:16.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:16.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:16.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:16.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:17.275 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:10:17.747 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:10:17.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:17.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:17.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:17.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:17.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:17.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:17.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:17.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:17.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:17.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:17.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:17.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:17.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:17.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:17.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:17.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:17.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:18.217 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:10:18.691 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:10:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:18.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:18.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:18.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:18.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:18.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:18.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:18.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:18.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:18.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:18.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:18.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:18.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:18.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:18.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:18.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:18.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:19.159 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:10:19.630 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:10:19.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:19.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:19.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:19.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:19.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:19.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:19.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:19.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:19.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:19.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:19.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:19.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:19.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:19.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:19.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:19.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:19.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:20.101 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:10:20.574 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:10:20.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:20.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:20.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:20.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:20.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:20.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:20.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:20.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:20.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:20.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:20.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:20.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:20.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:20.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:20.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:20.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:20.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:21.042 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:10:21.513 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:10:21.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:21.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:21.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:21.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:21.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:21.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:21.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:21.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:21.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:21.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:21.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:21.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:21.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:21.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:21.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:21.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:21.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:21.986 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:10:22.458 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:10:22.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:22.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:22.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:22.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:22.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:22.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:22.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:22.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:22.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:22.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:22.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:22.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:22.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:22.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:22.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:22.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:22.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:22.939 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:10:23.410 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:10:23.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:23.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:23.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:23.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:23.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:23.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:23.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:23.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:23.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:23.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:23.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:23.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:23.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:23.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:23.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:23.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:23.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:23.881 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:10:24.353 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:10:24.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:24.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:24.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:24.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:24.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:24.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:24.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:24.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:24.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:24.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:24.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:24.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:24.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:10:24.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:10:24.499 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:10:29.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:10:29.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:10:29.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:29.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:29.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:29.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:29.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:29.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:10:29.515 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:29.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:10:29.515 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:10:29.518 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:10:29.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:10:29.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:10:29.519 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:29.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:29.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:10:29.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:10:29.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:10:29.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:29.521 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:10:29.521 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:10:29.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:10:29.521 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:29.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:29.521 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:10:29.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:10:29.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:10:29.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:29.523 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:10:29.523 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:10:29.523 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:10:29.523 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:29.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:29.523 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:10:29.523 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:10:29.523 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:10:29.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:29.526 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:10:29.526 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:10:29.526 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:10:29.527 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:29.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:29.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:29.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:29.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:29.531 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:10:30.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:10:30.054 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:10:30.056 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:10:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:30.058 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:10:30.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:30.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:30.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:30.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:30.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:30.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:30.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:30.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:30.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:30.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:30.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:30.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:30.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:30.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:30.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:30.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:30.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:30.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:30.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:30.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:30.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:30.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:30.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:30.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.476 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:10:30.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:30.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:30.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:30.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:30.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:30.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:30.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:30.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:30.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:30.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:30.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:30.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:30.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:30.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:30.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:30.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:30.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:30.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:30.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:30.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:30.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:30.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:30.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:10:30.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:30.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:30.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:10:30.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:10:30.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:30.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:10:30.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:10:30.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:30.944 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:10:31.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:10:31.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:10:31.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:10:31.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:10:31.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:31.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:31.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:31.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:31.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:31.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:31.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:31.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:31.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:10:31.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:10:31.127 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:10:36.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:10:36.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:10:36.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:36.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:36.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:36.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:36.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:10:36.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:10:36.146 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:36.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:10:36.146 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:10:36.148 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:10:36.149 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:10:36.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:10:36.149 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:36.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:10:36.150 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:10:36.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:10:36.150 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:10:36.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:10:36.151 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:10:36.151 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:10:36.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:10:36.151 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:36.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:10:36.151 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:10:36.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:10:36.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:10:36.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:10:36.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:10:36.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:10:36.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:10:36.153 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:10:36.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:10:36.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:10:36.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:10:36.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:10:36.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:10:36.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:10:36.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:10:36.155 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:10:36.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:36.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:36.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:36.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:10:36.159 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:10:36.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:10:37.110 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:10:37.583 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:10:38.056 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:10:38.528 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:10:39.003 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:10:39.473 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:10:39.936 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:10:40.400 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:10:40.863 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:10:41.326 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:10:41.790 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:10:42.253 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:10:42.716 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:10:43.179 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:10:43.643 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:10:44.106 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:10:44.569 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:10:45.032 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:10:45.496 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:10:45.959 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:10:46.426 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:10:46.901 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:10:47.373 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:10:47.846 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:10:48.319 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:10:48.791 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:10:49.264 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:10:49.737 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:10:50.209 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:10:50.680 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:10:51.153 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:10:51.626 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:10:52.098 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:10:52.573 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:10:53.045 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:10:53.517 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:10:53.991 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:10:54.462 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:10:54.933 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:10:55.405 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:10:55.873 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:10:56.345 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:10:56.817 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:10:57.288 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:10:57.761 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:10:58.234 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:10:58.705 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:10:59.178 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:10:59.651 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:11:00.123 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:11:00.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:11:00.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:11:00.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:11:00.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:11:00.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:11:00.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:11:00.182 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5216 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5216 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5216 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5216 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5216 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5216 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5217 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5217 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5217 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.183 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5217 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.184 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5217 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.184 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5217 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.184 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5217 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:00.184 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5217 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:11:05.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:11:05.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:11:05.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:11:05.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:11:05.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:11:05.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:11:05.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:11:05.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:11:05.195 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:11:05.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:11:05.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:11:05.197 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:11:05.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:11:05.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:11:05.198 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:11:05.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:11:05.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:11:05.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:11:05.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:11:05.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:11:05.200 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:11:05.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:11:05.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:11:05.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:11:05.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:11:05.200 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:11:05.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:11:05.201 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:11:05.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:11:05.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:11:05.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:11:05.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:11:05.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:11:05.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:11:05.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:11:05.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:11:05.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:11:05.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:05.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:11:05.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:11:05.206 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:11:05.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:05.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:05.211 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:11:05.689 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:11:06.161 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:11:06.635 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:11:07.106 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:11:07.578 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:11:08.050 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:11:08.523 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:11:08.992 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:11:09.456 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:11:09.919 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:11:10.382 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:11:10.846 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:11:11.309 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:11:11.772 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:11:12.235 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:11:12.699 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:11:13.162 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:11:13.625 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:11:14.088 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:11:14.552 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:11:15.015 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:11:15.478 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:11:15.941 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:11:16.405 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:11:16.868 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:11:17.331 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:11:17.794 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:11:18.257 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:11:18.720 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:11:19.184 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:11:19.647 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:11:20.110 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:11:20.573 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:11:21.037 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:11:21.500 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:11:21.963 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:11:22.426 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:11:22.890 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:11:23.353 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:11:23.816 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:11:24.279 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:11:24.742 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:11:25.205 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:11:25.669 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:11:26.132 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:11:26.595 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:11:27.058 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:11:27.522 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:11:27.985 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:11:28.448 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:11:28.912 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:11:29.375 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:11:29.838 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:11:30.301 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:11:30.764 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:11:31.228 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:11:31.691 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:11:32.154 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:11:32.617 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:11:33.080 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:11:33.544 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:11:34.007 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:11:34.470 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:11:34.933 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:11:35.397 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:11:35.860 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:11:36.323 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:11:36.787 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:11:37.250 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:11:37.713 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:11:38.176 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:11:38.640 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:11:39.103 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:11:39.566 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:11:40.029 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:11:40.493 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:11:40.956 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:11:41.419 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:11:41.882 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:11:42.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:42.346 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:11:42.809 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:11:43.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:43.272 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:11:43.735 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:11:44.198 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:11:44.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:44.662 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:11:45.125 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:11:45.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:45.588 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:11:46.051 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:11:46.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:46.515 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:11:46.978 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:11:47.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:47.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:11:47.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:11:47.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:11:47.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:11:47.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:11:47.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:11:47.264 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:11:52.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:11:52.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:11:52.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:11:52.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:11:52.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:11:52.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:11:52.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:11:52.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:11:52.279 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:11:52.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:11:52.279 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:11:52.283 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:11:52.283 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:11:52.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:11:52.283 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:11:52.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:11:52.284 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:11:52.284 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:11:52.284 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:11:52.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:11:52.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:11:52.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:11:52.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:11:52.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:11:52.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:11:52.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:11:52.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:11:52.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:11:52.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:11:52.290 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:11:52.290 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:11:52.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:11:52.290 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:11:52.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:11:52.291 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:11:52.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:11:52.291 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:11:52.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:11:52.294 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:11:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:11:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:11:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:11:52.294 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:11:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:11:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:11:52.295 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:11:52.295 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:11:52.295 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:11:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:11:52.300 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:11:52.779 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:11:52.828 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:11:52.830 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:11:52.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:11:52.832 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:11:52.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:11:52.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:11:52.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:11:52.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:11:52.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:11:52.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:11:52.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:11:52.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:11:52.872 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:11:52.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:11:52.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:11:52.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:11:52.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:11:52.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:11:53.251 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:11:53.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:11:53.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:53.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:11:53.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:11:53.723 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:11:53.737 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:11:54.196 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:11:54.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:54.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:11:54.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:11:54.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:11:54.669 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:11:55.141 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:11:55.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:55.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:11:55.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:11:55.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:11:55.615 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:11:56.087 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:11:56.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:56.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:11:56.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:11:56.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:11:56.559 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:11:56.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:11:56.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:11:56.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:11:56.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:11:56.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:11:56.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:11:56.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:11:56.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:11:56.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:11:56.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:11:56.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:11:56.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:11:56.697 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:11:56.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:11:56.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:11:56.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:11:56.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:11:56.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:11:57.030 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:11:57.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:11:57.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:11:57.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:11:57.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:11:57.501 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:11:57.830 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:11:57.972 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:11:58.445 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:11:58.918 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:11:59.390 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:11:59.861 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:12:00.335 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:12:00.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:00.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:00.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:00.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:00.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:00.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:00.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:12:00.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:00.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:00.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:00.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:12:00.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:12:00.746 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:00.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:00.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:00.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:00.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:00.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:00.806 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:12:01.242 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:01.278 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:12:01.749 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:12:02.220 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:12:02.690 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:12:03.163 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:12:03.636 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:12:04.108 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:12:04.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:04.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:04.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:04.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:04.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:04.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:04.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:12:04.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:04.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:04.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:04.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:12:04.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:12:04.575 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:04.579 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:12:04.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:04.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:04.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:04.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:04.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:05.050 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:12:05.438 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:05.523 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:12:05.909 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:05.995 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:12:06.467 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:12:06.856 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:06.938 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:12:07.412 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:12:07.884 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:12:08.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:08.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:08.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:08.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:08.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:08.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:08.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:08.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:08.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:12:08.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:12:08.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:12:08.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:12:08.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:12:08.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:12:08.295 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:12:08.295 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3457 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:12:08.296 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3457 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:12:08.296 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3457 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:12:08.296 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3457 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:12:08.296 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3457 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:12:08.296 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3457 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:12:08.296 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3457 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:12:13.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:12:13.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:12:13.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:12:13.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:12:13.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:12:13.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:12:13.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:12:13.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:12:13.306 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:12:13.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:12:13.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:12:13.311 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:12:13.311 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:12:13.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:12:13.311 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:12:13.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:12:13.311 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:12:13.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:12:13.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:12:13.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:13.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:12:13.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:12:13.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:12:13.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:12:13.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:12:13.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:12:13.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:12:13.314 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:12:13.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:13.316 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:12:13.316 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:12:13.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:12:13.316 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:12:13.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:12:13.316 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:12:13.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:12:13.316 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:12:13.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:12:13.320 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:12:13.320 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:12:13.320 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:13.324 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:12:13.803 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:12:13.849 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:12:13.850 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:13.852 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:12:13.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:13.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:13.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:13.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:12:13.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:13.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:13.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:13.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:12:13.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:12:13.893 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:13.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:13.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:13.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:13.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:13.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:14.275 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:12:14.281 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:14.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:14.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:14.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:14.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:14.746 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:12:14.760 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:14.763 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:15.217 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:12:15.240 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:15.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:15.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:15.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:15.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:15.690 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:12:15.720 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:16.163 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:12:16.206 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:16.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:16.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:16.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:16.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:16.635 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:12:16.687 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:17.106 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:12:17.167 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:17.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:17.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:17.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:17.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:17.577 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:12:17.647 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:18.050 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:12:18.127 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:18.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:18.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:18.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:18.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:18.523 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:12:18.612 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:18.995 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:12:19.092 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:19.466 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:12:19.572 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:19.939 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:12:20.052 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:20.412 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:12:20.539 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:20.884 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:12:21.019 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:21.358 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:12:21.499 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:21.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:21.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:21.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:21.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:21.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:21.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:21.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:12:21.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:21.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:21.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:21.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:12:21.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:12:21.537 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:21.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:21.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:21.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:21.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:21.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:21.825 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:12:22.219 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:22.297 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:12:22.699 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:22.702 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:22.795 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:12:23.208 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:23.267 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:12:23.688 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:23.738 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:12:24.168 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:24.209 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:12:24.648 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:24.679 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:12:25.128 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:25.150 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:12:25.608 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:25.621 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:12:26.088 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:26.094 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:12:26.567 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:12:26.568 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:27.039 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:12:27.054 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:27.513 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:12:27.534 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:27.985 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:12:28.019 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:28.458 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:12:28.500 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:28.931 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:12:28.980 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:29.403 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:12:29.465 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:29.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:29.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:29.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:29.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:29.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:29.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:29.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:12:29.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:29.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:29.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:29.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:12:29.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:12:29.492 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:29.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:29.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:29.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:29.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:29.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:29.839 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:29.870 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:12:30.305 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:30.307 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:30.341 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:12:30.776 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:30.815 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:12:31.246 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:31.287 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:12:31.723 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:31.759 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:12:32.194 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:32.230 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:12:32.664 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:32.701 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:12:33.135 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:33.174 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:12:33.606 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:33.647 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:12:34.083 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:34.119 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:12:34.553 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:34.590 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:12:35.024 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:35.063 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:12:35.495 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:35.536 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:12:35.971 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:36.008 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:12:36.442 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:36.479 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:12:36.913 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:36.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:36.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:36.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:36.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:36.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:36.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:36.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:12:36.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:36.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:36.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:36.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:12:36.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:12:36.945 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:36.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:36.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:36.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:36.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:36.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:36.951 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:12:37.359 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:37.420 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:12:37.810 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:37.813 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:37.891 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:12:38.280 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:38.282 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:38.364 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:12:38.751 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:38.832 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:12:39.221 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:39.224 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:12:39.303 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:12:39.692 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:39.777 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:12:40.163 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:40.249 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:12:40.639 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:40.721 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:12:41.109 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:41.192 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:12:41.580 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:41.665 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:12:42.051 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:42.137 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:12:42.527 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:42.609 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:12:42.998 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:43.080 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:12:43.469 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:43.554 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:12:43.940 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:44.026 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:12:44.416 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:44.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:44.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:44.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:44.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:44.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:44.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:44.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:44.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:44.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:12:44.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:12:44.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:12:44.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:12:44.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:12:44.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:12:44.430 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:12:49.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:12:49.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:12:49.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:12:49.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:12:49.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:12:49.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:12:49.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:12:49.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:12:49.445 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:12:49.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:12:49.446 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:12:49.448 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:12:49.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:12:49.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:12:49.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:12:49.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:12:49.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:12:49.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:12:49.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:12:49.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:49.450 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:12:49.450 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:12:49.450 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:12:49.450 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:12:49.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:12:49.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:12:49.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:12:49.451 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:12:49.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:49.452 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:12:49.452 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:12:49.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:12:49.453 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:12:49.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:12:49.453 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:12:49.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:12:49.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:12:49.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:12:49.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:12:49.456 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:12:49.456 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:12:49.456 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:12:49.461 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:12:49.939 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:12:49.982 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:12:49.985 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:12:49.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:49.987 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:12:50.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:50.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:50.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:12:50.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:50.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:50.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:50.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:12:50.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:12:50.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:50.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:50.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:50.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:50.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:50.412 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:12:50.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:50.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:50.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:50.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:50.885 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:12:51.358 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:12:51.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:51.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:51.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:51.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:51.830 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:12:52.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:52.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:52.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:52.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:52.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:52.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:52.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:12:52.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:52.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:52.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:52.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:12:52.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:12:52.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:52.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:52.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:52.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:52.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:52.303 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:12:52.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:52.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:52.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:52.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:52.776 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:12:53.248 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:12:53.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:53.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:53.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:53.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:53.719 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:12:54.192 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:12:54.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:54.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:54.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:54.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:54.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:54.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:54.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:12:54.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:54.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:54.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:54.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:12:54.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:12:54.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:54.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:12:54.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:12:54.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:54.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:54.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:54.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:54.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:54.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:54.665 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:12:55.137 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:12:55.611 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:12:56.084 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:12:56.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:12:56.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:12:56.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:12:56.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:12:56.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:12:56.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:12:56.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:12:56.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:12:56.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:12:56.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:12:56.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:12:56.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:12:56.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:12:56.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:12:56.499 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:13:01.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:01.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:01.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:01.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:01.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:01.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:01.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:01.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:01.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:01.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:01.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:13:01.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:13:01.515 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:13:01.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:01.515 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:01.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:01.516 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:13:01.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:01.516 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:13:01.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:01.517 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:13:01.517 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:13:01.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:01.517 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:01.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:01.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:13:01.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:01.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:13:01.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:01.519 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:13:01.519 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:13:01.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:01.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:01.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:01.519 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:13:01.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:01.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:13:01.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:01.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:13:01.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:13:01.522 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:13:01.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:01.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:13:02.005 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:13:02.047 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:13:02.050 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:13:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:02.052 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:13:02.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:02.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:02.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:02.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:02.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:02.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:02.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:02.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:02.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:02.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:02.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:02.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:02.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:02.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:13:02.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:02.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:02.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:02.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:02.943 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:13:03.414 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:13:03.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:03.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:03.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:03.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:03.885 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:13:04.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:04.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:04.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:04.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:04.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:04.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:04.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:04.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:04.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:04.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:04.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:04.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:04.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:04.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:04.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:04.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:04.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:04.355 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:13:04.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:04.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:04.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:04.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:04.826 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:13:05.297 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:13:05.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:05.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:05.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:05.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:05.771 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:13:06.243 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:13:06.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:06.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:06.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:06.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:06.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:06.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:06.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:06.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:06.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:06.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:06.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:06.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:06.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:06.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:06.378 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:13:06.379 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:06.379 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:06.379 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:06.379 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:06.379 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:06.379 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:06.379 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:11.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:11.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:11.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:11.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:11.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:11.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:11.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:11.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:11.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:11.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:11.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:13:11.392 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:13:11.392 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:13:11.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:11.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:11.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:11.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:13:11.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:11.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:13:11.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:11.396 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:13:11.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:13:11.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:11.396 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:11.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:11.397 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:13:11.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:11.397 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:13:11.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:11.399 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:13:11.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:13:11.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:11.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:11.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:11.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:13:11.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:11.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:13:11.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:11.402 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:13:11.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:13:11.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:13:11.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:13:11.402 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:13:11.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:13:11.403 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:13:11.403 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:13:11.403 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:11.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:11.408 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:13:11.886 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:13:11.931 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:13:11.933 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:13:11.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:11.935 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:13:11.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:11.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:11.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:11.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:11.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:11.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:11.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:11.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:11.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:11.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:11.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:11.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:11.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:12.354 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:13:12.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:12.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:12.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:12.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:12.825 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:13:13.298 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:13:13.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:13.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:13.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:13.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:13.771 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:13:14.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:14.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:14.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:14.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:14.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:14.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:14.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:14.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:14.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:14.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:14.109 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:14.109 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:14.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:14.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:14.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:14.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:14.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:14.243 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:13:14.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:14.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:14.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:14.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:14.714 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:13:15.188 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:13:15.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:15.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:15.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:15.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:15.660 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:13:16.132 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:13:16.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:16.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:16.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:16.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:16.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:16.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:16.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:16.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:16.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:16.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:16.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:16.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:16.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:16.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:16.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:16.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:16.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:16.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:16.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:16.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:16.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:16.603 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:13:17.076 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:13:17.549 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:13:18.022 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:13:18.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:18.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:18.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:18.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:18.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:18.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:18.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:18.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:18.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:18.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:18.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:18.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:18.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:18.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:18.376 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1506 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1506 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1506 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1506 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1506 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1506 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1506 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1507 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1507 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1507 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1507 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1507 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1507 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1507 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:18.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1507 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:23.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:23.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:23.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:23.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:23.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:23.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:23.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:23.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:23.388 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:23.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:23.388 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:13:23.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:13:23.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:13:23.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:23.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:23.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:13:23.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:23.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:23.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:13:23.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:23.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:13:23.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:13:23.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:23.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:23.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:23.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:13:23.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:23.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:13:23.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:23.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:13:23.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:13:23.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:23.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:23.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:23.395 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:13:23.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:23.395 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:13:23.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:23.397 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:13:23.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:13:23.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:13:23.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:13:23.397 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:13:23.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:13:23.398 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:13:23.398 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:23.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:23.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:13:23.880 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:13:23.935 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:13:23.937 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:13:23.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:23.939 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:13:23.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:23.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:23.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:23.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:23.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:23.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:23.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:23.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:23.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:23.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:23.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:23.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:23.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:24.353 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:13:24.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:24.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:24.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:24.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:24.824 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:13:25.297 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:13:25.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:25.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:25.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:25.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:25.769 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:13:26.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:26.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:26.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:26.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:26.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:26.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:26.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:26.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:26.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:26.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:26.108 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:26.108 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:26.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:26.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:26.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:26.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:26.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:26.239 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:13:26.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:26.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:26.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:26.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:26.708 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:13:27.181 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:13:27.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:27.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:27.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:27.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:27.654 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:13:28.126 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:13:28.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:28.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:28.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:28.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:28.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:28.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:28.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:28.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:28.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:28.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:28.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:28.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:28.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:28.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:28.280 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:13:33.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:33.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:33.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:33.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:33.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:33.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:33.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:33.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:33.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:33.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:33.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:13:33.293 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:13:33.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:13:33.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:33.294 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:33.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:33.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:13:33.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:33.295 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:13:33.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:33.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:13:33.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:13:33.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:33.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:33.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:33.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:13:33.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:33.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:13:33.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:33.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:13:33.298 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:13:33.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:33.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:33.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:33.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:13:33.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:33.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:13:33.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:13:33.301 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:13:33.301 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:13:33.301 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:33.305 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:13:33.784 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:13:33.828 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:13:33.830 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:13:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:33.832 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:13:33.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:33.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:33.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:33.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:33.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:33.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:33.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:33.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:33.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:33.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:33.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:33.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:33.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:34.251 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:13:34.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:34.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:34.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:34.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:34.722 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:13:35.196 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:13:35.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:35.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:35.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:35.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:35.668 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:13:36.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:36.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:36.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:36.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:36.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:36.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:36.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:36.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:36.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:36.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:36.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:36.102 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:13:36.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:36.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:36.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:36.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:36.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:36.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:36.102 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:41.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:41.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:41.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:41.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:41.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:41.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:41.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:41.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:41.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:41.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:41.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:13:41.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:13:41.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:13:41.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:41.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:41.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:41.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:13:41.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:41.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:13:41.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:41.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:13:41.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:13:41.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:41.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:41.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:41.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:13:41.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:41.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:13:41.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:41.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:13:41.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:13:41.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:41.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:41.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:41.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:13:41.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:41.123 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:13:41.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:41.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:13:41.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:13:41.126 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:13:41.126 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:41.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:13:41.609 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:13:41.661 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:13:41.664 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:13:41.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:41.665 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:13:41.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:41.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:41.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:41.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:41.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:41.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:41.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:41.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:41.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:41.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:41.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:41.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:41.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:42.082 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:13:42.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:42.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:42.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:42.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:42.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:13:43.028 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:13:43.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:43.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:43.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:43.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:43.500 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:13:43.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:43.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:43.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:43.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:43.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:43.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:43.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:43.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:43.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:43.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:43.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:43.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:43.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:43.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:43.930 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:43.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:48.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:48.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:48.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:48.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:48.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:48.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:48.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:48.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:48.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:48.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:48.946 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:13:48.949 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:13:48.949 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:13:48.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:48.949 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:48.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:48.950 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:13:48.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:48.950 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:13:48.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:48.951 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:13:48.952 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:13:48.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:48.952 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:48.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:48.952 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:13:48.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:48.952 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:13:48.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:48.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:13:48.954 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:13:48.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:48.954 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:48.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:48.954 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:13:48.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:48.954 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:13:48.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:48.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:13:48.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:13:48.957 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:13:48.958 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:48.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:48.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:48.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:48.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:48.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:48.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:13:49.440 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:13:49.483 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:13:49.486 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:13:49.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:49.488 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:13:49.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:49.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:49.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:49.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:49.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:49.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:49.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:49.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:49.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:49.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:49.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:49.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:49.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:49.912 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:13:49.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:49.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:49.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:49.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:49.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:49.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:49.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:49.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:49.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:49.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:49.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:49.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:49.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:49.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:49.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:49.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:50.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:50.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:50.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:50.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:50.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:50.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:50.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:50.379 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:13:50.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:50.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:50.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:50.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:50.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:50.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:50.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:50.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:50.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:50.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:50.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:50.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:50.396 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:50.396 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:55.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:55.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:55.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:55.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:55.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:55.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:55.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:55.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:55.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:55.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:13:55.415 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:13:55.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:13:55.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:13:55.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:55.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:55.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:55.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:13:55.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:13:55.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:13:55.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:55.421 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:13:55.421 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:13:55.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:55.421 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:55.421 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:13:55.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:55.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:13:55.422 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:13:55.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:55.424 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:13:55.424 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:13:55.424 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:55.424 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:13:55.424 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:13:55.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:55.424 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:13:55.424 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:13:55.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:13:55.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:13:55.430 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:13:55.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:55.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:13:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:13:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:13:55.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:55.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:55.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:55.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:55.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:13:55.434 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:13:55.912 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:13:55.956 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:13:55.958 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:13:55.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:55.961 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:13:55.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:55.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:55.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:56.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:56.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:56.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:56.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:56.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:56.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:56.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:56.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:56.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:56.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:56.385 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:13:56.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:56.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:56.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:56.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:56.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:56.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:56.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:56.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:56.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:56.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:56.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:13:56.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:56.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:56.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:56.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:13:56.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:13:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:56.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:13:56.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:13:56.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:56.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:56.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:13:56.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:13:56.851 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:13:56.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:13:56.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:13:56.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:13:56.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:13:56.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:13:56.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:13:56.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:13:56.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:13:56.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:13:56.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:13:56.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:13:56.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:13:56.868 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:13:56.868 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.868 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.868 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:13:56.869 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:01.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:01.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:01.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:01.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:01.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:01.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:01.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:01.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:01.883 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:01.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:01.884 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:14:01.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:14:01.887 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:14:01.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:01.887 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:01.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:01.888 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:14:01.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:01.888 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:14:01.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:01.889 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:14:01.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:14:01.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:01.890 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:01.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:01.890 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:14:01.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:01.890 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:14:01.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:01.892 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:14:01.892 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:14:01.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:01.892 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:01.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:01.892 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:14:01.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:01.892 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:14:01.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:01.895 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:14:01.896 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:14:01.896 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:14:01.896 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:01.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:01.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:01.900 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:14:02.379 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:14:02.418 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:14:02.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:02.420 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:14:02.421 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:14:02.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:02.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:02.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:02.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:02.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:02.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:02.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:02.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:02.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:02.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:02.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:02.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:02.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:02.846 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:14:02.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:02.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:02.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:02.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:02.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:02.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:02.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:02.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:02.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:02.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:02.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:02.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:02.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:02.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:02.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:02.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:02.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:02.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:02.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:02.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:02.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:03.312 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:14:03.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:03.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:03.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:03.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:03.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:03.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:03.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:03.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:03.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:03.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:03.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:03.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:03.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:03.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:03.364 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:14:03.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=319 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:03.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:03.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:03.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:03.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:03.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:03.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:03.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:08.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:08.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:08.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:08.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:08.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:08.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:08.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:08.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:08.372 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:08.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:08.372 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:14:08.373 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:14:08.373 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:14:08.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:08.374 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:08.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:08.374 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:14:08.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:08.374 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:14:08.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:08.375 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:14:08.376 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:14:08.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:08.376 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:08.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:08.376 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:14:08.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:08.376 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:14:08.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:08.378 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:14:08.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:14:08.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:08.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:08.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:08.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:14:08.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:08.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:14:08.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:08.380 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:14:08.381 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:14:08.381 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:14:08.381 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:14:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:08.386 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:14:08.864 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:14:08.922 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:14:08.924 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:14:08.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:08.926 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:14:08.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:08.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:08.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:08.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:08.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:08.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:08.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:08.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:09.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:09.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:09.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:09.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:09.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:09.337 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:14:09.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:09.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:09.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:09.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:09.808 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:14:10.281 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:14:10.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:10.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:10.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:10.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:10.753 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:14:11.226 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:14:11.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:11.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:11.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:11.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:11.699 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:14:12.171 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:14:12.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:12.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:12.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:12.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:12.644 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:14:13.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:13.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:13.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:13.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:13.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:13.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:13.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:13.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:13.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:13.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:13.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:13.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:13.018 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:14:13.018 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1001 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:13.018 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1001 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:13.018 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1001 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:13.018 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1001 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:13.018 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1001 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:13.018 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1001 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:18.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:18.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:18.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:18.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:18.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:18.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:18.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:18.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:18.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:18.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:18.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:14:18.036 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:14:18.036 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:14:18.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:18.036 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:18.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:18.036 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:14:18.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:18.036 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:14:18.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:18.039 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:14:18.039 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:14:18.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:18.039 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:18.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:18.039 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:14:18.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:18.039 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:14:18.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:18.042 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:14:18.042 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:14:18.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:18.042 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:18.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:18.042 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:14:18.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:18.042 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:14:18.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:18.045 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:14:18.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:14:18.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:14:18.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:18.046 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:14:18.046 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:14:18.046 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:14:18.047 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:18.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:18.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:18.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:18.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:18.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:18.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:18.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:18.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:18.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:18.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:18.051 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:14:18.529 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:14:18.580 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:14:18.582 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:14:18.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:18.583 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:14:18.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:18.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:18.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:18.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:18.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:18.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:18.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:18.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:18.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:18.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:18.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:18.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:18.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:18.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:18.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:18.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:18.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:18.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:18.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:18.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:18.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:18.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:18.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:18.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:18.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:18.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:18.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:18.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:18.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:18.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:18.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:14:19.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:19.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:19.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:19.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:19.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:19.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:19.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:19.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:19.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:19.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:19.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:19.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:19.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:19.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:19.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:19.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:19.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:19.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:19.174 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:14:19.174 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=245 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:19.175 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=245 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:19.175 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=245 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:19.175 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=245 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:19.175 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=245 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:19.175 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=245 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:19.175 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=245 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:24.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:24.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:24.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:24.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:24.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:24.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:24.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:24.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:24.188 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:24.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:24.188 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:14:24.191 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:14:24.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:14:24.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:24.191 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:24.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:24.191 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:14:24.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:24.191 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:14:24.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:24.194 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:14:24.194 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:14:24.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:24.194 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:24.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:24.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:14:24.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:24.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:14:24.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:24.196 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:14:24.196 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:14:24.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:24.197 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:24.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:24.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:14:24.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:24.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:14:24.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:24.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:14:24.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:14:24.200 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:14:24.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:24.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:24.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:24.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:24.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:24.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:14:24.684 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:14:24.729 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:14:24.731 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:14:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:24.734 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:14:24.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:24.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:24.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:24.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:24.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:24.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:24.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:24.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:24.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:24.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:24.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:24.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:25.156 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:14:25.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:25.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:25.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:25.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:25.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:14:26.098 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:14:26.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:26.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:26.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:26.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:26.569 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:14:27.039 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:14:27.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:27.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:27.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:27.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:27.513 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:14:27.985 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:14:28.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:28.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:28.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:28.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:28.457 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:14:28.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:28.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:28.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:28.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:28.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:28.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:28.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:28.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:28.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:28.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:28.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:28.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:28.842 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:14:28.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1003 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:28.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1003 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:28.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1003 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:28.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1003 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:28.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1003 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:28.843 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1003 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:33.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:33.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:33.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:33.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:33.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:33.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:33.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:33.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:33.857 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:33.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:33.858 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:14:33.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:14:33.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:14:33.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:33.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:33.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:33.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:14:33.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:33.862 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:14:33.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:33.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:14:33.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:14:33.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:33.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:33.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:33.866 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:14:33.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:33.866 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:14:33.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:33.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:14:33.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:14:33.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:33.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:33.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:33.867 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:14:33.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:33.867 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:14:33.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:33.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:14:33.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:14:33.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:14:33.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:14:33.870 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:14:33.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:14:33.871 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:14:33.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:14:33.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:33.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:33.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:33.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:33.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:33.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:33.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:33.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:33.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:33.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:14:34.354 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:14:34.404 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:14:34.406 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:14:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:34.407 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:14:34.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:34.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:34.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:34.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:34.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:34.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:34.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:34.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:34.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:34.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:34.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:34.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:34.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:34.827 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:14:34.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:34.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:34.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:34.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:35.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:35.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:35.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:35.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:35.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:35.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:35.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:35.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:35.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:35.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:35.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:35.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:35.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:35.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:35.234 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:14:35.234 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.234 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.234 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.234 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.234 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.234 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.234 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.235 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.235 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.235 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.235 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.235 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:35.235 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:40.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:40.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:40.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:40.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:40.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:40.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:40.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:40.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:40.246 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:40.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:40.246 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:14:40.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:14:40.250 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:14:40.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:40.250 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:40.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:40.251 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:14:40.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:40.251 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:14:40.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:40.253 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:14:40.253 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:14:40.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:40.253 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:40.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:40.253 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:14:40.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:40.254 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:14:40.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:40.256 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:14:40.256 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:14:40.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:40.256 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:40.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:40.256 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:14:40.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:40.256 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:14:40.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:40.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:14:40.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:14:40.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:14:40.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:14:40.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:40.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:14:40.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:14:40.260 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:14:40.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:40.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:40.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:40.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:40.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:40.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:40.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:40.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:40.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:40.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:40.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:40.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:14:40.742 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:14:40.793 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:14:40.795 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:14:40.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:40.797 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:14:40.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:40.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:40.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:40.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:40.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:40.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:40.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:40.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:40.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:40.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:40.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:40.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:40.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:41.215 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:14:41.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:41.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:41.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:41.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:41.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:41.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:41.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:41.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:41.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:41.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:41.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:41.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:41.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:41.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:41.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:41.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:41.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:41.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:41.621 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:41.621 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:46.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:46.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:46.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:46.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:46.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:46.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:46.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:46.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:46.633 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:46.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:46.633 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:14:46.634 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:14:46.635 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:14:46.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:46.635 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:46.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:46.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:14:46.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:46.635 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:14:46.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:46.637 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:14:46.637 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:14:46.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:46.637 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:46.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:46.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:14:46.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:46.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:14:46.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:46.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:14:46.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:14:46.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:46.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:46.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:46.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:14:46.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:46.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:14:46.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:46.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:14:46.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:14:46.641 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:14:46.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:46.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:46.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:46.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:46.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:46.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:46.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:14:47.125 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:14:47.160 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:14:47.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:47.161 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:14:47.161 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:14:47.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:47.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:47.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:47.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:47.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:47.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:47.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:47.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:47.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:47.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:47.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:47.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:47.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:47.588 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:14:47.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:47.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:47.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:47.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:47.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:47.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:47.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:47.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:47.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:47.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:47.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:47.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:47.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:47.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:47.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:47.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:47.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:47.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:47.953 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:14:47.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=285 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:47.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=285 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:47.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=285 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:47.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=285 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:47.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=285 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:47.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=285 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:47.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=285 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:47.954 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:52.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:52.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:52.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:52.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:52.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:52.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:52.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:52.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:52.962 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:52.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:52.963 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:14:52.964 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:14:52.964 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:14:52.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:52.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:52.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:52.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:14:52.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:52.965 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:14:52.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:52.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:14:52.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:14:52.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:52.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:52.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:52.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:14:52.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:52.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:14:52.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:52.969 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:14:52.969 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:14:52.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:52.969 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:52.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:52.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:14:52.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:52.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:14:52.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:52.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:14:52.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:14:52.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:14:52.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:14:52.973 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:14:52.973 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:14:52.973 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:52.978 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:14:53.454 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:14:53.502 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:14:53.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:53.504 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:14:53.506 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:14:53.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:53.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:53.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:14:53.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:53.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:53.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:53.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:14:53.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:14:53.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:53.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:14:53.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:14:53.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:53.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:53.926 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:14:53.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:53.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:53.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:53.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:54.397 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:14:54.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:14:54.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:14:54.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:14:54.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:14:54.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:54.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:54.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:54.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:54.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:54.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:54.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:54.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:54.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:54.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:54.470 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:14:54.470 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:54.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:54.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:54.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:54.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:54.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:54.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:54.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:14:59.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:14:59.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:14:59.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:59.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:59.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:59.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:59.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:14:59.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:59.483 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:59.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:14:59.484 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:14:59.487 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:14:59.487 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:14:59.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:59.488 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:59.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:14:59.488 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:14:59.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:14:59.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:14:59.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:14:59.490 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:14:59.490 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:14:59.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:59.490 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:59.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:14:59.491 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:14:59.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:14:59.491 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:14:59.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:14:59.493 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:14:59.493 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:14:59.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:59.493 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:14:59.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:14:59.493 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:14:59.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:14:59.493 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:14:59.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:14:59.495 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:14:59.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:14:59.496 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:14:59.496 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:14:59.496 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:14:59.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:14:59.980 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:15:00.027 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:15:00.029 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:15:00.030 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:15:00.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:00.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:00.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:00.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:15:00.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:00.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:00.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:00.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:15:00.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:15:00.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:00.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:00.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:00.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:00.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:00.452 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:15:00.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:00.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:00.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:00.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:00.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:00.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:00.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:00.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:00.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:00.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:00.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:00.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:00.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:00.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:00.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:00.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:00.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:15:00.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:15:00.896 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:15:00.896 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:00.896 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:00.896 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:00.896 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:00.896 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:00.896 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:00.896 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:05.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:15:05.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:15:05.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:05.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:05.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:05.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:05.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:05.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:15:05.907 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:05.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:15:05.907 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:15:05.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:15:05.909 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:15:05.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:15:05.910 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:05.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:05.910 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:15:05.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:15:05.910 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:15:05.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:05.911 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:15:05.911 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:15:05.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:15:05.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:05.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:05.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:15:05.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:15:05.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:15:05.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:05.913 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:15:05.913 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:15:05.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:15:05.913 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:05.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:05.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:15:05.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:15:05.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:15:05.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:05.915 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:15:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:15:05.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:15:05.916 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:15:05.916 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:15:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:05.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:05.921 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:15:06.400 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:15:06.445 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:15:06.447 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:15:06.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:06.449 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:15:06.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:06.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:06.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:15:06.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:06.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:06.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:06.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:15:06.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:15:06.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:06.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:06.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:06.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:06.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:06.872 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:15:06.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:06.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:06.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:06.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:07.343 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:15:07.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:07.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:07.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:07.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:07.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:07.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:07.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:07.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:07.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:07.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:15:07.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:15:07.413 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=322 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=323 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:07.413 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:12.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:15:12.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:15:12.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:12.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:12.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:12.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:12.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:12.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:15:12.425 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:12.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:15:12.425 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:15:12.428 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:15:12.428 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:15:12.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:15:12.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:12.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:12.429 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:15:12.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:15:12.429 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:15:12.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:12.431 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:15:12.431 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:15:12.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:15:12.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:12.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:12.432 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:15:12.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:15:12.432 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:15:12.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:12.434 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:15:12.434 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:15:12.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:15:12.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:12.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:12.434 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:15:12.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:15:12.434 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:15:12.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:15:12.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:15:12.438 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:15:12.438 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:12.442 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:15:12.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:15:12.956 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:15:12.957 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:15:12.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:12.959 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:15:12.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:12.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:12.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:15:12.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:12.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:12.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:12.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:15:12.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:15:13.389 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:15:13.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:13.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:13.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:13.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:13.860 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:15:14.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:14.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:14.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:14.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:14.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:14.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:14.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:15:14.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:14.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:14.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:14.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:15:14.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:15:14.331 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:15:14.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:14.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:14.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:14.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:14.804 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:15:15.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:15:15.277 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:15:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:15:15.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:15.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:15.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:15.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:15.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:15.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:15.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:15.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:15.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:15.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:15.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:15:15.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:15:15.328 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:15:15.328 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=625 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:15.328 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:15.328 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:15.328 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:15.328 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:15.328 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:15.328 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:20.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:15:20.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:15:20.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:20.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:20.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:20.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:20.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:20.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:15:20.343 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:20.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:15:20.343 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:15:20.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:15:20.347 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:15:20.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:15:20.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:20.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:20.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:15:20.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:15:20.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:15:20.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:20.351 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:15:20.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:15:20.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:15:20.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:20.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:20.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:15:20.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:15:20.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:15:20.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:20.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:15:20.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:15:20.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:15:20.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:20.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:20.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:15:20.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:15:20.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:15:20.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:20.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:15:20.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:15:20.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:15:20.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:15:20.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:15:20.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:15:20.358 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:15:20.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:15:20.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:20.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:20.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:20.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:20.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:20.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:20.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:20.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:15:20.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:15:20.894 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:15:20.896 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:15:20.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:20.898 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:15:20.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:20.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:20.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:20.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:20.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:20.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:15:20.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:15:21.341 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:15:21.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:21.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:21.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:21.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:21.813 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:15:22.284 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:15:22.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:22.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:22.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:22.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:22.758 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:15:23.230 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:15:23.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:23.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:23.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:23.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:23.702 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:15:24.173 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:15:24.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:24.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:24.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:24.647 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:15:25.119 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:15:25.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:25.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:25.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:25.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:25.591 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:15:25.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:15:25.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:25.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:25.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:25.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:26.063 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:15:26.536 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:15:27.008 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:15:27.481 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:15:27.954 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:15:28.426 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:15:28.900 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:15:29.373 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:15:29.845 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:15:30.318 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:15:30.791 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:15:31.263 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:15:31.736 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:15:32.209 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:15:32.683 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:15:33.156 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:15:33.628 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:15:34.102 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:15:34.573 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:15:35.037 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:15:35.502 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:15:35.966 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:15:36.430 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:15:36.895 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:15:37.360 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:15:37.824 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:15:38.290 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:15:38.757 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:15:39.221 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:15:39.693 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:15:40.166 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:15:40.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:15:40.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:40.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:40.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:40.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:40.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:40.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:40.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:40.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:40.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:40.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:40.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:40.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:15:40.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:15:40.500 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:15:40.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4358 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4358 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4358 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4358 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4358 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4358 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4358 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.502 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4359 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.502 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4359 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.502 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4359 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.502 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4359 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.502 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4359 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.502 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4359 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.502 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4359 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:40.502 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4359 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:15:45.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:15:45.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:15:45.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:45.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:45.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:45.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:45.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:45.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:15:45.514 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:45.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:15:45.515 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:15:45.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:15:45.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:15:45.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:15:45.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:45.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:45.518 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:15:45.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:15:45.518 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:15:45.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:45.521 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:15:45.521 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:15:45.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:15:45.521 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:45.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:45.521 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:15:45.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:15:45.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:15:45.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:45.523 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:15:45.523 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:15:45.523 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:15:45.523 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:15:45.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:45.523 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:15:45.523 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:15:45.523 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:15:45.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:45.526 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:15:45.526 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:15:45.526 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:15:45.526 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:15:45.531 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:15:46.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:15:46.055 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:15:46.058 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:15:46.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:15:46.060 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:15:46.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:46.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:46.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:15:46.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:46.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:46.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:46.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:15:46.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:15:46.482 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:15:46.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:46.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:46.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:46.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:46.953 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:15:47.427 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:15:47.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:47.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:47.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:47.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:47.899 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:15:48.371 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:15:48.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:48.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:48.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:48.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:48.842 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:15:49.312 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:15:49.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:49.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:49.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:49.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:49.783 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:15:50.254 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:15:50.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:50.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:50.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:50.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:50.725 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:15:50.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:15:50.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:15:50.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:15:50.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:50.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:51.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:15:51.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:15:52.143 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:15:52.616 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:15:53.089 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:15:53.559 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:15:54.024 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:15:54.488 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:15:54.952 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:15:55.417 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:15:55.882 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:15:56.353 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:15:56.825 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:15:57.299 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:15:57.771 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:15:57.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:15:57.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:15:57.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:15:57.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:15:57.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:15:57.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:15:57.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:15:57.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:15:57.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:15:57.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:15:57.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:15:57.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:15:57.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:15:57.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:15:57.958 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:16:02.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:16:02.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:16:02.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:02.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:02.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:02.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:02.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:02.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:16:02.975 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:02.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:16:02.975 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:16:02.977 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:16:02.977 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:16:02.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:16:02.977 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:02.977 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:16:02.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:02.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:16:02.977 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:16:02.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:02.979 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:16:02.979 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:16:02.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:16:02.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:02.979 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:16:02.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:02.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:16:02.979 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:16:02.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:02.981 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:16:02.981 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:16:02.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:16:02.981 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:02.981 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:16:02.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:02.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:16:02.981 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:16:02.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:16:02.983 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:16:02.983 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:16:02.983 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:02.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:02.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:02.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:02.988 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:16:03.466 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:16:03.508 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:16:03.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:16:03.509 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:16:03.510 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:16:03.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:16:03.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:16:03.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:16:03.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:03.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:16:03.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:16:03.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:16:03.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:16:03.934 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:16:03.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:03.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:03.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:03.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:04.405 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:16:04.876 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:16:04.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:04.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:04.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:04.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:05.349 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:16:05.821 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:16:05.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:05.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:05.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:05.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:06.293 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:16:06.767 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:16:06.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:06.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:06.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:06.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:07.239 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:16:07.711 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:16:07.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:07.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:07.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:07.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:08.182 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:16:08.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:16:08.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:16:08.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:16:08.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:08.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:08.651 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:16:09.115 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:16:09.580 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:16:10.052 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:16:10.525 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:16:10.997 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:16:11.469 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:16:11.943 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:16:12.416 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:16:12.888 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:16:13.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:16:13.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:13.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:16:13.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:16:13.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:13.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:13.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:13.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:13.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:13.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:13.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:13.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:13.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:16:13.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:16:13.024 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:16:18.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:16:18.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:16:18.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:18.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:18.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:18.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:18.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:18.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:16:18.041 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:18.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:16:18.041 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:16:18.043 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:16:18.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:16:18.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:16:18.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:18.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:18.045 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:16:18.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:16:18.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:16:18.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:18.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:16:18.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:16:18.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:16:18.047 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:18.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:18.047 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:16:18.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:16:18.047 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:16:18.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:18.049 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:16:18.049 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:16:18.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:16:18.049 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:18.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:18.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:16:18.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:16:18.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:16:18.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:18.052 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:16:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:16:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:16:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:16:18.052 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:16:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:16:18.053 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:16:18.053 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:16:18.053 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:16:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:18.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:18.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:18.058 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:16:18.536 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:16:18.586 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:16:18.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:16:18.589 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:16:18.591 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:16:18.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:16:18.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:16:18.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:16:18.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:18.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:16:18.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:16:18.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:16:18.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:16:19.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:16:19.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:19.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:19.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:19.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:19.479 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:16:19.953 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:16:20.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:20.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:20.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:20.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:20.425 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:16:20.897 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:16:21.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:21.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:21.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:21.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:21.370 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:16:21.843 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:16:22.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:22.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:22.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:22.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:22.315 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:16:22.786 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:16:23.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:23.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:23.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:23.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:23.259 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:16:23.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:16:23.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:16:23.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:16:23.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:23.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:23.732 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:16:24.204 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:16:24.677 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:16:25.150 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:16:25.622 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:16:26.095 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:16:26.568 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:16:27.040 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:16:27.511 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:16:27.985 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:16:28.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:16:28.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:28.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:16:28.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:16:28.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:28.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:28.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:28.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:28.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:28.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:28.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:28.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:28.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:16:28.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:16:28.118 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:16:33.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:16:33.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:16:33.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:33.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:33.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:33.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:33.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:33.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:16:33.132 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:33.132 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:16:33.132 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:16:33.135 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:16:33.136 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:16:33.136 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:16:33.136 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:33.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:33.137 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:16:33.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:16:33.137 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:16:33.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:33.138 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:16:33.139 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:16:33.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:16:33.139 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:33.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:33.139 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:16:33.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:16:33.139 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:16:33.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:33.141 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:16:33.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:16:33.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:16:33.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:33.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:33.142 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:16:33.142 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:16:33.142 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:16:33.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:33.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:16:33.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:16:33.146 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:16:33.146 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:33.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:33.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:33.151 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:16:33.629 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:16:33.680 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:16:33.682 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:16:33.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:16:33.684 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:16:33.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:16:33.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:16:33.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:16:33.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:33.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:16:33.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:16:33.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:16:33.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:16:34.102 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:16:34.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:34.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:34.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:34.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:34.573 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:16:35.046 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:16:35.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:35.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:35.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:35.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:35.518 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:16:35.990 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:16:36.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:36.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:36.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:36.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:36.461 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:16:36.932 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:16:37.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:37.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:37.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:37.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:37.405 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:16:37.877 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:16:38.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:38.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:38.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:38.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:38.349 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:16:38.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:16:38.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:16:38.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:16:38.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:38.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:38.820 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:16:39.295 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:16:39.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:16:40.233 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:16:40.697 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:16:41.161 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:16:41.626 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:16:42.091 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:16:42.555 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:16:43.020 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:16:43.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:16:43.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:16:43.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:16:43.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:16:43.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:43.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:43.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:43.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:43.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:43.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:43.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:43.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:43.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:16:43.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:16:43.161 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:16:48.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:16:48.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:16:48.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:48.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:48.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:48.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:48.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:48.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:16:48.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:48.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:16:48.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:16:48.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:16:48.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:16:48.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:16:48.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:48.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:48.178 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:16:48.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:16:48.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:16:48.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:48.180 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:16:48.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:16:48.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:16:48.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:48.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:48.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:16:48.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:16:48.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:16:48.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:48.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:16:48.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:16:48.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:16:48.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:16:48.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:48.183 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:16:48.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:16:48.183 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:16:48.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:48.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:16:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:16:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:16:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:16:48.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:16:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:16:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:16:48.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:16:48.187 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:16:48.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:16:48.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:16:48.669 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:16:48.719 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:16:48.721 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:16:48.722 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:16:48.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:16:49.141 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:16:49.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:49.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:49.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:49.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:49.614 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:16:50.087 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:16:50.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:50.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:50.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:50.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:50.559 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:16:51.034 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:16:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:51.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:51.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:51.506 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:16:51.979 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:16:52.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:52.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:52.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:52.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:52.452 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:16:52.924 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:16:53.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:53.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:53.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:53.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:53.396 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:16:53.870 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:16:54.342 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:16:54.815 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:16:55.288 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:16:55.759 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:16:56.232 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:16:56.705 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:16:57.177 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:16:57.651 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:16:58.123 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:16:58.595 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:16:58.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:16:58.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:16:58.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:16:58.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:16:58.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:16:58.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:16:58.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:16:58.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:16:58.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:16:58.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:16:58.739 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2276 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2276 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2276 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2276 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2276 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2276 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2276 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2277 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2277 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2277 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2277 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2277 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2277 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2277 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:16:58.739 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2277 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:17:03.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:03.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:03.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:03.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:03.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:03.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:03.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:03.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:03.752 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:03.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:03.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:17:03.754 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:17:03.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:17:03.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:03.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:03.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:03.755 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:17:03.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:03.755 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:17:03.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:03.756 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:17:03.756 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:17:03.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:03.756 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:03.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:03.757 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:17:03.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:03.757 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:17:03.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:03.758 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:17:03.758 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:17:03.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:03.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:03.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:03.759 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:17:03.759 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:03.759 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:17:03.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:03.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:17:03.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:17:03.762 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:17:03.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:17:03.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:03.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:03.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:03.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:17:03.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:03.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:03.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:03.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:03.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:03.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:03.763 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:17:08.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:08.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:08.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:08.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:08.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:08.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:08.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:08.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:08.775 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:08.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:08.775 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:17:08.777 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:17:08.777 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:17:08.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:08.777 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:08.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:08.778 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:17:08.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:08.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:17:08.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:08.780 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:17:08.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:17:08.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:08.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:08.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:08.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:17:08.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:08.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:17:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:08.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:17:08.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:17:08.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:08.782 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:08.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:08.782 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:17:08.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:08.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:17:08.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:08.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:17:08.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:17:08.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:17:08.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:17:08.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:17:08.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:17:08.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:17:08.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:17:08.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:17:08.786 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:17:08.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:08.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:08.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:08.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:17:09.269 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:17:09.316 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:17:09.318 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:17:09.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:17:09.321 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:17:09.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:17:09.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:17:09.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:17:09.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:17:09.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:17:09.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:17:09.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:17:09.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:17:09.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:17:09.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:09.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:09.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:09.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:10.213 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:17:10.686 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:17:10.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:10.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:10.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:10.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:11.158 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:17:11.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:17:11.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:11.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:11.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:11.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:12.104 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:17:12.576 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:17:12.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:12.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:12.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:12.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:13.048 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:17:13.522 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:17:13.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:13.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:13.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:13.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:13.994 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:17:14.466 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:17:14.937 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:17:15.410 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:17:15.883 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:17:16.354 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:17:16.826 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:17:17.299 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:17:17.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:17:17.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:17:17.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:17.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:17.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:17.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:17.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:17.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:17.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:17.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:17.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:17.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:17.371 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:17:22.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:22.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:22.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:22.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:22.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:22.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:22.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:22.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:22.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:22.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:22.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:17:22.387 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:17:22.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:17:22.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:22.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:22.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:22.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:17:22.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:22.389 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:17:22.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:22.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:17:22.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:17:22.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:22.391 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:22.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:22.391 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:17:22.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:22.391 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:17:22.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:22.393 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:17:22.393 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:17:22.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:22.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:22.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:22.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:17:22.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:22.393 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:17:22.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:22.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:17:22.397 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:17:22.397 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:17:22.397 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:22.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:22.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:22.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:22.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:22.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:22.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:22.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:22.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:22.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:22.399 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:17:27.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:27.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:27.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:27.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:27.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:27.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:27.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:27.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:27.415 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:27.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:27.416 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:17:27.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:17:27.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:17:27.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:27.418 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:27.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:27.418 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:17:27.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:27.418 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:17:27.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:27.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:17:27.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:17:27.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:27.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:27.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:27.419 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:17:27.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:27.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:17:27.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:27.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:17:27.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:17:27.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:27.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:27.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:27.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:17:27.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:27.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:17:27.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:27.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:17:27.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:17:27.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:17:27.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:17:27.423 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:17:27.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:17:27.424 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:17:27.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:27.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:17:27.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:17:27.952 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:17:27.955 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:17:27.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:17:27.958 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:17:27.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:17:27.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:17:27.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:17:27.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:17:27.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:17:27.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:17:27.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:17:27.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:17:28.379 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:17:28.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:28.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:28.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:28.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:28.850 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:17:29.324 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:17:29.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:29.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:29.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:29.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:29.796 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:17:30.268 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:17:30.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:30.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:30.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:30.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:30.739 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:17:31.212 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:17:31.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:31.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:31.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:31.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:31.684 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:17:32.156 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:17:32.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:32.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:32.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:32.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:32.627 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:17:33.101 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:17:33.573 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:17:34.045 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:17:34.516 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:17:34.990 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:17:35.462 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:17:35.934 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:17:36.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:17:36.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:17:36.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:36.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:36.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:36.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:36.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:36.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:36.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:36.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:36.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:36.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:36.005 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:17:41.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:41.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:41.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:41.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:41.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:41.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:41.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:41.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:41.021 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:41.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:41.021 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:17:41.023 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:17:41.023 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:17:41.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:41.023 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:41.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:41.024 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:17:41.024 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:41.024 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:17:41.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:41.025 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:17:41.025 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:17:41.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:41.025 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:41.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:41.025 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:17:41.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:41.026 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:17:41.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:41.027 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:17:41.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:17:41.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:41.027 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:41.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:41.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:17:41.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:41.027 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:17:41.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:41.029 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:17:41.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:17:41.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:17:41.030 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:17:41.030 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:17:41.030 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:41.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:41.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:41.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:41.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:41.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:41.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:41.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:41.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:41.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:41.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:41.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:41.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:41.032 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:17:46.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:46.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:46.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:46.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:46.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:46.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:46.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:46.047 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:46.047 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:46.047 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:46.047 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:17:46.049 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:17:46.050 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:17:46.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:46.050 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:46.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:46.051 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:17:46.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:46.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:17:46.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:46.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:17:46.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:17:46.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:46.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:46.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:46.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:17:46.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:46.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:17:46.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:46.054 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:17:46.054 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:17:46.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:46.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:46.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:46.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:17:46.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:46.055 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:17:46.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:46.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:17:46.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:17:46.057 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:17:46.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:46.062 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:17:46.540 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:17:46.587 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:17:46.590 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:17:46.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:17:46.592 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:17:46.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:17:46.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:17:46.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:17:46.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:17:46.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:17:46.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:17:46.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:17:46.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:17:47.012 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:17:47.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:47.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:47.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:47.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:47.483 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:17:47.957 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:17:48.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:48.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:48.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:48.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:48.429 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:17:48.901 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:17:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:49.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:49.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:49.372 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:17:49.846 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:17:50.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:50.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:50.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:50.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:50.318 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:17:50.790 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:17:51.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:51.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:51.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:51.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:51.264 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:17:51.736 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:17:52.208 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:17:52.682 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:17:53.153 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:17:53.625 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:17:54.096 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:17:54.570 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:17:54.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:17:54.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:17:54.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:54.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:54.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:54.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:54.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:54.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:54.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:54.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:54.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:54.638 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:17:54.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:59.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:59.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:59.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:59.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:59.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:59.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:59.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:59.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:59.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:59.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:17:59.655 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:17:59.657 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:17:59.657 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:17:59.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:59.657 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:59.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:59.658 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:17:59.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:17:59.658 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:17:59.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:17:59.659 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:17:59.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:17:59.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:59.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:59.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:59.660 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:17:59.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:17:59.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:17:59.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:17:59.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:17:59.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:17:59.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:59.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:17:59.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:59.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:17:59.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:17:59.662 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:17:59.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:59.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:17:59.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:17:59.665 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:17:59.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:59.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:17:59.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:17:59.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:17:59.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:17:59.667 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:18:04.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:04.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:04.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:04.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:04.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:04.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:04.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:04.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:04.680 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:04.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:04.681 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:18:04.683 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:18:04.684 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:18:04.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:04.684 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:04.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:04.685 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:18:04.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:04.686 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:18:04.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:04.687 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:18:04.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:18:04.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:04.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:04.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:04.688 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:18:04.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:04.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:18:04.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:04.690 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:18:04.690 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:18:04.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:04.690 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:04.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:04.690 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:18:04.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:04.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:18:04.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:04.693 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:18:04.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:04.694 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:18:04.694 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:18:04.694 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:18:04.694 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:04.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:04.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:04.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:04.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:04.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:04.699 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:18:05.178 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:18:05.225 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:18:05.227 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:18:05.228 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:18:05.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:18:05.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:18:05.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:18:05.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:18:05.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:18:05.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:18:05.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:18:05.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:18:05.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:18:05.650 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:18:05.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:05.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:05.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:05.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:06.121 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:18:06.592 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:18:06.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:06.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:06.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:06.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:07.065 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:18:07.537 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:18:07.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:07.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:07.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:07.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:08.009 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:18:08.480 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:18:08.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:08.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:08.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:08.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:08.951 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:18:09.421 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:18:09.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:09.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:09.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:09.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:09.895 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:18:10.367 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:18:10.839 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:18:11.313 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:18:11.785 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:18:12.257 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:18:12.731 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:18:13.203 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:18:13.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:18:13.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:18:13.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:13.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:13.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:13.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:13.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:13.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:13.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:13.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:13.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:13.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:13.274 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:18:18.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:18.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:18.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:18.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:18.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:18.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:18.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:18.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:18.284 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:18.285 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:18.285 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:18:18.285 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:18:18.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:18:18.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:18.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:18.286 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:18.286 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:18.286 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:18:18.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:18.287 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:18:18.287 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:18:18.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:18.287 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:18.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:18.287 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:18:18.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:18.287 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:18:18.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:18.288 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:18:18.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:18:18.289 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:18:18.289 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:18:18.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:18.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:18.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:18.290 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:18:23.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:23.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:23.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:23.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:23.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:23.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:23.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:23.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:23.304 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:23.304 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:23.304 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:18:23.306 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:18:23.306 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:18:23.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:23.307 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:23.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:23.307 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:18:23.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:23.308 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:18:23.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:23.309 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:18:23.309 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:18:23.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:23.309 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:23.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:23.310 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:18:23.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:23.310 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:18:23.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:23.312 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:18:23.312 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:18:23.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:23.312 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:23.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:23.312 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:18:23.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:23.313 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:18:23.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:23.316 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:18:23.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:18:23.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:18:23.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:18:23.316 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:18:23.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:18:23.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:18:23.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:18:23.317 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:18:23.317 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:18:23.317 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:23.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:23.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:23.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:23.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:23.322 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:18:23.797 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:18:23.850 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:18:23.853 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:18:23.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:18:23.855 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:18:23.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:18:23.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:18:23.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:18:23.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:18:23.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:18:23.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:18:23.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:18:23.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:18:24.269 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:18:24.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:24.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:24.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:24.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:24.740 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:18:25.214 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:18:25.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:25.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:25.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:25.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:25.686 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:18:26.158 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:18:26.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:26.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:26.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:26.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:26.629 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:18:27.102 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:18:27.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:27.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:27.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:27.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:27.574 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:18:28.046 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:18:28.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:28.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:28.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:28.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:28.517 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:18:28.990 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:18:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:18:29.935 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:18:30.406 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:18:30.879 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:18:31.352 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:18:31.824 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:18:32.295 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:18:32.768 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:18:33.240 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:18:33.712 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:18:34.183 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:18:34.657 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:18:35.129 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:18:35.601 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:18:36.074 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:18:36.547 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:18:37.019 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:18:37.490 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:18:37.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:18:37.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:18:37.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:37.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:37.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:37.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:37.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:37.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:37.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:37.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:37.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:37.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:37.902 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:18:37.902 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3150 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3150 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3150 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3150 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3150 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3150 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3150 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.903 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:37.904 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:42.901 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:42.901 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:42.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:42.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:42.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:42.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:42.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:42.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:42.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:42.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:42.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:18:42.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:18:42.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:18:42.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:42.917 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:42.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:42.917 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:18:42.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:42.918 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:18:42.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:42.920 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:18:42.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:18:42.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:42.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:42.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:42.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:18:42.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:42.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:18:42.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:42.922 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:18:42.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:18:42.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:42.922 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:42.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:42.922 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:18:42.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:42.922 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:18:42.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:42.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:18:42.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:18:42.926 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:18:42.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:42.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:42.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:42.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:42.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:42.928 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:18:47.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:47.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:47.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:47.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:47.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:47.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:47.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:47.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:47.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:47.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:18:47.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:18:47.947 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:18:47.947 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:18:47.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:47.948 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:47.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:47.948 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:18:47.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:18:47.949 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:18:47.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:47.949 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:18:47.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:18:47.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:47.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:47.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:47.950 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:18:47.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:18:47.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:18:47.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:47.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:18:47.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:18:47.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:47.951 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:18:47.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:47.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:18:47.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:18:47.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:18:47.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:47.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:18:47.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:18:47.955 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:18:47.955 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:47.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:18:47.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:47.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:47.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:47.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:18:47.959 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:18:48.438 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:18:48.483 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:18:48.484 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:18:48.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:18:48.484 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:18:48.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:18:48.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:18:48.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:18:48.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:18:48.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:18:48.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:18:48.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:18:48.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:18:48.906 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:18:48.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:48.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:48.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:48.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:49.377 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:18:49.850 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:18:49.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:49.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:49.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:49.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:50.323 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:18:50.795 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:18:50.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:50.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:50.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:50.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:51.266 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:18:51.739 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:18:51.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:51.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:51.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:51.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:52.211 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:18:52.684 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:18:52.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:52.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:52.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:52.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:53.157 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:18:53.629 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:18:54.101 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:18:54.575 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:18:55.047 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:18:55.519 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:18:55.993 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:18:56.465 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:18:56.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:18:56.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:18:56.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:18:56.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:18:56.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:18:56.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:18:56.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:18:56.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:18:56.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:18:56.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:18:56.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:18:56.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:18:56.539 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:18:56.539 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.539 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.539 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.539 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.539 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.539 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.540 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.540 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.540 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.540 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.540 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.540 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.540 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.540 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:18:56.540 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:01.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:01.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:01.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:01.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:01.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:01.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:01.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:01.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:01.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:01.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:01.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:19:01.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:19:01.555 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:19:01.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:01.555 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:01.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:01.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:19:01.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:01.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:19:01.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:01.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:19:01.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:19:01.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:01.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:01.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:01.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:19:01.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:01.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:19:01.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:01.559 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:19:01.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:19:01.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:01.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:01.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:01.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:19:01.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:01.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:19:01.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:01.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:19:01.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:19:01.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:19:01.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:19:01.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:19:01.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:19:01.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:19:01.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:19:01.562 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:19:01.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:01.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:01.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:01.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:01.564 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:19:06.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:06.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:06.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:06.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:06.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:06.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:06.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:06.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:06.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:06.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:06.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:19:06.576 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:19:06.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:19:06.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:06.577 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:06.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:06.577 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:19:06.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:06.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:19:06.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:06.579 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:19:06.579 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:19:06.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:06.579 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:06.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:06.579 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:19:06.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:06.579 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:19:06.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:06.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:19:06.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:19:06.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:06.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:06.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:06.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:19:06.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:06.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:19:06.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:06.585 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:19:06.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:06.586 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:19:06.586 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:19:06.586 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:19:06.587 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:06.591 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:19:07.070 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:19:07.123 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:19:07.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:19:07.126 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:19:07.130 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:19:07.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:19:07.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:19:07.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:19:07.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:19:07.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:19:07.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:19:07.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:19:07.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:19:07.542 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:19:07.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:07.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:07.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:07.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:08.013 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:19:08.487 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:19:08.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:08.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:08.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:08.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:08.959 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:19:09.431 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:19:09.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:09.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:09.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:09.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:09.902 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:19:10.376 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:19:10.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:10.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:10.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:10.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:10.848 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:19:11.320 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:19:11.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:11.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:11.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:11.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:11.791 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:19:12.264 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:19:12.737 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:19:13.209 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:19:13.680 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:19:14.153 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:19:14.625 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:19:15.097 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:19:15.571 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:19:16.043 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:19:16.515 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:19:16.989 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:19:17.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:19:17.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:19:17.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:17.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:17.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:17.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:17.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:17.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:17.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:17.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:17.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:17.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:17.170 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:19:17.170 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:17.170 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:17.171 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:17.171 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:17.171 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:17.171 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:22.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:22.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:22.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:22.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:22.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:22.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:22.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:22.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:22.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:22.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:22.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:19:22.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:19:22.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:19:22.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:22.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:22.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:22.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:19:22.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:22.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:19:22.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:22.195 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:19:22.195 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:19:22.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:22.196 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:22.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:22.196 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:19:22.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:22.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:19:22.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:22.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:19:22.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:19:22.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:22.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:22.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:22.198 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:19:22.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:22.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:19:22.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:22.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:19:22.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:19:22.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:19:22.201 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:19:22.201 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:22.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:19:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:22.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:22.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:22.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:22.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:22.203 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:19:27.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:27.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:27.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:27.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:27.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:27.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:27.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:27.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:27.217 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:27.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:27.217 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:19:27.219 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:19:27.219 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:19:27.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:27.219 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:27.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:27.220 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:19:27.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:27.220 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:19:27.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:27.221 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:19:27.221 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:19:27.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:27.221 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:27.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:27.221 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:19:27.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:27.221 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:19:27.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:27.223 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:19:27.223 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:19:27.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:27.223 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:27.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:27.223 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:19:27.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:27.223 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:19:27.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:27.225 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:19:27.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:19:27.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:19:27.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:19:27.226 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:19:27.226 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:19:27.226 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:27.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:27.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:27.231 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:19:27.709 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:19:27.755 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:19:27.756 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:19:27.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:19:27.758 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:19:27.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:19:27.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:19:27.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:19:27.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:19:27.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:19:27.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:19:27.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:19:27.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:19:28.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:19:28.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:28.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:28.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:28.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:28.653 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:19:29.126 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:19:29.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:29.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:29.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:29.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:29.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:19:30.071 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:19:30.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:30.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:30.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:30.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:30.544 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:19:31.017 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:19:31.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:31.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:31.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:31.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:31.512 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:19:31.984 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:19:32.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:32.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:32.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:32.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:19:32.928 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:19:33.401 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:19:33.872 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:19:34.344 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:19:34.817 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:19:35.290 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:19:35.761 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:19:36.232 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:19:36.703 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:19:37.174 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:19:37.648 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:19:38.120 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:19:38.591 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:19:38.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:19:38.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:19:38.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:38.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:38.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:38.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:38.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:38.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:38.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:38.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:38.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:38.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:38.812 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:19:38.812 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:38.812 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:38.812 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:38.812 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:38.812 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:38.812 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:38.812 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:19:43.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:43.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:43.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:43.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:43.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:43.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:43.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:43.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:43.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:43.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:43.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:19:43.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:19:43.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:19:43.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:43.828 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:43.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:43.828 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:19:43.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:43.828 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:19:43.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:43.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:19:43.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:19:43.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:43.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:43.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:43.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:19:43.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:43.830 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:19:43.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:43.831 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:19:43.831 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:19:43.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:43.831 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:43.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:43.831 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:19:43.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:43.832 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:19:43.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:43.834 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:19:43.834 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:19:43.834 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:19:43.835 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:19:43.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:43.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:43.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:43.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:19:43.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:43.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:43.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:43.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:43.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:43.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:43.836 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:19:48.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:19:48.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:19:48.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:48.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:48.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:48.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:48.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:19:48.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:48.853 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:48.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:19:48.853 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:19:48.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:19:48.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:19:48.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:48.856 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:48.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:19:48.857 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:19:48.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:19:48.857 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:19:48.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:48.858 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:19:48.858 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:19:48.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:48.858 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:48.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:19:48.858 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:19:48.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:19:48.859 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:19:48.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:48.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:19:48.860 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:19:48.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:48.860 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:19:48.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:19:48.861 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:19:48.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:19:48.861 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:19:48.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:19:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:19:48.864 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:19:48.864 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:19:48.864 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:19:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:48.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:19:48.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:48.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:19:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:19:48.868 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:19:49.348 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:19:49.392 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:19:49.394 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:19:49.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:19:49.396 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:19:49.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:19:49.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:19:49.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:19:49.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:19:49.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:19:49.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:19:49.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:19:49.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:19:49.820 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:19:49.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:49.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:49.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:49.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:50.291 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:19:50.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:19:50.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:50.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:50.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:50.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:51.237 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:19:51.708 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:19:51.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:51.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:51.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:51.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:52.180 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:19:52.653 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:19:52.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:52.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:52.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:52.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:53.125 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:19:53.597 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:19:53.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:19:53.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:19:53.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:19:53.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:19:54.068 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:19:54.542 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:19:55.014 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:19:55.486 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:19:55.959 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:19:56.432 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:19:56.904 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:19:57.377 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:19:57.850 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:19:58.321 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:19:58.793 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:19:59.266 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:19:59.738 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:20:00.211 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:20:00.681 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:20:01.155 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:20:01.627 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:20:02.099 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:20:02.570 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:20:03.044 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:20:03.516 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:20:03.988 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:20:04.459 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:20:04.932 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:20:05.405 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:20:05.877 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:20:06.350 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:20:06.823 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:20:07.294 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:20:07.766 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:20:08.239 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:20:08.707 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:20:09.178 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:20:09.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:20:09.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:20:09.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:09.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:09.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:09.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:09.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:09.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:09.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:09.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:09.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:09.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:09.450 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:20:09.451 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:09.451 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:09.451 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:09.451 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:09.451 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:09.451 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:09.451 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:14.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:14.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:14.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:14.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:14.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:14.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:14.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:14.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:14.468 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:14.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:14.469 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:20:14.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:20:14.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:20:14.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:14.474 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:14.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:14.474 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:20:14.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:14.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:20:14.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:14.477 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:20:14.477 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:20:14.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:14.477 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:14.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:14.477 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:20:14.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:14.477 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:20:14.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:14.480 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:20:14.480 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:20:14.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:14.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:14.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:14.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:20:14.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:14.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:20:14.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:14.483 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:20:14.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:20:14.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:14.484 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:20:14.484 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:20:14.484 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:20:14.484 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:14.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:14.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:14.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:14.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:14.487 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:20:19.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:19.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:19.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:19.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:19.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:19.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:19.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:19.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:19.503 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:19.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:19.503 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:20:19.505 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:20:19.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:20:19.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:19.506 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:19.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:19.507 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:20:19.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:19.507 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:20:19.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:19.508 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:20:19.508 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:20:19.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:19.508 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:19.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:19.508 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:20:19.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:19.508 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:20:19.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:19.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:20:19.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:20:19.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:19.510 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:19.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:19.510 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:20:19.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:19.510 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:20:19.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:19.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:20:19.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:20:19.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:20:19.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:20:19.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:20:19.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:20:19.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:20:19.513 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:20:19.513 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:20:19.513 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:19.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:19.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:19.518 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:20:19.996 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:20:20.041 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:20:20.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:20:20.044 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:20:20.046 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:20:20.468 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:20:20.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:20.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:20.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:20.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:20.943 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:20:21.415 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:20:21.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:21.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:21.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:21.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:21.888 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:20:22.361 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:20:22.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:22.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:22.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:22.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:22.832 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:20:23.306 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:20:23.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:23.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:23.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:23.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:23.779 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:20:24.251 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:20:24.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:24.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:24.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:24.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:24.724 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:20:25.197 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:20:25.664 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:20:26.128 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:20:26.591 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:20:27.054 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:20:27.518 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:20:27.981 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:20:28.444 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:20:28.907 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:20:29.370 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:20:29.834 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:20:30.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:30.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:30.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:30.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:30.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:30.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:30.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:30.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:30.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:30.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:30.059 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:20:30.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:30.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:30.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:30.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:30.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:30.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:30.059 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:35.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:35.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:35.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:35.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:35.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:35.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:35.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:35.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:35.073 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:35.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:35.073 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:20:35.076 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:20:35.076 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:20:35.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:35.077 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:35.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:35.077 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:20:35.077 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:35.077 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:20:35.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:35.079 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:20:35.079 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:20:35.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:35.080 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:35.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:35.080 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:20:35.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:35.080 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:20:35.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:35.081 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:20:35.081 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:20:35.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:35.081 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:35.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:35.082 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:20:35.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:35.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:20:35.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:35.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:20:35.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:20:35.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:20:35.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:20:35.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:20:35.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:20:35.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:20:35.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:20:35.085 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:20:35.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:35.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:35.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:35.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:35.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:35.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:35.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:35.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:35.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:35.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:35.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:35.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:35.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:35.087 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:20:40.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:40.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:40.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:40.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:40.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:40.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:40.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:40.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:40.103 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:40.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:40.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:20:40.106 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:20:40.106 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:20:40.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:40.107 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:40.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:40.107 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:20:40.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:40.107 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:20:40.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:40.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:20:40.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:20:40.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:40.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:40.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:40.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:20:40.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:40.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:20:40.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:40.110 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:20:40.110 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:20:40.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:40.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:40.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:40.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:20:40.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:40.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:20:40.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:40.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:20:40.114 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:20:40.114 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:20:40.114 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:40.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:40.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:40.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:20:40.597 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:20:40.636 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:20:40.637 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:20:40.639 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:20:40.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:20:41.069 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:20:41.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:41.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:41.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:41.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:41.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:20:42.015 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:20:42.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:42.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:42.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:42.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:42.487 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:20:42.961 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:20:43.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:43.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:43.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:43.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:43.433 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:20:43.905 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:20:44.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:44.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:44.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:44.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:44.379 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:20:44.851 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:20:45.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:45.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:45.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:45.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:45.325 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:20:45.797 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:20:46.269 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:20:46.744 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:20:47.216 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:20:47.687 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:20:48.162 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:20:48.634 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:20:49.109 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:20:49.581 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:20:50.057 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:20:50.528 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:20:51.002 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:20:51.474 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:20:51.946 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:20:52.421 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:20:52.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:52.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:52.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:52.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:52.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:52.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:52.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:52.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:52.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:52.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:52.653 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:20:52.653 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2704 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:52.653 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2704 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:52.653 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2704 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:52.653 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2704 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:52.653 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2704 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:52.653 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2704 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:52.653 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2704 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:52.653 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2704 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:20:57.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:57.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:57.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:57.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:57.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:57.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:57.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:57.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:57.669 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:57.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:20:57.670 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:20:57.674 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:20:57.675 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:20:57.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:57.675 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:57.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:57.675 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:20:57.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:20:57.675 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:20:57.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:20:57.677 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:20:57.677 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:20:57.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:57.677 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:57.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:20:57.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:57.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:20:57.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:20:57.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:20:57.678 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:20:57.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:20:57.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:57.679 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:20:57.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:57.679 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:20:57.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:20:57.679 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:20:57.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:20:57.681 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:20:57.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:20:57.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:20:57.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:20:57.681 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:20:57.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:20:57.682 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:20:57.682 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:20:57.682 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:57.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:20:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:20:57.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:20:57.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:20:57.684 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:21:02.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:02.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:02.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:02.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:02.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:02.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:02.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:02.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:02.699 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:02.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:02.700 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:21:02.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:21:02.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:21:02.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:02.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:02.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:02.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:21:02.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:02.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:21:02.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:02.705 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:21:02.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:21:02.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:02.705 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:02.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:02.705 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:21:02.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:02.705 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:21:02.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:02.707 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:21:02.707 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:21:02.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:02.707 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:02.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:02.708 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:21:02.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:02.708 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:21:02.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:02.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:21:02.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:21:02.711 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:21:02.712 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:02.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:02.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:02.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:02.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:02.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:02.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:02.716 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:21:03.195 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:21:03.244 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:21:03.246 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:21:03.248 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:21:03.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:21:03.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:21:03.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:21:03.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:21:03.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:03.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:21:03.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:21:03.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:21:03.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:21:03.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:21:03.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:21:03.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:03.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:03.667 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:21:03.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:03.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:03.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:03.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:04.138 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:21:04.612 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:21:04.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:04.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:04.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:04.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:05.084 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:21:05.556 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:21:05.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:05.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:05.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:05.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:06.027 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:21:06.498 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:21:06.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:06.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:06.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:06.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:06.971 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:21:07.444 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:21:07.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:07.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:07.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:07.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:07.916 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:21:08.389 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:21:08.862 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:21:09.334 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:21:09.807 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:21:10.279 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:21:10.751 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:21:11.222 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:21:11.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:21:11.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:21:11.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:11.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:11.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:11.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:11.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:11.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:11.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:11.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:11.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:11.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:11.294 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:21:16.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:16.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:16.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:16.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:16.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:16.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:16.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:16.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:16.307 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:16.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:16.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:21:16.310 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:21:16.310 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:21:16.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:16.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:16.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:16.311 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:21:16.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:16.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:21:16.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:16.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:21:16.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:21:16.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:16.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:16.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:16.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:21:16.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:16.314 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:21:16.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:16.316 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:21:16.316 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:21:16.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:16.317 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:16.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:16.317 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:21:16.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:16.317 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:21:16.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:16.320 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:21:16.320 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:21:16.320 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:21:16.320 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:21:16.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:16.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:16.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:16.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:21:16.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:16.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:16.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:16.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:16.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:16.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:16.322 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:21:21.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:21.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:21.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:21.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:21.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:21.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:21.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:21.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:21.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:21.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:21.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:21:21.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:21:21.338 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:21:21.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:21.338 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:21.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:21.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:21:21.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:21.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:21:21.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:21.340 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:21:21.340 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:21:21.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:21.340 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:21.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:21.340 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:21:21.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:21.340 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:21:21.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:21.341 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:21:21.341 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:21:21.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:21.342 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:21.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:21.342 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:21:21.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:21.342 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:21:21.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:21.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:21:21.345 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:21:21.345 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:21:21.345 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:21.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:21.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:21.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:21.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:21.349 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:21:21.828 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:21:21.870 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:21:21.872 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:21:21.873 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:21:21.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:21:21.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:21:21.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:21:21.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:21:21.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:21.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:21:21.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:21:21.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:21:21.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:21:21.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:21:21.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:21:21.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:21.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:22.300 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:21:22.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:22.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:22.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:22.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:22.771 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:21:23.245 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:21:23.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:23.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:23.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:23.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:23.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:21:24.189 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:21:24.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:24.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:24.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:24.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:24.660 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:21:25.133 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:21:25.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:25.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:25.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:25.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:25.606 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:21:26.077 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:21:26.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:26.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:26.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:26.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:26.548 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:21:27.019 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:21:27.493 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:21:27.965 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:21:28.437 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:21:28.908 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:21:29.382 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:21:29.854 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:21:29.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:21:29.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:21:29.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:29.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:29.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:29.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:29.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:29.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:29.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:29.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:29.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:29.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:29.926 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:21:29.926 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:29.926 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:29.926 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:29.926 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:29.926 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:29.926 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:34.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:34.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:34.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:34.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:34.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:34.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:34.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:34.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:34.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:34.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:34.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:21:34.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:21:34.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:21:34.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:34.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:34.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:34.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:21:34.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:34.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:21:34.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:34.949 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:21:34.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:21:34.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:34.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:34.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:34.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:21:34.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:34.949 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:21:34.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:34.952 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:21:34.952 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:21:34.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:34.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:34.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:34.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:21:34.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:34.953 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:21:34.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:34.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:21:34.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:21:34.957 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:21:34.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:21:34.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:34.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:34.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:34.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:34.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:34.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:34.959 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:21:39.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:39.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:39.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:39.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:39.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:39.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:39.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:39.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:39.974 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:39.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:39.974 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:21:39.976 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:21:39.976 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:21:39.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:39.976 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:39.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:39.977 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:21:39.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:39.977 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:21:39.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:39.979 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:21:39.979 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:21:39.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:39.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:39.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:39.979 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:21:39.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:39.979 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:21:39.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:39.981 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:21:39.981 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:21:39.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:39.981 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:39.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:39.981 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:21:39.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:39.981 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:21:39.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:39.983 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:21:39.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:21:39.984 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:21:39.984 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:21:39.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:39.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:39.989 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:21:40.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:21:40.508 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:21:40.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:21:40.511 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:21:40.514 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:21:40.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:21:40.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:21:40.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:21:40.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:40.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:21:40.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:21:40.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:21:40.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:21:40.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:21:40.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:21:40.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:40.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:40.940 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:21:40.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:40.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:40.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:40.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:41.411 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:21:41.885 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:21:41.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:41.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:41.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:41.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:42.357 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:21:42.829 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:21:42.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:42.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:42.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:42.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:43.302 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:21:43.775 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:21:43.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:43.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:43.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:43.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:44.247 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:21:44.718 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:21:44.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:44.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:44.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:44.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:45.191 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:21:45.663 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:21:46.135 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:21:46.606 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:21:47.080 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:21:47.552 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:21:48.024 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:21:48.495 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:21:48.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:21:48.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:21:48.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:48.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:48.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:48.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:48.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:48.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:48.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:48.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:48.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:48.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:48.572 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.573 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:48.574 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:21:53.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:53.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:53.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:53.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:53.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:53.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:53.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:53.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:53.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:53.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:53.589 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:21:53.593 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:21:53.593 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:21:53.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:53.594 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:53.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:53.595 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:21:53.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:53.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:21:53.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:53.597 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:21:53.597 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:21:53.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:53.597 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:53.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:53.597 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:21:53.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:53.598 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:21:53.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:53.599 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:21:53.600 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:21:53.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:53.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:53.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:53.601 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:21:53.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:53.601 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:21:53.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:53.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:21:53.604 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:21:53.604 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:21:53.604 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:53.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:53.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:53.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:53.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:53.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:53.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:53.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:53.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:53.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:53.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:53.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:53.606 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:21:58.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:21:58.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:21:58.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:58.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:58.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:58.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:58.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:21:58.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:58.622 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:58.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:21:58.622 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:21:58.624 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:21:58.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:21:58.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:58.625 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:58.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:21:58.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:21:58.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:21:58.625 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:21:58.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:58.627 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:21:58.627 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:21:58.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:58.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:58.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:21:58.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:21:58.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:21:58.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:21:58.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:58.630 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:21:58.630 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:21:58.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:58.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:21:58.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:21:58.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:21:58.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:21:58.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:21:58.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:21:58.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:21:58.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:21:58.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:21:58.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:21:58.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:21:58.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:21:58.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:21:58.635 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:21:58.635 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:21:58.635 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:58.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:58.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:58.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:58.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:21:58.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:58.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:58.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:21:58.640 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:21:59.119 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:21:59.172 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:21:59.174 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:21:59.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:21:59.177 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:21:59.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:21:59.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:21:59.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:21:59.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:59.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:21:59.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:21:59.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:21:59.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:21:59.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:21:59.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:21:59.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:59.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:21:59.590 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:21:59.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:21:59.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:21:59.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:21:59.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:00.062 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:22:00.535 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:22:00.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:00.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:00.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:00.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:01.008 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:22:01.480 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:22:01.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:01.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:01.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:01.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:01.951 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:22:02.424 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:22:02.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:02.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:02.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:02.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:02.897 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:22:03.369 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:22:03.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:03.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:03.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:03.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:03.840 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:22:04.313 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:22:04.786 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:22:05.257 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:22:05.729 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:22:06.202 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:22:06.674 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:22:07.146 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:22:07.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:22:07.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:22:07.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:07.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:07.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:07.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:07.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:07.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:07.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:07.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:07.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:07.217 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:22:07.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:07.217 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:07.217 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:12.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:12.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:12.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:12.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:12.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:12.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:12.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:12.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:12.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:12.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:12.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:22:12.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:22:12.231 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:22:12.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:12.231 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:12.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:12.232 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:22:12.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:12.232 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:22:12.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:12.233 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:22:12.233 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:22:12.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:12.233 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:12.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:12.233 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:22:12.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:12.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:22:12.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:12.235 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:22:12.235 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:22:12.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:12.235 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:12.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:12.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:22:12.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:12.235 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:22:12.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:12.237 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:22:12.238 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:22:12.238 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:22:12.238 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:12.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:12.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:12.240 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:22:17.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:17.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:17.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:17.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:17.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:17.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:17.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:17.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:17.275 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:17.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:17.275 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:22:17.279 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:22:17.279 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:22:17.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:17.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:17.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:17.279 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:22:17.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:17.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:22:17.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:17.284 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:22:17.284 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:22:17.284 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:17.284 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:17.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:17.285 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:22:17.285 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:17.285 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:22:17.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:17.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:22:17.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:22:17.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:17.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:17.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:17.290 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:22:17.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:17.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:22:17.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:17.295 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:22:17.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:22:17.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:22:17.295 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:22:17.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:17.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:17.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:22:17.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:22:17.297 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:22:17.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:22:17.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:17.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:17.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:17.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:22:17.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:17.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:17.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:17.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:17.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:17.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:17.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:22:17.779 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:22:17.823 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:22:17.824 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:22:17.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:22:17.827 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:22:17.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:22:17.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:22:17.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:22:17.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:22:17.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:22:17.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:22:17.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:22:17.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:22:17.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:22:17.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:22:17.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:22:17.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:22:18.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:22:18.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:18.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:18.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:18.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:18.717 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:22:19.191 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:22:19.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:19.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:19.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:19.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:19.663 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:22:20.135 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:22:20.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:20.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:20.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:20.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:20.608 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:22:21.081 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:22:21.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:21.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:21.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:21.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:21.552 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:22:22.024 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:22:22.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:22.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:22.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:22.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:22.497 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:22:22.969 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:22:23.441 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:22:23.912 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:22:24.383 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:22:24.856 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:22:25.329 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:22:25.800 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:22:26.272 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:22:26.745 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:22:27.217 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:22:27.689 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:22:28.160 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:22:28.634 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:22:29.106 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:22:29.578 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:22:30.049 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:22:30.522 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:22:30.994 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:22:31.466 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:22:31.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:22:31.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:22:31.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:31.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:31.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:31.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:31.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:31.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:31.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:31.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:31.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:31.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:31.881 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:22:31.881 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3151 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3152 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3152 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3152 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3152 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3152 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3152 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3152 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:31.882 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3152 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:36.885 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:36.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:36.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:36.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:36.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:36.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:36.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:36.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:36.890 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:36.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:36.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:22:36.892 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:22:36.893 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:22:36.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:36.893 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:36.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:36.894 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:22:36.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:36.894 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:22:36.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:36.895 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:22:36.895 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:22:36.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:36.895 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:36.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:36.895 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:22:36.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:36.896 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:22:36.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:36.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:22:36.898 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:22:36.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:36.898 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:36.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:36.898 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:22:36.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:36.898 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:22:36.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:22:36.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:22:36.902 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:22:36.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:36.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:36.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:36.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:36.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:36.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:36.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:36.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:36.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:36.904 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:22:41.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:41.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:41.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:41.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:41.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:41.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:41.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:41.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:41.920 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:41.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:41.921 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:22:41.923 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:22:41.923 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:22:41.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:41.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:41.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:41.924 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:22:41.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:41.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:22:41.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:41.926 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:22:41.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:22:41.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:41.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:41.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:41.926 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:22:41.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:41.926 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:22:41.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:41.928 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:22:41.928 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:22:41.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:41.928 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:41.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:41.928 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:22:41.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:41.929 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:22:41.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:22:41.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:22:41.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:22:41.932 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:22:41.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:41.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:41.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:41.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:41.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:41.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:41.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:41.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:41.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:41.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:41.937 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:22:42.414 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:22:42.461 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:22:42.463 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:22:42.464 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:22:42.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:22:42.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:22:42.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:22:42.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:22:42.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:22:42.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:22:42.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:22:42.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:22:42.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:22:42.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:22:42.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:22:42.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:22:42.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:22:42.887 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:22:42.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:42.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:42.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:42.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:43.358 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:22:43.831 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:22:43.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:43.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:43.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:43.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:44.303 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:22:44.776 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:22:44.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:44.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:44.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:44.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:45.249 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:22:45.721 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:22:45.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:45.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:45.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:45.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:46.193 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:22:46.664 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:22:46.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:46.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:46.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:46.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:47.135 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:22:47.606 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:22:48.077 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:22:48.550 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:22:49.022 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:22:49.494 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:22:49.965 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:22:50.439 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:22:50.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:22:50.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:22:50.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:50.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:50.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:50.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:50.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:50.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:50.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:50.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:50.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:50.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:50.519 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:22:50.519 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.519 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.520 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:50.521 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:22:55.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:55.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:55.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:55.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:55.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:55.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:55.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:55.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:22:55.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:22:55.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:22:55.526 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:22:55.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:55.526 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:55.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:22:55.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:55.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:22:55.526 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:22:55.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:22:55.528 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:22:55.528 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:22:55.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:55.528 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:55.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:22:55.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:55.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:22:55.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:22:55.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:22:55.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:22:55.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:22:55.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:55.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:22:55.529 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:22:55.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:55.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:22:55.529 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:22:55.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:22:55.531 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:22:55.531 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:22:55.531 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:55.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:55.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:22:55.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:22:55.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:22:55.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:22:55.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:22:55.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:22:55.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:22:55.533 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:23:00.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:00.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:00.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:00.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:00.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:00.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:00.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:00.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:00.549 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:00.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:00.549 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:23:00.552 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:23:00.552 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:23:00.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:00.553 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:00.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:00.553 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:23:00.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:00.554 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:23:00.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:00.555 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:23:00.555 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:23:00.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:00.555 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:00.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:00.555 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:23:00.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:00.555 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:23:00.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:00.557 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:23:00.557 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:23:00.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:00.557 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:00.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:00.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:23:00.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:00.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:23:00.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:00.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:23:00.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:23:00.561 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:23:00.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:23:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:00.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:00.566 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:23:01.044 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:23:01.091 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:23:01.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:23:01.094 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:23:01.097 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:23:01.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:23:01.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:23:01.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:23:01.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:23:01.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:23:01.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:23:01.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:23:01.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:23:01.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:23:01.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:23:01.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:23:01.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:23:01.512 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:23:01.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:01.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:01.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:01.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:01.982 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:23:02.454 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:23:02.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:02.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:02.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:02.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:02.927 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:23:03.399 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:23:03.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:03.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:03.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:03.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:03.871 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:23:04.342 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:23:04.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:04.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:04.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:04.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:04.816 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:23:05.288 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:23:05.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:05.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:05.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:05.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:05.760 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:23:06.234 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:23:06.706 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:23:07.178 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:23:07.649 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:23:08.122 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:23:08.594 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:23:09.066 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:23:09.537 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:23:10.010 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:23:10.483 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:23:10.955 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:23:11.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:23:11.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:23:11.140 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=2286 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:11.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:11.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:11.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:11.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:11.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:11.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:11.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:11.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:11.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:11.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:11.145 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:23:11.145 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:11.145 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:11.145 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:11.145 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:16.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:16.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:16.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:16.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:16.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:16.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:16.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:16.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:16.165 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:16.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:16.166 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:23:16.168 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:23:16.168 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:23:16.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:16.169 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:16.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:16.169 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:23:16.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:16.170 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:23:16.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:16.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:23:16.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:23:16.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:16.171 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:16.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:16.171 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:23:16.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:16.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:23:16.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:16.173 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:23:16.173 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:23:16.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:16.173 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:16.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:16.173 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:23:16.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:16.173 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:23:16.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:16.175 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:23:16.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:23:16.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:23:16.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:23:16.175 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:23:16.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:23:16.176 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:23:16.176 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:23:16.176 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:16.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:16.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:16.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:16.177 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:23:21.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:21.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:21.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:21.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:21.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:21.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:21.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:21.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:21.216 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:21.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:21.217 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:23:21.218 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:23:21.218 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:23:21.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:21.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:21.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:21.219 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:23:21.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:21.220 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:23:21.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:21.221 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:23:21.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:23:21.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:21.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:21.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:21.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:23:21.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:21.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:23:21.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:21.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:23:21.227 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:23:21.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:21.227 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:21.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:21.227 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:23:21.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:21.227 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:23:21.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:21.232 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:23:21.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:23:21.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:23:21.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:23:21.232 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:21.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:23:21.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:23:21.234 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:23:21.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:23:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:21.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:21.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:21.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:21.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:21.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:21.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:21.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:21.239 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:23:21.717 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:23:21.761 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:23:21.763 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:23:21.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:23:21.765 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:23:21.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:23:21.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:23:21.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:23:21.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:23:21.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:23:21.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:23:21.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:23:21.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:23:21.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:23:21.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:23:21.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:23:22.189 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:23:22.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:22.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:22.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:22.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:22.660 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:23:23.130 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:23:23.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:23.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:23.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:23.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:23.601 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:23:24.073 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:23:24.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:24.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:24.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:24.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:24.546 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:23:25.018 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:23:25.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:25.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:25.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:25.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:25.491 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:23:25.964 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:23:26.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:26.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:26.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:26.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:26.436 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:23:26.908 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:23:27.379 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:23:27.853 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:23:28.325 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:23:28.797 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:23:29.268 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:23:29.742 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:23:30.214 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:23:30.686 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:23:31.157 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:23:31.630 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:23:32.103 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:23:32.574 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:23:32.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:23:32.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:23:32.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:32.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:32.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:32.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:32.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:32.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:32.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:32.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:32.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:32.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:32.822 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:23:32.822 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:32.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:32.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:32.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:32.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:32.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:32.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:32.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2504 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:32.823 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2504 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:37.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:37.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:37.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:37.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:37.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:37.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:37.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:37.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:37.835 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:37.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:37.835 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:23:37.838 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:23:37.838 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:23:37.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:37.839 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:37.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:37.839 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:23:37.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:37.840 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:23:37.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:37.841 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:23:37.841 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:23:37.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:37.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:37.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:37.841 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:23:37.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:37.841 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:23:37.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:37.843 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:23:37.843 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:23:37.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:37.843 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:37.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:37.843 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:23:37.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:37.843 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:23:37.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:23:37.846 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:23:37.846 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:23:37.846 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:37.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:37.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:23:37.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:37.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:37.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:37.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:37.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:37.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:37.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:37.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:37.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:37.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:37.848 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:23:42.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:42.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:42.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:42.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:42.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:42.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:42.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:42.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:42.861 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:42.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:42.861 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:23:42.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:23:42.863 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:23:42.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:42.863 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:42.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:42.864 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:23:42.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:42.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:23:42.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:42.865 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:23:42.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:23:42.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:42.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:42.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:42.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:23:42.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:42.866 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:23:42.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:42.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:23:42.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:23:42.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:42.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:42.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:42.867 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:23:42.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:42.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:23:42.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:42.870 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:23:42.870 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:23:42.870 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:23:42.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:42.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:42.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:42.875 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:23:43.353 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:23:43.394 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:23:43.397 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:23:43.399 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:23:43.825 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:23:43.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:43.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:43.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:43.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:44.298 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:23:44.771 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:23:44.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:44.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:44.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:44.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:45.243 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:23:45.716 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:23:45.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:45.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:45.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:45.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:46.189 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:23:46.661 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:23:46.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:46.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:46.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:46.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:47.134 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:23:47.607 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:23:47.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:47.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:47.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:47.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:48.078 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:23:48.551 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:23:49.024 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:23:49.496 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:23:49.969 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:23:50.442 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:23:50.913 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:23:51.386 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:23:51.859 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:23:52.331 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:23:52.804 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:23:53.277 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:23:53.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:53.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:53.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:53.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:53.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:53.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:53.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:53.415 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:53.415 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:53.415 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:23:53.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:53.416 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2275 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:53.416 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2275 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:53.416 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2275 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:53.416 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2275 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:53.416 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2275 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:53.416 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2275 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:53.416 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2275 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:53.416 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2275 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:23:58.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:58.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:58.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:58.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:58.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:58.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:58.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:58.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:58.425 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:58.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:23:58.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:23:58.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:23:58.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:23:58.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:58.430 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:58.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:58.430 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:23:58.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:23:58.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:23:58.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:23:58.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:23:58.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:23:58.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:58.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:58.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:58.432 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:23:58.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:23:58.432 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:23:58.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:23:58.434 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:23:58.434 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:23:58.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:58.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:23:58.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:58.434 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:23:58.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:23:58.434 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:23:58.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:58.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:23:58.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:23:58.438 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:23:58.438 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:58.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:23:58.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:23:58.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:23:58.439 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:24:03.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:24:03.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:24:03.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:03.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:03.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:03.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:03.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:03.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:24:03.458 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:03.458 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:24:03.458 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:24:03.462 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:24:03.462 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:24:03.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:24:03.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:03.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:03.463 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:24:03.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:24:03.464 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:24:03.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:03.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:24:03.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:24:03.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:24:03.465 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:03.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:03.465 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:24:03.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:24:03.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:24:03.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:03.467 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:24:03.467 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:24:03.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:24:03.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:03.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:03.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:24:03.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:24:03.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:24:03.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:03.470 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:24:03.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:24:03.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:24:03.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:24:03.470 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:24:03.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:24:03.471 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:24:03.471 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:24:03.471 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:03.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:03.476 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:24:03.954 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:24:04.001 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:24:04.003 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:24:04.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:24:04.005 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:24:04.418 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:24:04.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:04.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:04.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:04.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:04.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:24:05.345 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:24:05.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:05.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:05.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:05.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:05.808 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:24:06.272 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:24:06.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:06.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:06.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:06.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:06.735 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:24:07.198 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:24:07.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:07.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:07.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:07.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:07.661 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:24:08.125 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:24:08.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:08.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:08.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:08.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:08.588 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:24:09.051 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:24:09.514 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:24:09.978 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:24:10.441 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:24:10.905 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:24:11.368 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:24:11.831 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:24:12.294 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:24:12.757 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:24:13.221 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:24:13.684 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:24:14.147 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:24:14.610 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:24:15.074 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:24:15.537 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:24:16.000 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:24:16.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:16.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:16.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:16.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:16.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:16.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:16.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:16.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:16.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:24:16.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:24:16.018 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:24:21.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:24:21.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:24:21.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:21.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:21.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:21.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:21.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:21.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:24:21.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:21.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:24:21.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:24:21.039 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:24:21.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:24:21.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:24:21.041 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:21.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:21.041 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:24:21.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:24:21.042 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:24:21.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:21.043 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:24:21.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:24:21.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:24:21.044 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:21.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:21.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:24:21.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:24:21.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:24:21.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:21.046 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:24:21.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:24:21.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:24:21.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:21.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:21.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:24:21.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:24:21.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:24:21.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:21.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:24:21.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:24:21.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:24:21.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:24:21.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:21.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:24:21.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:24:21.051 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:24:21.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:21.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:21.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:21.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:21.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:21.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:21.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:24:21.535 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:24:21.586 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:24:21.588 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:24:21.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:24:21.590 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:24:21.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:24:21.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:24:21.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:24:21.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:24:21.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:24:21.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:24:21.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:24:21.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:24:22.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:24:22.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:22.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:22.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:22.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:22.479 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:24:22.952 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:24:23.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:23.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:23.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:23.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:23.424 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:24:23.896 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:24:24.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:24.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:24.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:24.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:24.367 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:24:24.841 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:24:25.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:25.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:25.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:25.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:25.313 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:24:25.785 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:24:26.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:26.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:26.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:26.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:26.259 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:24:26.731 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:24:27.203 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:24:27.674 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:24:28.148 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:24:28.620 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:24:29.092 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:24:29.563 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:24:30.036 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:24:30.508 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:24:30.981 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:24:31.454 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:24:31.926 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:24:32.399 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:24:32.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:24:32.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:24:32.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:32.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:32.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:32.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:32.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:32.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:32.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:32.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:32.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:24:32.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:24:32.640 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:24:32.640 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2502 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:32.640 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2502 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:32.640 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2502 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:32.640 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2502 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:32.640 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2502 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:32.640 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2502 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:32.640 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2502 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:37.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:24:37.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:24:37.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:37.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:37.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:37.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:37.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:37.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:24:37.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:37.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:24:37.653 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:24:37.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:24:37.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:24:37.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:24:37.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:37.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:37.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:24:37.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:24:37.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:24:37.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:37.657 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:24:37.657 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:24:37.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:24:37.657 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:37.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:37.657 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:24:37.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:24:37.657 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:24:37.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:37.659 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:24:37.659 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:24:37.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:24:37.659 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:37.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:37.659 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:24:37.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:24:37.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:24:37.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:24:37.662 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:24:37.662 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:24:37.662 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:37.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:37.667 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:24:38.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:24:38.190 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:24:38.192 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:24:38.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:24:38.195 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:24:38.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:24:38.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:24:38.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:24:38.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:24:38.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:24:38.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:24:38.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:24:38.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:24:38.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:24:38.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:38.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:38.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:38.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:39.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:24:39.562 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:24:39.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:39.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:39.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:39.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:40.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:24:40.506 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:24:40.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:40.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:40.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:40.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:40.977 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:24:41.451 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:24:41.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:41.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:41.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:41.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:41.922 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:24:42.394 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:24:42.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:42.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:42.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:42.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:42.865 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:24:43.339 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:24:43.811 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:24:44.283 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:24:44.757 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:24:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:24:45.701 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:24:46.172 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:24:46.646 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:24:47.118 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:24:47.590 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:24:48.061 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:24:48.534 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:24:49.007 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:24:49.479 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:24:49.950 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:24:50.423 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:24:50.896 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:24:51.368 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:24:51.839 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:24:52.312 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:24:52.785 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:24:53.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:24:53.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:24:53.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:53.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:53.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:53.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:53.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:53.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:53.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:53.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:53.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:24:53.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:24:53.242 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:24:53.242 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3365 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:53.242 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3365 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:53.242 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3365 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:53.242 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3365 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:53.242 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3365 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:53.242 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3365 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:53.242 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3365 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:58.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:24:58.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:24:58.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:58.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:58.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:58.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:58.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:58.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:24:58.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:58.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:24:58.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:24:58.261 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:24:58.261 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:24:58.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:24:58.262 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:58.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:58.262 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:24:58.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:24:58.263 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:24:58.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:58.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:24:58.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:24:58.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:24:58.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:58.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:58.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:24:58.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:24:58.264 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:24:58.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:58.266 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:24:58.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:24:58.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:24:58.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:24:58.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:58.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:24:58.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:24:58.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:24:58.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:24:58.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:24:58.270 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:24:58.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:24:58.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:58.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:58.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:58.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:24:58.274 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:24:58.753 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:24:58.796 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:24:58.798 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:24:58.800 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:24:58.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:24:58.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:24:58.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:24:58.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:24:58.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:24:58.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:24:58.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:24:58.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:24:58.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:24:58.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:24:58.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:24:58.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:24:58.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:24:58.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:24:58.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:24:58.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:24:58.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:24:58.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:24:58.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:24:58.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:24:58.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:24:58.857 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:24:58.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:58.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:58.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:24:58.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:03.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:25:03.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:25:03.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:25:03.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:25:03.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:25:03.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:25:03.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:25:03.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:25:03.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:03.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:25:03.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:25:03.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:25:03.870 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:25:03.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:25:03.870 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:03.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:25:03.871 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:25:03.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:25:03.871 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:25:03.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:03.873 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:25:03.873 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:25:03.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:25:03.873 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:03.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:25:03.873 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:25:03.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:25:03.873 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:25:03.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:03.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:25:03.875 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:25:03.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:25:03.875 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:03.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:25:03.875 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:25:03.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:25:03.875 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:25:03.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:03.878 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:25:03.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:25:03.879 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:25:03.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:03.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:03.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:03.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:03.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:03.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:03.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:03.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:03.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:03.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:03.883 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:25:04.362 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:25:04.407 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:25:04.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:04.411 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:25:04.413 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:25:04.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:04.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:04.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:04.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:04.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:04.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:04.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:04.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:04.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:04.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:04.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:04.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:04.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:04.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:04.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:04.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:04.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:04.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:04.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:04.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:04.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:04.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:04.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:04.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:04.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:04.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:04.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:04.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:04.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:04.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.834 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:25:04.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:04.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:04.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:04.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:04.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:04.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:04.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:04.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:04.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:04.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:04.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:04.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:04.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:04.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:04.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:04.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:04.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:04.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:04.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:04.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:04.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:04.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:05.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:05.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:05.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:05.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:05.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:05.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:05.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:05.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:05.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:05.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:05.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:05.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:05.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:05.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:05.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:05.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:05.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:05.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:05.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:05.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:05.305 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:25:05.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:05.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:05.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:05.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:05.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:05.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:05.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:05.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:05.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:25:05.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:25:05.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:25:05.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:25:05.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:25:05.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:25:05.643 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:25:05.643 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=381 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:05.643 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:05.643 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:05.643 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:05.643 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:05.644 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:05.644 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:10.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:25:10.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:25:10.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:25:10.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:25:10.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:25:10.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:25:10.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:25:10.651 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:25:10.651 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:10.651 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:25:10.651 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:25:10.653 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:25:10.653 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:25:10.654 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:25:10.654 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:10.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:25:10.654 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:25:10.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:25:10.655 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:25:10.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:10.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:25:10.656 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:25:10.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:25:10.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:10.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:25:10.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:25:10.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:25:10.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:25:10.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:10.658 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:25:10.658 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:25:10.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:25:10.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:10.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:25:10.658 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:25:10.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:25:10.658 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:25:10.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:10.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:25:10.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:25:10.661 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:25:10.662 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:10.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:25:11.144 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:25:11.191 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:25:11.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:11.194 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:25:11.196 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:25:11.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:11.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:11.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:11.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:11.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:11.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:11.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:11.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:11.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:11.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:11.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:11.247 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:11.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:11.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:11.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:11.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:11.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:25:11.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:11.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:11.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:11.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:12.090 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:25:12.563 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:25:12.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:12.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:12.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:12.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:13.035 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:25:13.508 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:25:13.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:13.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:13.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:13.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:13.981 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:25:14.453 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:25:14.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:14.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:14.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:14.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:14.924 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:25:15.398 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:25:15.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:15.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:15.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:15.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:15.870 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:25:16.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:16.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:16.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:16.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:16.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:16.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:16.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:16.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:16.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:16.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:16.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:16.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:16.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:16.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:16.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:16.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:16.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:16.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:16.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:16.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:16.342 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:25:16.813 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:25:17.284 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:25:17.757 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:25:18.230 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:25:18.702 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:25:19.176 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:25:19.648 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:25:20.120 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:25:20.594 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:25:21.066 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:25:21.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:21.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:21.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:21.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:21.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:21.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:21.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:21.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:21.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:21.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:21.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:21.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:21.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:21.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:21.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:21.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:21.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:21.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:21.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:21.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:21.537 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:25:22.009 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:25:22.480 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:25:22.951 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:25:23.423 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:25:23.896 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:25:24.368 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:25:24.839 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:25:25.310 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:25:25.783 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:25:26.255 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:25:26.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:26.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:26.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:26.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:26.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:26.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:26.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:26.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:26.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:26.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:26.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:26.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:26.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:26.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:26.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:26.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:26.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:26.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:26.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:26.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:26.722 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:25:27.194 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:25:27.667 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:25:28.139 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:25:28.611 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:25:29.082 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:25:29.556 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:25:30.028 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:25:30.500 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:25:30.974 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:25:31.446 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:25:31.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:31.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:31.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:31.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:31.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:31.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:31.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:31.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:31.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:25:31.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:25:31.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:25:31.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:25:31.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:25:31.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:25:31.460 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:25:31.460 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:31.460 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:31.460 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:31.460 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:31.460 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:31.460 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:31.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:31.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:36.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:25:36.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:25:36.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:25:36.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:25:36.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:25:36.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:25:36.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:25:36.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:25:36.473 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:36.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:25:36.473 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:25:36.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:25:36.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:25:36.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:25:36.476 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:36.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:25:36.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:25:36.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:25:36.477 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:25:36.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:36.477 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:25:36.477 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:25:36.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:25:36.478 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:36.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:25:36.478 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:25:36.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:25:36.478 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:25:36.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:36.480 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:25:36.480 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:25:36.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:25:36.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:25:36.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:25:36.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:25:36.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:25:36.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:25:36.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:36.482 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:25:36.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:25:36.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:25:36.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:25:36.482 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:25:36.483 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:25:36.483 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:25:36.483 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:36.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:36.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:25:36.488 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:25:36.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:25:37.015 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:25:37.017 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:25:37.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:37.019 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:25:37.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:37.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:37.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:37.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:37.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:37.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:37.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:37.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:37.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:37.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:37.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:37.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:37.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:37.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:37.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:37.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:37.434 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:25:37.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:37.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:37.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:37.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:37.905 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:25:38.378 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:25:38.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:38.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:38.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:38.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:38.851 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:25:39.324 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:25:39.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:39.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:39.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:39.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:39.794 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:25:40.268 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:25:40.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:40.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:40.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:40.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:40.740 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:25:41.213 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:25:41.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:41.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:41.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:41.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:41.686 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:25:42.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:42.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:42.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:42.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:42.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:42.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:42.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:42.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:42.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:42.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:42.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:42.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:42.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:42.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:42.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:42.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:42.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:42.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:42.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:42.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:42.158 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:25:42.625 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:25:43.096 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:25:43.569 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:25:44.042 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:25:44.514 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:25:44.985 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:25:45.458 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:25:45.931 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:25:46.403 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:25:46.877 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:25:47.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:47.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:47.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:47.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:47.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:47.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:47.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:47.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:47.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:47.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:47.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:47.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:47.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:47.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:47.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:47.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:47.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:47.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:47.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:47.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:47.346 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:25:47.815 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:25:48.286 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:25:48.757 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:25:49.228 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:25:49.699 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:25:50.172 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:25:50.644 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:25:51.116 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:25:51.587 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:25:52.058 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:25:52.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:52.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:52.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:52.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:52.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:52.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:52.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:52.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:52.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:52.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:25:52.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:52.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:52.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:52.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:52.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:25:52.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:25:52.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:25:52.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:25:52.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:52.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:52.528 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:25:53.000 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:25:53.472 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:25:53.945 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:25:54.418 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:25:54.891 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:25:55.363 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:25:55.835 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:25:56.309 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:25:56.781 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:25:57.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:25:57.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:25:57.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:25:57.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:25:57.253 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:25:57.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:25:57.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:25:57.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:25:57.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:25:57.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:25:57.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:25:57.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:25:57.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:25:57.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:25:57.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:25:57.264 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:25:57.264 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4491 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.264 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4491 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.264 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4491 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.264 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4491 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4491 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4491 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4491 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4492 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4492 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:25:57.265 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:02.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:26:02.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:26:02.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:26:02.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:26:02.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:26:02.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:26:02.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:26:02.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:26:02.272 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:02.273 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:26:02.273 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:26:02.276 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:26:02.276 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:26:02.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:26:02.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:02.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:26:02.276 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:26:02.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:26:02.277 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:26:02.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:02.279 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:26:02.280 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:26:02.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:26:02.280 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:02.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:26:02.281 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:26:02.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:26:02.281 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:26:02.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:02.282 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:26:02.282 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:26:02.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:26:02.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:02.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:26:02.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:26:02.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:26:02.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:26:02.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:02.286 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:26:02.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:26:02.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:26:02.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:26:02.286 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:26:02.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:26:02.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:26:02.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:26:02.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:26:02.287 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:26:02.287 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:26:02.287 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:26:02.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:02.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:02.292 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:26:02.771 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:26:02.819 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:26:02.821 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:26:02.823 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:26:02.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:02.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:02.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:02.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:02.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:02.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:02.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:02.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:02.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:02.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:02.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:02.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:02.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:02.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:02.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:02.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:02.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:03.238 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:26:03.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:03.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:03.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:03.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:03.710 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:26:04.183 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:26:04.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:04.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:04.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:04.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:04.656 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:26:05.128 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:26:05.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:05.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:05.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:05.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:05.599 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:26:06.070 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:26:06.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:06.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:06.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:06.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:06.541 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:26:07.014 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:26:07.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:07.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:07.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:07.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:07.487 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:26:07.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:07.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:07.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:07.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:07.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:07.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:07.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:07.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:07.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:07.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:07.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:07.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:07.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:07.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:07.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:07.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:07.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:07.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:07.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:07.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:07.958 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:26:08.429 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:26:08.900 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:26:09.371 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:26:09.842 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:26:10.315 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:26:10.788 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:26:11.260 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:26:11.733 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:26:12.206 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:26:12.678 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:26:12.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:12.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:12.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:12.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:12.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:12.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:12.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:12.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:12.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:12.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:12.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:12.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:12.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:12.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:12.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:12.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:13.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:13.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:13.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:13.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:13.148 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:26:13.619 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:26:14.090 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:26:14.561 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:26:15.034 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:26:15.507 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:26:15.978 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:26:16.449 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:26:16.923 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:26:17.395 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:26:17.867 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:26:18.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:18.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:18.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:18.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:18.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:18.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:18.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:18.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:18.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:18.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:18.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:18.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:18.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:18.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:18.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:18.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:18.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:18.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:18.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:18.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:18.338 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:26:18.809 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:26:19.282 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:26:19.755 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:26:20.227 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:26:20.698 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:26:21.171 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:26:21.644 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:26:22.116 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:26:22.589 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:26:23.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:23.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:23.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:23.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:23.062 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:26:23.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:23.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:23.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:23.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:23.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:26:23.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:26:23.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:26:23.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:26:23.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:26:23.070 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:26:23.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:26:28.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:26:28.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:26:28.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:26:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:26:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:26:28.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:26:28.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:26:28.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:26:28.081 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:28.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:26:28.082 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:26:28.084 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:26:28.084 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:26:28.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:26:28.085 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:28.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:26:28.085 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:26:28.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:26:28.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:26:28.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:28.088 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:26:28.088 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:26:28.088 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:26:28.088 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:28.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:26:28.089 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:26:28.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:26:28.089 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:26:28.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:28.090 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:26:28.090 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:26:28.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:26:28.091 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:28.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:26:28.091 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:26:28.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:26:28.091 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:26:28.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:28.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:26:28.095 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:26:28.095 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:26:28.095 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:28.099 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:26:28.578 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:26:28.626 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:26:28.628 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:26:28.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:28.630 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:26:28.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:28.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:28.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:28.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:28.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:28.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:28.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:28.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:28.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:28.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:28.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:28.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:28.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:28.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:28.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:28.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:29.051 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:26:29.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:29.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:29.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:29.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:29.522 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:26:29.995 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:26:30.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:30.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:30.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:30.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:30.468 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:26:30.940 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:26:31.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:31.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:31.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:31.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:31.411 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:26:31.884 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:26:32.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:32.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:32.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:32.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:32.357 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:26:32.829 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:26:33.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:33.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:33.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:33.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:33.302 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:26:33.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:33.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:33.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:33.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:33.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:33.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:33.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:33.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:33.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:33.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:33.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:33.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:33.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:33.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:33.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:33.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:33.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:33.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:33.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:33.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:33.774 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:26:34.241 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:26:34.713 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:26:35.183 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:26:35.654 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:26:36.127 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:26:36.600 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:26:37.072 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:26:37.545 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:26:38.018 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:26:38.490 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:26:38.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:38.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:38.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:38.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:38.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:38.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:38.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:38.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:38.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:38.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:38.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:38.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:38.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:38.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:38.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:38.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:38.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:38.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:38.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:38.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:38.960 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:26:39.432 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:26:39.902 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:26:40.373 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:26:40.846 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:26:41.319 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:26:41.791 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:26:42.265 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:26:42.737 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:26:43.209 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:26:43.680 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:26:43.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:43.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:43.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:43.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:43.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:43.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:43.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:43.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:43.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:43.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:43.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:43.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:43.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:43.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:43.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:43.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:43.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:43.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:43.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:43.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:44.151 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:26:44.622 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:26:45.095 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:26:45.567 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:26:46.039 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:26:46.510 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:26:46.984 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:26:47.456 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:26:47.927 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:26:48.398 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:26:48.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:48.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:48.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:48.872 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:26:48.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:48.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:48.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:48.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:48.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:26:48.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:26:48.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:26:48.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:26:48.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:26:48.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:26:48.887 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:26:48.887 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.887 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.887 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.887 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.887 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.888 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.888 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.888 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.888 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.888 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:48.888 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:53.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:26:53.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:26:53.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:26:53.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:26:53.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:26:53.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:26:53.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:26:53.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:26:53.897 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:53.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:26:53.898 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:26:53.900 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:26:53.900 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:26:53.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:26:53.901 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:53.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:26:53.901 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:26:53.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:26:53.902 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:26:53.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:53.903 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:26:53.903 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:26:53.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:26:53.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:53.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:26:53.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:26:53.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:26:53.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:26:53.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:53.905 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:26:53.905 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:26:53.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:26:53.905 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:26:53.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:26:53.905 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:26:53.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:26:53.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:26:53.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:53.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:26:53.909 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:26:53.909 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:26:53.909 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:53.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:53.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:26:53.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:26:53.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:53.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:26:53.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:53.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:53.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:53.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:26:53.913 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:26:54.391 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:26:54.441 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:26:54.443 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:26:54.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:54.445 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:26:54.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:54.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:54.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:54.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:54.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:54.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:54.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:54.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:54.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:54.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:54.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:54.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:54.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:54.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:54.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:54.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:54.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:54.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:54.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:54.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:54.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:54.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:54.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:54.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:54.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:54.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:54.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:54.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:54.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:54.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:54.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:54.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:54.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:54.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:54.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:54.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:54.858 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:26:54.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:54.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:54.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:54.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:55.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:55.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:55.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:55.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:55.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:55.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:55.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:55.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:55.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:55.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:55.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:55.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:55.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:55.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:55.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:55.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:55.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:55.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:55.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:55.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:55.329 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:26:55.801 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:26:55.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:55.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:55.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:55.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:55.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:55.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:55.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:55.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:55.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:55.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:55.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:55.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:55.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:26:55.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:55.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:55.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:55.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:55.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:26:55.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:26:56.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:26:56.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:26:56.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:56.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:56.271 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:26:56.742 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:26:56.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:26:56.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:26:56.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:26:56.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:26:56.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:26:56.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:26:56.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:26:56.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:26:56.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:26:56.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:26:56.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:26:56.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:26:56.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:26:56.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:26:56.840 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:26:56.840 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=635 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:56.840 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=635 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:56.841 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=635 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:56.841 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=635 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:26:56.841 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=635 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:27:01.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:27:01.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:27:01.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:27:01.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:27:01.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:27:01.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:27:01.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:27:01.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:27:01.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:27:01.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:27:01.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:27:01.887 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:27:01.887 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:27:01.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:27:01.887 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:27:01.887 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:27:01.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:27:01.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:27:01.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:27:01.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:27:01.892 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:27:01.892 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:27:01.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:27:01.892 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:27:01.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:27:01.892 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:27:01.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:27:01.892 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:27:01.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:27:01.895 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:27:01.895 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:27:01.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:27:01.895 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:27:01.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:27:01.895 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:27:01.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:27:01.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:27:01.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:27:01.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:27:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:27:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:27:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:27:01.900 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:27:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:27:01.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:27:01.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:27:01.901 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:27:01.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:27:01.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:27:01.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:27:01.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:27:01.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:27:01.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:27:01.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:27:01.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:27:01.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:27:01.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:27:01.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:27:01.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:27:02.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:27:02.439 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:27:02.442 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:27:02.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:27:02.444 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:27:02.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:27:02.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:27:02.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:27:02.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:27:02.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:27:02.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:27:02.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:27:02.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:02.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:27:02.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:27:02.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:27:02.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:27:02.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:27:02.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:27:02.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:02.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:02.857 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:27:02.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:27:02.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:27:02.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:27:02.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:27:03.330 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:27:03.803 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:27:03.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:27:03.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:27:03.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:27:03.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:27:04.275 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:27:04.749 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:27:04.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:27:04.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:27:04.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:27:04.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:27:05.221 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:27:05.688 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:27:05.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:27:05.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:27:05.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:27:05.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:27:06.160 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:27:06.633 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:27:06.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:27:06.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:27:06.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:27:06.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:27:07.106 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:27:07.578 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:27:08.049 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:27:08.520 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:27:08.990 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:27:09.464 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:27:09.936 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:27:10.409 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:27:10.879 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:27:11.350 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:27:11.824 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:27:12.296 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:27:12.769 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:27:13.240 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:27:13.713 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:27:14.186 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:27:14.658 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:27:15.129 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:27:15.602 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:27:16.075 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:27:16.547 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:27:17.018 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:27:17.489 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:27:17.962 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:27:18.435 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:27:18.907 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:27:19.378 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:27:19.851 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:27:20.324 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:27:20.796 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:27:21.267 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:27:21.740 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:27:22.213 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:27:22.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:22.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:27:22.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:27:22.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:27:22.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:27:22.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:27:22.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:27:22.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:27:22.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:27:22.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:27:22.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:27:22.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:22.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:27:22.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:27:22.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:27:22.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:27:22.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:27:22.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:27:22.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:22.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:22.684 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:27:23.156 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:27:23.629 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:27:24.101 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:27:24.574 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:27:25.045 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:27:25.515 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:27:25.986 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:27:26.457 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:27:26.930 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:27:27.403 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:27:27.875 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:27:28.349 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:27:28.821 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:27:29.293 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:27:29.767 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:27:30.239 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:27:30.711 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:27:31.182 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:27:31.653 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:27:32.124 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:27:32.594 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:27:33.065 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:27:33.536 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:27:34.009 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:27:34.482 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:27:34.954 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:27:35.425 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:27:35.898 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:27:36.371 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:27:36.843 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:27:37.314 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:27:37.784 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:27:38.258 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:27:38.730 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:27:39.202 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:27:39.673 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:27:40.146 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:27:40.619 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:27:41.091 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:27:41.564 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:27:42.037 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:27:42.509 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:27:42.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:42.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:27:42.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:27:42.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:27:42.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:27:42.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:27:42.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:27:42.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:27:42.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:27:42.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:27:42.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:27:42.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:42.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:27:42.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:27:42.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:27:42.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:27:42.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:27:42.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:27:42.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:42.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:27:42.980 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:27:43.454 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:27:43.926 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:27:44.398 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:27:44.872 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 02:27:45.344 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 02:27:45.816 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 02:27:46.287 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 02:27:46.758 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 02:27:47.228 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 02:27:47.699 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 02:27:48.170 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 02:27:48.643 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 02:27:49.115 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 02:27:49.587 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 02:27:50.058 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 02:27:50.529 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 02:27:51.002 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 02:27:51.475 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 02:27:51.947 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 02:27:52.418 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 02:27:52.891 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 02:27:53.363 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 02:27:53.835 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 02:27:54.306 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 02:27:54.777 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 02:27:55.250 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 02:27:55.723 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 02:27:56.195 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 02:27:56.666 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 02:27:57.139 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 02:27:57.611 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 02:27:58.083 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 02:27:58.554 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 02:27:59.025 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 02:27:59.496 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 02:27:59.967 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 02:28:00.440 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 02:28:00.913 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 02:28:01.385 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 02:28:01.854 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 02:28:02.320 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 02:28:02.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:02.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:02.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:02.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:02.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:02.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:02.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:02.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:02.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:02.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:02.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:02.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:02.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:02.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:02.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:02.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:02.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:02.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:02.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:02.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:02.784 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 02:28:03.250 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 02:28:03.715 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 02:28:04.181 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 02:28:04.653 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 02:28:05.126 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 02:28:05.598 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 02:28:06.070 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 02:28:06.544 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 02:28:07.016 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 02:28:07.488 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 02:28:07.962 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 02:28:08.434 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 02:28:08.906 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 02:28:09.377 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 02:28:09.850 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 02:28:10.323 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 02:28:10.794 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 02:28:11.266 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 02:28:11.736 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 02:28:12.210 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 02:28:12.682 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 02:28:13.154 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 02:28:13.625 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 02:28:14.098 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 02:28:14.571 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 02:28:15.043 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 02:28:15.514 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 02:28:15.987 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 02:28:16.460 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 02:28:16.932 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 02:28:17.403 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 02:28:17.876 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 02:28:18.348 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 02:28:18.820 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 02:28:19.291 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 02:28:19.765 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 02:28:20.237 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 02:28:20.709 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 02:28:21.180 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 02:28:21.653 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 02:28:22.126 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 02:28:22.598 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 02:28:22.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:22.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:22.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:22.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:22.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:22.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:22.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:22.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:22.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:28:22.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:28:22.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:28:22.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:28:22.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:28:22.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:28:22.701 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:28:27.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:28:27.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:28:27.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:28:27.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:28:27.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:28:27.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:28:27.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:28:27.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:28:27.716 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:27.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:28:27.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:28:27.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:28:27.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:28:27.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:28:27.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:27.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:28:27.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:28:27.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:28:27.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:28:27.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:27.722 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:28:27.722 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:28:27.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:28:27.722 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:27.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:28:27.722 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:28:27.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:28:27.722 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:28:27.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:27.724 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:28:27.724 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:28:27.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:28:27.724 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:27.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:28:27.724 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:28:27.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:28:27.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:28:27.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:27.727 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:28:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:28:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:28:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:28:27.727 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:28:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:28:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:28:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:28:27.728 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:28:27.728 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:28:27.728 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:28:27.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:28:27.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:28:27.730 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:28:32.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:28:32.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:28:32.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:28:32.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:28:32.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:28:32.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:28:32.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:28:32.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:28:32.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:32.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:28:32.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:28:32.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:28:32.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:28:32.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:28:32.743 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:32.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:28:32.744 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:28:32.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:28:32.744 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:28:32.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:32.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:28:32.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:28:32.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:28:32.745 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:32.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:28:32.745 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:28:32.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:28:32.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:28:32.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:32.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:28:32.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:28:32.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:28:32.747 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:32.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:28:32.747 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:28:32.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:28:32.747 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:28:32.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:32.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:28:32.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:28:32.750 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:28:32.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:32.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:32.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:32.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:32.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:28:33.234 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:28:33.278 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:28:33.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:33.280 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:28:33.282 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:28:33.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:33.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:33.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:33.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:33.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:33.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:33.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:33.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:33.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:33.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:33.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:33.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:33.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:33.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:33.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:33.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:33.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:33.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:33.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:33.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:33.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:33.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:33.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:33.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:33.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:33.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.704 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:28:33.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:33.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:33.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:33.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:33.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:33.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:33.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:33.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:33.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:33.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:33.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:33.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:33.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:33.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:33.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:33.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:33.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:33.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:33.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:34.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:34.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:34.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:34.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:34.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:34.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:34.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:34.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:34.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:34.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:34.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:34.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:34.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:34.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:34.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:34.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.176 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:28:34.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:34.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:34.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:34.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:34.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:34.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:34.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:34.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:34.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:34.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:34.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:34.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:34.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:34.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.647 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:28:34.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:34.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:34.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:34.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:34.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:34.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:34.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:34.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:34.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:34.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:34.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:34.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:34.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:34.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:34.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:34.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:34.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:34.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:34.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:35.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:35.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:35.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:35.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:35.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:35.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:35.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:35.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:35.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:35.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:35.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:35.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:35.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:35.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:35.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:35.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:35.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:35.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:35.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:35.118 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:28:35.589 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:28:35.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:35.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:35.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:35.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:36.060 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:28:36.534 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:28:36.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:36.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:36.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:36.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:37.006 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:28:37.478 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:28:37.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:37.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:37.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:37.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:37.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:37.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:37.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:37.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:37.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:37.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:37.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:37.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:37.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:37.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:37.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:37.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:37.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:37.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:37.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:37.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:37.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:37.949 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:28:38.419 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:28:38.891 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:28:39.364 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:28:39.837 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:28:40.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:40.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:40.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:40.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:40.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:40.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:40.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:40.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:40.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:40.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:40.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:40.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:40.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:40.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:40.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:40.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:40.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:40.308 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:28:40.779 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:28:41.253 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:28:41.725 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:28:42.197 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:28:42.668 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:28:42.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:42.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:42.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:42.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:42.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:42.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:42.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:42.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:42.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:42.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:42.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:42.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:42.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:42.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:42.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:42.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:42.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:42.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:42.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:42.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:43.139 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:28:43.610 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:28:44.083 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:28:44.555 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:28:45.027 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:28:45.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:45.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:45.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:45.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:45.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:45.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:45.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:45.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:45.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:45.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:45.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:45.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:45.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:45.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:45.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:45.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:45.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:45.497 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:28:45.969 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:28:46.442 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:28:46.915 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:28:47.386 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:28:47.857 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:28:47.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:47.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:47.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:47.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:47.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:47.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:47.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:47.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:47.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:47.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:47.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:47.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:47.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:47.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:47.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:47.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:48.328 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:28:48.799 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:28:49.273 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:28:49.745 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:28:50.217 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:28:50.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:50.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:50.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:50.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:50.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:50.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:50.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:50.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:50.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:28:50.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:28:50.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:28:50.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:28:50.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:28:50.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:28:50.563 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3850 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3850 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3850 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3850 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3850 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3850 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3850 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3850 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3851 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3851 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3851 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3851 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:50.563 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3851 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:28:55.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:28:55.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:28:55.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:28:55.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:28:55.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:28:55.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:28:55.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:28:55.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:28:55.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:55.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:28:55.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:28:55.579 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:28:55.580 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:28:55.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:28:55.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:55.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:28:55.581 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:28:55.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:28:55.581 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:28:55.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:55.582 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:28:55.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:28:55.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:28:55.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:55.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:28:55.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:28:55.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:28:55.583 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:28:55.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:55.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:28:55.585 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:28:55.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:28:55.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:28:55.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:28:55.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:28:55.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:28:55.586 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:28:55.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:55.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:28:55.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:28:55.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:28:55.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:28:55.589 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:28:55.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:28:55.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:28:55.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:28:55.590 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:28:55.590 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:28:55.590 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:28:55.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:28:55.595 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:28:56.073 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:28:56.120 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:28:56.124 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:28:56.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:56.126 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:28:56.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:56.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:56.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:56.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:56.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:56.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:56.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:56.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:56.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:56.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:56.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:56.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:56.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:56.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:56.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:56.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:56.546 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:28:56.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:56.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:56.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:56.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:57.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:28:57.492 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:28:57.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:57.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:57.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:57.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:57.964 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:28:58.437 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:28:58.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:58.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:58.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:58.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:58.910 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:28:59.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:59.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:59.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:59.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:59.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:59.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:59.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:59.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:28:59.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:28:59.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:28:59.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:28:59.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:59.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:59.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:59.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:28:59.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:28:59.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:28:59.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:28:59.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:59.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:28:59.382 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:28:59.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:28:59.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:28:59.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:28:59.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:28:59.853 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:29:00.324 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:29:00.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:00.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:00.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:00.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:00.797 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:29:01.270 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:29:01.742 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:29:02.213 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:29:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:02.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:02.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:02.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:02.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:02.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:02.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:02.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:02.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:02.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:02.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:02.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:02.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:02.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:02.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:02.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:02.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:02.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:02.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:02.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:02.684 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:29:03.155 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:29:03.625 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:29:04.099 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:29:04.571 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:29:05.043 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:29:05.514 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:29:05.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:05.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:05.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:05.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:05.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:05.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:05.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:05.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:05.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:05.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:05.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:05.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:05.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:05.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:05.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:05.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:05.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:05.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:05.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:05.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:05.984 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:29:06.456 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:29:06.929 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:29:07.401 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:29:07.873 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:29:08.346 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:29:08.819 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:29:09.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:09.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:09.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:09.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:09.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:09.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:09.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:09.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:09.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:09.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:09.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:09.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:09.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:29:09.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:29:09.159 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:29:09.159 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2930 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2930 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2930 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2930 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2930 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2930 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2930 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2931 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2931 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2931 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.160 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2931 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.161 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2931 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.161 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2931 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.161 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2931 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:09.161 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2931 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:14.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:29:14.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:29:14.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:14.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:14.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:14.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:14.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:14.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:29:14.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:14.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:29:14.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:29:14.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:29:14.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:29:14.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:29:14.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:14.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:14.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:29:14.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:29:14.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:29:14.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:14.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:29:14.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:29:14.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:29:14.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:14.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:14.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:29:14.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:29:14.183 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:29:14.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:14.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:29:14.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:29:14.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:29:14.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:14.183 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:29:14.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:14.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:29:14.183 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:29:14.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:14.185 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:29:14.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:29:14.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:29:14.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:29:14.185 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:29:14.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:29:14.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:29:14.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:29:14.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:29:14.186 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:29:14.186 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:29:14.186 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:14.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:14.190 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:29:14.669 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:29:14.712 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:29:14.714 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:29:14.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:14.714 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:29:14.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:14.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:14.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:14.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:14.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:14.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:14.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:14.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:14.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:14.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:14.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:14.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:14.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:14.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:14.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:14.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:15.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:15.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:15.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:15.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:15.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:15.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:15.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:15.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:15.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:15.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:15.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:15.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:15.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:15.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:15.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:15.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:15.135 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:29:15.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:15.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:15.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:15.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:15.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:15.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:15.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:15.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:15.603 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:29:15.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:15.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:15.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:15.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:15.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:15.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:15.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:15.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:15.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:15.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:15.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:15.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:15.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:15.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:15.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:15.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:15.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:15.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:15.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:15.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:16.073 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:29:16.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:16.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:16.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:16.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:16.545 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:29:17.018 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:29:17.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:17.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:17.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:17.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:17.490 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:29:17.962 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:29:18.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:18.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:18.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:18.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:18.433 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:29:18.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:18.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:18.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:18.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:18.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:18.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:18.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:18.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:18.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:18.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:18.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:18.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:18.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:18.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:18.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:18.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:18.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:18.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:18.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:18.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:18.906 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:29:19.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:19.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:19.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:19.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:19.379 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:29:19.851 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:29:20.322 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:29:20.795 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:29:21.267 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:29:21.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:21.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:21.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:21.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:21.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:21.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:21.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:21.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:21.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:21.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:21.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:21.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:21.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:29:21.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:29:21.628 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:29:21.629 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1610 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:21.629 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1610 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:21.629 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1610 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:21.629 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1610 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:21.629 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1610 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:21.629 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1610 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:21.629 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1610 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:21.629 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1610 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:29:26.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:29:26.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:29:26.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:26.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:26.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:26.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:26.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:26.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:29:26.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:26.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:29:26.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:29:26.664 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:29:26.665 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:29:26.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:29:26.666 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:26.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:26.667 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:29:26.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:29:26.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:29:26.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:26.669 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:29:26.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:29:26.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:29:26.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:26.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:26.671 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:29:26.671 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:29:26.671 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:29:26.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:26.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:29:26.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:29:26.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:29:26.672 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:26.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:26.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:29:26.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:29:26.673 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:29:26.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:26.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:29:26.676 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:29:26.676 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:29:26.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:26.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:26.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:26.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:26.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:26.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:26.681 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:29:27.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:29:27.200 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:29:27.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:27.202 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:29:27.205 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:29:27.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:27.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:27.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:27.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:27.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:27.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:27.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:27.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:27.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:27.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:27.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:27.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:27.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:27.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:27.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:27.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:27.626 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:29:27.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:27.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:27.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:27.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:28.097 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:29:28.568 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:29:28.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:28.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:28.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:28.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:28.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:28.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:28.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:28.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:28.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:28.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:28.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:28.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:28.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:28.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:28.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:28.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:28.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:28.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:28.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:28.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:28.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:28.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:28.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:28.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:29.039 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:29:29.512 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:29:29.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:29.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:29.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:29.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:29.984 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:29:30.457 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:29:30.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:30.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:30.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:30.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:30.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:30.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:30.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:30.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:30.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:30.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:30.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:30.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:30.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:30.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:30.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:30.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:30.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:30.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:30.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:30.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:30.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:30.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:30.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:30.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:30.927 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:29:31.398 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:29:31.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:31.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:31.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:31.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:31.869 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:29:32.342 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:29:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:29:33.287 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:29:33.758 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:29:34.231 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:29:34.704 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:29:35.176 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:29:35.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:35.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:35.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:35.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:35.646 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:29:35.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:35.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:35.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:35.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:35.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:35.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:35.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:35.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:35.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:35.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:35.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:35.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:35.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:35.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:35.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:35.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:36.117 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:29:36.588 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:29:37.061 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:29:37.533 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:29:38.005 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:29:38.476 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:29:38.947 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:29:39.420 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:29:39.893 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:29:40.360 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:29:40.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:40.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:40.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:40.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:40.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:40.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:40.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:40.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:40.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:40.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:40.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:40.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:29:40.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:29:40.523 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:29:45.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:29:45.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:29:45.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:45.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:45.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:45.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:45.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:45.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:29:45.539 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:45.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:29:45.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:29:45.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:29:45.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:29:45.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:29:45.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:45.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:45.543 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:29:45.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:29:45.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:29:45.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:45.545 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:29:45.545 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:29:45.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:29:45.545 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:45.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:45.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:29:45.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:29:45.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:29:45.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:45.547 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:29:45.547 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:29:45.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:29:45.547 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:45.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:45.547 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:29:45.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:29:45.547 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:29:45.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:45.549 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:29:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:29:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:29:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:29:45.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:29:45.550 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:29:45.550 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:45.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:29:46.032 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:29:46.083 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:29:46.086 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:29:46.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:46.088 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:29:46.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:46.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:46.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:46.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:46.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:46.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:46.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:46.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:46.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:46.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:46.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:46.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:46.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:46.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:46.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:46.500 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:29:46.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:46.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:46.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:46.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:46.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:46.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:46.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:46.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:46.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:46.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:46.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:46.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:46.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:46.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:46.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:46.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:46.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:46.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:46.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:46.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:46.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:46.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:46.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:46.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:46.971 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:29:47.442 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:29:47.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:47.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:47.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:47.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:47.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:47.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:47.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:47.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:47.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:47.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:47.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:47.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:47.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:47.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:47.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:47.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:47.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:47.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:47.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:47.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:47.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:47.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:47.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:47.907 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:29:48.378 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:29:48.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:48.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:48.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:48.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:48.849 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:29:49.323 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:29:49.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:49.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:49.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:49.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:49.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:49.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:49.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:49.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:49.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:49.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:49.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:49.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:49.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:49.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:49.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:49.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:49.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:49.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:49.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:49.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:49.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:49.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:49.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:49.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:49.794 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:29:50.262 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:29:50.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:50.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:50.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:50.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:50.733 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:29:51.206 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:29:51.679 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:29:51.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:51.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:51.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:51.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:51.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:51.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:51.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:51.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:51.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:51.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:51.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:51.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:51.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:29:51.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:29:51.770 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:29:56.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:29:56.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:29:56.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:56.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:56.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:56.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:56.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:29:56.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:29:56.785 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:56.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:29:56.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:29:56.788 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:29:56.789 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:29:56.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:29:56.789 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:56.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:29:56.789 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:29:56.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:29:56.789 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:29:56.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:56.791 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:29:56.791 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:29:56.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:29:56.791 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:56.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:29:56.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:29:56.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:29:56.792 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:29:56.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:56.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:29:56.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:29:56.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:29:56.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:29:56.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:29:56.794 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:29:56.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:29:56.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:29:56.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:56.796 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:29:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:29:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:29:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:29:56.796 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:29:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:29:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:29:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:29:56.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:29:56.797 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:29:56.797 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:56.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:29:56.802 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:29:57.281 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:29:57.325 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:29:57.328 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:29:57.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:57.330 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:29:57.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:57.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:57.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:57.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:57.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:57.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:57.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:57.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:57.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:57.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:57.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:57.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:57.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:57.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:57.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:57.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:57.753 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:29:57.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:57.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:57.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:57.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:58.224 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:29:58.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:29:58.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:58.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:58.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:58.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:59.170 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:29:59.642 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:29:59.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:29:59.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:29:59.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:29:59.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:29:59.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:59.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:59.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:59.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:59.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:59.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:59.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:59.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:29:59.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:29:59.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:29:59.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:29:59.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:59.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:59.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:59.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:29:59.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:29:59.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:29:59.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:29:59.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:29:59.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:00.113 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:30:00.586 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:30:00.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:00.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:00.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:00.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:01.059 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:30:01.531 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:30:01.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:01.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:01.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:01.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:02.002 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:30:02.482 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:30:02.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:02.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:02.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:02.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:02.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:02.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:02.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:02.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:02.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:02.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:02.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:02.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:02.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:02.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:02.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:30:02.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:30:02.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:02.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:02.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:02.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:02.949 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:30:03.420 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:30:03.891 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:30:04.361 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:30:04.835 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:30:05.307 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:30:05.779 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:30:05.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:05.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:05.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:05.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:05.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:05.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:05.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:05.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:05.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:05.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:05.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:05.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:05.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:05.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:05.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:30:05.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:30:05.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:05.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:05.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:05.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:06.249 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:30:06.721 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:30:07.194 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:30:07.667 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:30:08.139 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:30:08.610 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:30:09.083 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:30:09.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:09.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:09.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:09.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:09.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:09.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:09.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:09.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:09.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:30:09.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:30:09.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:30:09.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:30:09.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:30:09.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:30:09.409 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:30:14.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:30:14.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:30:14.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:30:14.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:30:14.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:30:14.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:30:14.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:30:14.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:30:14.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:30:14.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:30:14.425 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:30:14.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:30:14.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:30:14.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:30:14.427 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:30:14.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:30:14.427 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:30:14.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:30:14.427 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:30:14.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:14.428 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:30:14.428 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:30:14.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:30:14.428 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:30:14.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:30:14.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:30:14.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:30:14.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:30:14.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:14.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:30:14.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:30:14.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:30:14.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:30:14.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:30:14.430 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:30:14.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:30:14.430 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:30:14.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:14.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:30:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:30:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:30:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:30:14.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:30:14.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:30:14.433 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:30:14.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:14.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:14.438 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:30:14.915 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:30:14.960 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:30:14.962 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:30:14.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:14.965 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:30:14.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:14.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:14.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:15.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:15.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:15.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:15.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:15.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:15.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:15.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:30:15.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:30:15.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:15.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:15.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:15.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:15.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:15.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:15.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:15.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:15.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:15.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:15.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:15.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:15.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:15.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:15.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:30:15.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:30:15.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:15.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:15.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.387 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:30:15.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:15.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:15.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:15.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:15.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:15.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:15.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:15.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:15.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:15.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:15.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:15.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:15.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:15.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:15.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:15.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:15.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:30:15.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:30:15.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:15.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:15.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:15.858 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:30:16.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:16.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:16.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:16.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:16.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:16.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:16.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:16.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:16.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:16.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:16.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:16.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:16.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:16.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:16.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:30:16.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:30:16.329 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:30:16.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:16.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:16.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:16.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:16.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:16.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:16.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:16.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:16.800 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:30:16.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:16.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:16.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:16.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:16.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:16.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:16.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:16.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:16.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:30:16.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:30:16.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:30:16.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:30:16.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:30:16.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:30:16.900 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:30:16.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=533 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:30:16.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:30:16.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:30:16.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:30:16.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:30:16.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:30:16.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:30:16.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:30:16.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:30:21.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:30:21.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:30:21.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:30:21.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:30:21.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:30:21.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:30:21.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:30:21.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:30:21.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:30:21.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:30:21.911 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:30:21.914 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:30:21.914 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:30:21.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:30:21.914 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:30:21.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:30:21.915 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:30:21.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:30:21.915 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:30:21.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:21.916 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:30:21.917 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:30:21.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:30:21.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:30:21.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:30:21.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:30:21.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:30:21.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:30:21.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:21.919 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:30:21.919 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:30:21.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:30:21.919 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:30:21.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:30:21.919 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:30:21.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:30:21.919 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:30:21.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:21.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:30:21.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:30:21.923 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:30:21.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:21.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:21.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:21.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:30:21.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:21.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:21.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:30:21.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:30:22.405 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:30:22.456 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:30:22.459 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:30:22.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:22.461 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:30:22.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:22.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:22.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:22.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:22.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:22.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:22.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:22.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:22.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:22.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:22.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:30:22.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:30:22.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:22.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:22.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:22.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:22.877 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:30:22.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:22.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:22.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:22.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:23.351 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:30:23.823 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:30:23.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:23.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:23.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:23.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:24.296 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:30:24.766 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:30:24.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:24.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:24.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:24.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:25.237 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:30:25.710 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:30:25.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:25.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:25.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:25.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:26.183 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:30:26.655 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:30:26.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:30:26.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:30:26.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:30:26.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:30:27.128 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:30:27.602 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:30:28.074 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:30:28.547 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:30:29.020 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:30:29.492 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:30:29.966 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:30:30.438 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:30:30.911 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:30:31.381 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:30:31.855 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:30:32.328 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:30:32.800 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:30:33.273 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:30:33.746 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:30:34.218 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:30:34.692 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:30:35.164 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:30:35.637 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:30:36.110 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:30:36.583 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:30:37.055 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:30:37.528 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:30:38.001 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:30:38.472 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:30:38.944 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:30:39.417 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:30:39.890 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:30:40.362 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:30:40.833 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:30:41.306 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:30:41.779 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:30:42.251 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:30:42.722 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:30:43.195 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:30:43.668 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:30:44.140 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:30:44.611 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:30:45.085 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:30:45.557 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:30:46.029 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:30:46.503 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:30:46.976 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:30:47.447 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:30:47.919 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:30:48.392 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:30:48.865 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:30:49.337 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:30:49.811 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:30:50.283 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:30:50.756 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:30:51.229 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:30:51.702 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:30:52.174 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:30:52.645 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:30:53.118 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:30:53.591 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:30:54.063 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:30:54.534 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:30:55.007 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:30:55.480 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:30:55.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:55.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:55.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:55.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:55.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:55.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:55.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:55.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:30:55.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:30:55.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:30:55.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:30:55.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:55.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:55.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:55.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:30:55.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:30:55.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:30:55.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:30:55.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:55.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:30:55.947 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:30:56.418 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:30:56.889 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:30:57.360 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:30:57.831 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:30:58.301 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:30:58.772 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:30:59.246 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:30:59.718 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:31:00.191 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:31:00.664 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:31:01.136 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:31:01.609 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:31:02.082 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:31:02.555 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:31:03.027 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:31:03.498 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:31:03.969 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:31:04.439 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:31:04.910 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 02:31:05.381 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 02:31:05.854 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 02:31:06.327 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 02:31:06.799 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 02:31:07.272 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 02:31:07.745 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 02:31:08.217 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 02:31:08.690 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 02:31:09.163 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 02:31:09.635 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 02:31:10.106 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 02:31:10.577 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 02:31:11.047 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 02:31:11.521 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 02:31:11.994 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 02:31:12.466 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 02:31:12.939 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 02:31:13.412 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 02:31:13.884 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 02:31:14.355 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 02:31:14.828 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 02:31:15.300 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 02:31:15.772 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 02:31:16.243 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 02:31:16.714 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 02:31:17.185 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 02:31:17.656 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 02:31:18.126 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 02:31:18.600 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 02:31:19.072 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 02:31:19.545 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 02:31:20.018 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 02:31:20.490 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 02:31:20.963 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 02:31:21.433 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 02:31:21.904 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 02:31:22.375 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 02:31:22.846 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 02:31:23.317 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 02:31:23.787 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 02:31:24.258 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 02:31:24.731 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 02:31:25.204 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 02:31:25.676 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 02:31:26.149 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 02:31:26.622 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 02:31:27.094 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 02:31:27.565 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 02:31:28.036 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 02:31:28.507 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 02:31:28.977 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 02:31:29.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:31:29.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:31:29.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:31:29.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:31:29.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:31:29.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:31:29.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:31:29.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:31:29.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:31:29.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:31:29.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:31:29.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:31:29.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:31:29.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:31:29.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:31:29.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:31:29.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:31:29.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:31:29.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:31:29.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:31:29.448 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 02:31:29.919 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 02:31:30.390 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 02:31:30.863 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 02:31:31.335 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 02:31:31.807 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 02:31:32.278 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 02:31:32.749 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 02:31:33.220 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 02:31:33.691 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 02:31:34.161 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 02:31:34.635 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 02:31:35.107 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 02:31:35.579 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 02:31:36.050 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 02:31:36.521 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 02:31:36.994 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 02:31:37.466 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 02:31:37.938 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 02:31:38.409 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 02:31:38.880 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 02:31:39.353 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 02:31:39.826 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 02:31:40.298 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 02:31:40.769 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 02:31:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 02:31:41.715 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 02:31:42.187 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 02:31:42.657 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 02:31:43.131 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-22 02:31:43.603 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-22 02:31:44.075 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-22 02:31:44.546 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-22 02:31:45.020 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-22 02:31:45.492 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-22 02:31:45.964 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-22 02:31:46.437 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-22 02:31:46.910 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-22 02:31:47.382 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-22 02:31:47.856 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-22 02:31:48.328 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-22 02:31:48.800 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-22 02:31:49.271 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-22 02:31:49.744 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-22 02:31:50.217 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-22 02:31:50.689 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-22 02:31:51.160 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-22 02:31:51.630 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-22 02:31:52.101 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-22 02:31:52.574 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-04-22 02:31:53.047 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-04-22 02:31:53.519 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-04-22 02:31:53.990 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-04-22 02:31:54.461 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-04-22 02:31:54.934 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-04-22 02:31:55.406 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-04-22 02:31:55.878 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-04-22 02:31:56.349 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-04-22 02:31:56.823 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-04-22 02:31:57.295 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-04-22 02:31:57.767 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-04-22 02:31:58.238 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-04-22 02:31:58.711 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-04-22 02:31:59.184 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-04-22 02:31:59.656 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-04-22 02:32:00.127 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-04-22 02:32:00.598 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-04-22 02:32:01.071 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-04-22 02:32:01.543 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-04-22 02:32:02.015 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-04-22 02:32:02.486 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-04-22 02:32:02.960 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-04-22 02:32:03.432 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-04-22 02:32:03.904 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-04-22 02:32:04.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:04.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:04.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:04.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:04.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:04.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:04.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:04.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:04.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:04.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:04.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:04.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:04.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:04.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:04.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:32:04.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:32:04.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:04.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:04.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:04.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:04.374 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-04-22 02:32:04.845 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-04-22 02:32:05.319 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-04-22 02:32:05.791 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-04-22 02:32:06.263 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-04-22 02:32:06.734 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-04-22 02:32:07.207 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-04-22 02:32:07.680 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-04-22 02:32:08.152 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-04-22 02:32:08.623 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-04-22 02:32:09.094 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-04-22 02:32:09.567 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-04-22 02:32:10.040 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-04-22 02:32:10.512 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-04-22 02:32:10.983 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-04-22 02:32:11.456 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-04-22 02:32:11.929 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-04-22 02:32:12.401 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-04-22 02:32:12.871 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-04-22 02:32:13.345 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-04-22 02:32:13.817 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-04-22 02:32:14.289 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-04-22 02:32:14.760 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-04-22 02:32:15.234 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-04-22 02:32:15.706 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-04-22 02:32:16.178 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-04-22 02:32:16.651 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-04-22 02:32:17.124 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-04-22 02:32:17.596 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-04-22 02:32:18.067 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-04-22 02:32:18.540 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-04-22 02:32:19.013 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-04-22 02:32:19.484 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-04-22 02:32:19.955 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-04-22 02:32:20.429 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-04-22 02:32:20.901 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-04-22 02:32:21.368 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-04-22 02:32:21.839 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-04-22 02:32:22.310 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-04-22 02:32:22.783 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-04-22 02:32:23.256 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-04-22 02:32:23.727 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-04-22 02:32:24.199 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-04-22 02:32:24.672 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-04-22 02:32:25.144 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-04-22 02:32:25.617 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-04-22 02:32:26.090 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-04-22 02:32:26.562 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-04-22 02:32:27.034 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-04-22 02:32:27.505 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-04-22 02:32:27.979 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-04-22 02:32:28.451 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-04-22 02:32:28.923 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-04-22 02:32:29.394 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-04-22 02:32:29.865 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-04-22 02:32:30.338 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-04-22 02:32:30.811 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-04-22 02:32:31.282 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-04-22 02:32:31.753 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-04-22 02:32:32.224 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-04-22 02:32:32.698 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-04-22 02:32:33.170 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-04-22 02:32:33.642 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-04-22 02:32:34.113 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-04-22 02:32:34.586 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-04-22 02:32:35.058 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-04-22 02:32:35.531 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-04-22 02:32:36.004 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-04-22 02:32:36.476 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-04-22 02:32:36.948 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-04-22 02:32:37.422 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-04-22 02:32:37.894 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-04-22 02:32:38.366 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-04-22 02:32:38.837 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2026-04-22 02:32:39.308 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2026-04-22 02:32:39.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:39.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:39.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:39.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:39.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:32:39.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:32:39.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:32:39.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:32:39.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:32:39.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:32:39.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:32:39.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:32:39.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:32:39.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:32:39.605 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:32:39.605 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=29748 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:32:39.605 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=29748 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:32:39.605 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=29748 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:32:39.605 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=29748 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:32:39.605 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=29748 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:32:39.605 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=29748 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:32:39.605 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=29748 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:32:44.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:32:44.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:32:44.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:32:44.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:32:44.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:32:44.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:32:44.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:32:44.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:32:44.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:32:44.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:32:44.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:32:44.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:32:44.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:32:44.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:32:44.621 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:32:44.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:32:44.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:32:44.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:32:44.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:32:44.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:32:44.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:32:44.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:32:44.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:32:44.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:32:44.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:32:44.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:32:44.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:32:44.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:32:44.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:32:44.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:32:44.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:32:44.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:32:44.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:32:44.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:32:44.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:32:44.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:32:44.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:32:44.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:32:44.631 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:44.632 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:32:44.632 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:32:44.632 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:32:44.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:32:44.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:44.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:44.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:44.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:32:44.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:44.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:44.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:44.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:44.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:32:44.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:32:44.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:32:44.635 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:32:49.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:32:49.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:32:49.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:32:49.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:32:49.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:32:49.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:32:49.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:32:49.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:32:49.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:32:49.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:32:49.649 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:32:49.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:32:49.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:32:49.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:32:49.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:32:49.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:32:49.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:32:49.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:32:49.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:32:49.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:32:49.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:32:49.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:32:49.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:32:49.655 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:32:49.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:32:49.655 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:32:49.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:32:49.655 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:32:49.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:32:49.657 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:32:49.657 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:32:49.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:32:49.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:32:49.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:32:49.658 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:32:49.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:32:49.658 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:32:49.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:32:49.661 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:32:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:32:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:32:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:32:49.661 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:32:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:32:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:32:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:32:49.662 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:32:49.662 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:32:49.662 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:49.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:32:49.667 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:32:50.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:32:50.193 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:32:50.196 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:32:50.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:50.198 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:32:50.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:50.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:50.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:50.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:50.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:50.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:50.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:50.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:50.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:50.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:50.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:32:50.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:32:50.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:50.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:50.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:50.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:50.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:32:50.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:32:50.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:32:50.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:32:50.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:32:51.091 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:32:51.563 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:32:51.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:32:51.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:32:51.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:32:51.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:32:51.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:51.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:51.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:51.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:51.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:51.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:51.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:51.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:51.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:51.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:51.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:51.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:51.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:51.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:32:51.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:32:51.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:51.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:51.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:51.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:52.036 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:32:52.509 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:32:52.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:32:52.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:32:52.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:32:52.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:32:52.981 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:32:53.453 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:32:53.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:32:53.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:32:53.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:32:53.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:32:53.924 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:32:54.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:54.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:54.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:54.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:54.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:54.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:54.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:54.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:54.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:54.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:54.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:54.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:54.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:54.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:54.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:32:54.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:32:54.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:54.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:54.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:54.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:54.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:32:54.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:32:54.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:32:54.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:32:54.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:32:54.866 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:32:55.339 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:32:55.812 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:32:56.284 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:32:56.755 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:32:57.225 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:32:57.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:57.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:57.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:57.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:57.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:57.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:57.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:57.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:32:57.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:32:57.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:32:57.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:32:57.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:57.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:57.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:57.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:32:57.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:32:57.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:32:57.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:32:57.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:57.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:32:57.696 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:32:58.167 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:32:58.640 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:32:59.113 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:32:59.585 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:33:00.055 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:33:00.529 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:33:01.001 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:33:01.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:01.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:33:01.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:01.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:01.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:33:01.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:33:01.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:33:01.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:33:01.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:33:01.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:33:01.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:33:01.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:33:01.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:33:01.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:33:01.099 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:33:01.099 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:33:01.099 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:33:01.099 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:33:01.099 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:33:01.099 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:33:01.099 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:33:01.099 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:33:06.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:33:06.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:33:06.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:33:06.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:33:06.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:33:06.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:33:06.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:33:06.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:33:06.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:33:06.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:33:06.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:33:06.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:33:06.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:33:06.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:33:06.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:33:06.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:33:06.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:33:06.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:33:06.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:33:06.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:33:06.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:33:06.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:33:06.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:33:06.121 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:33:06.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:33:06.121 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:33:06.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:33:06.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:33:06.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:33:06.123 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:33:06.123 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:33:06.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:33:06.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:33:06.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:33:06.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:33:06.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:33:06.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:33:06.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:33:06.127 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:33:06.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:33:06.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:33:06.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:33:06.127 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:33:06.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:33:06.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:33:06.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:33:06.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:33:06.128 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:33:06.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:33:06.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:33:06.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:33:06.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:33:06.611 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:33:06.664 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:33:06.667 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:33:06.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:33:06.669 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:33:06.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:06.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:06.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:33:06.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:06.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:06.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:33:06.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:33:06.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:06.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:33:06.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:33:06.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:33:06.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:33:06.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:33:06.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:33:06.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:06.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:07.084 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:33:07.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:33:07.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:33:07.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:33:07.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:33:07.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:33:08.030 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:33:08.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:33:08.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:33:08.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:33:08.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:33:08.502 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:33:08.973 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:33:09.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:33:09.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:33:09.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:33:09.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:33:09.446 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:33:09.919 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:33:10.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:33:10.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:33:10.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:33:10.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:33:10.391 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:33:10.865 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:33:11.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:33:11.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:33:11.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:33:11.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:33:11.337 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:33:11.809 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:33:12.280 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:33:12.754 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:33:13.226 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:33:13.698 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:33:14.169 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:33:14.643 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:33:15.116 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:33:15.588 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:33:16.061 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:33:16.534 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:33:17.006 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:33:17.477 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:33:17.950 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:33:18.423 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:33:18.896 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:33:19.369 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:33:19.842 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:33:20.314 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:33:20.788 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:33:21.260 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:33:21.733 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:33:22.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:22.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:33:22.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:22.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:22.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:22.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:22.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:33:22.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:22.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:22.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:33:22.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:33:22.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:22.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:33:22.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:33:22.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:33:22.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:33:22.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:33:22.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:33:22.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:22.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:22.203 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:33:22.674 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:33:23.145 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:33:23.618 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:33:24.090 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:33:24.562 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:33:25.033 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:33:25.504 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:33:25.977 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:33:26.450 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:33:26.923 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:33:27.396 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:33:27.868 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:33:28.340 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:33:28.811 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:33:29.282 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:33:29.756 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:33:30.228 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:33:30.700 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:33:31.171 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:33:31.642 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:33:32.115 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:33:32.588 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:33:33.060 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:33:33.533 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:33:34.006 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:33:34.478 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:33:34.949 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:33:35.419 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:33:35.890 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:33:36.361 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:33:36.834 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:33:37.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:37.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:33:37.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:37.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:37.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:37.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:37.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:33:37.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:37.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:37.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:33:37.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:33:37.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:37.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:33:37.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:33:37.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:33:37.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:33:37.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:33:37.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:33:37.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:37.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:37.305 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:33:37.767 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:33:38.230 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:33:38.692 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:33:39.154 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:33:39.616 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:33:40.078 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:33:40.541 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:33:41.003 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:33:41.465 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:33:41.927 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:33:42.389 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:33:42.851 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:33:43.314 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:33:43.782 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:33:44.253 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:33:44.726 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:33:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:33:45.671 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:33:46.142 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:33:46.613 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:33:47.083 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:33:47.557 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:33:48.029 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:33:48.501 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:33:48.972 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 02:33:49.446 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 02:33:49.918 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 02:33:50.390 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 02:33:50.861 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 02:33:51.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:51.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:33:51.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:51.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:51.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:51.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:51.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:33:51.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:33:51.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:33:51.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:33:51.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:33:51.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:51.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:33:51.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:33:51.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:33:51.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:33:51.333 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 02:33:51.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:33:51.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:33:51.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:51.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:33:51.802 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 02:33:52.273 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 02:33:52.747 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 02:33:53.219 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 02:33:53.686 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 02:33:54.157 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 02:33:54.631 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 02:33:55.103 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 02:33:55.575 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 02:33:56.046 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 02:33:56.519 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 02:33:56.992 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 02:33:57.464 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 02:33:57.935 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 02:33:58.408 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 02:33:58.880 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 02:33:59.352 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 02:33:59.823 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 02:34:00.296 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 02:34:00.769 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 02:34:01.241 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 02:34:01.712 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 02:34:02.185 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 02:34:02.657 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 02:34:03.129 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 02:34:03.600 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 02:34:04.074 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 02:34:04.546 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 02:34:05.018 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 02:34:05.489 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 02:34:05.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:05.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:05.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:05.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:05.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:05.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:05.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:05.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:05.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:05.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:34:05.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:34:05.899 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:34:05.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12942 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12942 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12942 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12942 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12942 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.900 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12942 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12942 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12943 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12943 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12943 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12943 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12943 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12943 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12943 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:05.901 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=12943 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:10.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:34:10.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:34:10.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:10.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:10.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:10.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:10.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:10.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:34:10.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:10.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:34:10.911 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:34:10.913 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:34:10.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:34:10.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:34:10.914 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:10.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:10.914 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:34:10.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:34:10.914 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:34:10.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:10.916 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:34:10.916 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:34:10.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:34:10.916 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:10.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:10.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:34:10.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:34:10.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:34:10.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:10.919 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:34:10.919 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:34:10.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:34:10.919 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:10.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:10.920 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:34:10.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:34:10.920 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:34:10.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:10.922 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:10.923 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:34:10.923 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:34:10.923 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:34:10.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:34:10.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:10.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:10.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:10.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:34:10.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:10.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:10.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:10.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:10.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:34:10.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:34:10.925 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:34:15.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:34:15.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:34:15.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:15.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:15.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:15.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:15.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:15.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:34:15.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:15.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:34:15.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:34:15.943 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:34:15.944 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:34:15.944 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:34:15.944 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:15.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:15.944 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:34:15.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:34:15.945 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:34:15.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:15.946 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:34:15.946 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:34:15.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:34:15.946 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:15.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:15.946 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:34:15.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:34:15.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:34:15.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:15.947 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:34:15.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:34:15.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:34:15.948 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:15.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:15.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:34:15.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:34:15.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:34:15.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:15.950 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:34:15.951 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:34:15.951 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:34:15.951 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:15.955 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:34:16.434 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:34:16.483 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:34:16.486 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:34:16.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:16.488 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:34:16.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:16.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:16.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:16.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:16.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:16.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:16.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:16.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:16.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:16.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:16.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:34:16.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:34:16.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:16.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:16.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:16.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:16.902 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:34:16.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:16.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:16.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:16.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:17.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:34:17.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:34:17.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:17.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:17.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:17.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:18.319 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:34:18.791 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:34:18.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:18.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:18.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:18.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:19.264 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:34:19.737 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:34:19.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:19.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:19.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:19.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:20.210 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:34:20.681 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:34:20.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:20.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:20.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:20.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:21.154 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:34:21.626 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:34:22.099 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:34:22.569 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:34:23.040 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:34:23.513 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:34:23.986 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:34:24.458 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:34:24.932 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:34:25.404 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:34:25.877 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:34:26.348 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:34:26.821 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:34:27.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:27.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:27.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:27.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:27.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:27.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:27.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:27.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:27.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:27.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:27.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:27.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:27.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:27.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:27.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:34:27.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:34:27.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:27.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:27.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:27.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:27.293 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:34:27.765 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:34:28.236 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:34:28.707 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:34:29.180 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:34:29.652 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:34:30.124 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:34:30.595 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:34:31.066 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:34:31.539 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:34:32.012 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:34:32.484 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:34:32.955 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:34:33.426 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:34:33.896 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:34:34.367 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:34:34.838 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:34:35.309 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:34:35.782 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:34:36.255 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:34:36.727 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:34:37.200 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:34:37.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:37.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:37.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:37.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:37.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:37.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:37.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:37.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:37.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:37.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:37.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:37.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:37.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:37.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:37.395 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:34:37.395 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:34:37.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:37.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:37.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:37.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:37.673 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:34:38.145 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:34:38.615 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:34:39.087 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:34:39.557 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:34:40.028 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:34:40.499 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:34:40.970 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:34:41.440 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:34:41.914 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:34:42.386 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:34:42.858 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:34:43.329 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:34:43.800 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:34:44.270 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:34:44.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:44.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:44.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:44.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:44.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:44.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:44.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:44.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:44.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:44.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:44.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:44.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:44.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:44.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:44.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:34:44.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:34:44.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:44.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:44.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:44.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:44.741 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:34:45.215 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:34:45.687 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:34:46.159 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:34:46.630 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:34:47.103 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:34:47.571 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:34:48.042 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:34:48.515 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:34:48.988 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:34:49.460 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:34:49.931 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:34:50.404 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:34:50.877 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:34:51.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:51.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:51.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:51.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:51.348 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:34:51.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:51.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:51.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:51.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:51.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:51.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:51.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:51.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:51.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:34:51.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:34:51.360 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:34:51.360 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7654 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:51.360 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7654 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:51.360 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7654 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:51.360 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7654 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:51.360 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7654 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:56.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:34:56.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:34:56.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:56.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:56.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:56.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:56.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:56.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:34:56.375 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:56.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:34:56.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:34:56.377 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:34:56.377 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:34:56.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:34:56.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:56.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:56.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:34:56.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:34:56.379 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:34:56.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:56.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:34:56.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:34:56.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:34:56.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:56.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:56.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:34:56.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:34:56.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:34:56.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:56.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:34:56.381 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:34:56.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:34:56.381 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:34:56.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:56.381 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:34:56.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:34:56.382 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:34:56.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:34:56.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:34:56.384 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:34:56.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:34:56.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:34:56.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:34:56.903 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:34:56.903 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:34:56.903 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:34:56.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:56.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:56.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:56.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:56.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:56.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:56.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:56.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:56.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:56.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:56.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:34:56.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:34:56.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:56.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:56.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:56.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:57.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:57.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:57.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:57.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:57.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:57.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:57.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:57.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:57.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:57.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:57.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:57.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:57.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:57.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:57.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:34:57.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:34:57.334 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:34:57.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:57.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:57.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:57.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:57.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:57.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:57.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:57.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:57.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:34:57.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:57.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:57.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:57.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:57.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:57.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:57.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:57.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:57.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:57.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:57.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:57.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:57.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:57.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:57.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:34:57.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:34:57.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:57.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:57.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:57.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:58.272 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:34:58.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:58.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:58.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:58.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:58.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:58.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:58.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:58.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:58.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:58.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:58.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:58.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:58.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:58.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:34:58.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:58.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:58.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:58.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:58.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:34:58.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:34:58.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:34:58.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:34:58.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:58.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:58.742 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:34:59.213 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:34:59.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:59.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:59.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:59.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:59.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:34:59.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:34:59.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:34:59.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:34:59.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:34:59.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:34:59.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:34:59.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:34:59.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:34:59.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:34:59.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:34:59.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:34:59.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:34:59.541 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:34:59.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:34:59.541 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=685 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:59.541 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=685 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:34:59.541 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=685 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:04.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:35:04.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:35:04.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:04.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:04.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:04.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:04.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:04.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:35:04.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:04.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:35:04.556 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:35:04.558 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:35:04.559 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:35:04.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:35:04.559 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:04.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:04.560 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:35:04.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:35:04.560 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:35:04.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:04.561 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:35:04.561 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:35:04.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:35:04.561 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:04.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:04.562 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:35:04.562 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:35:04.562 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:35:04.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:04.564 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:35:04.564 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:35:04.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:35:04.564 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:04.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:04.564 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:35:04.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:35:04.564 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:35:04.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:04.567 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:35:04.567 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:35:04.567 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:35:04.568 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:04.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:04.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:04.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:04.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:04.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:04.572 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:35:05.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:35:05.092 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:35:05.092 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:35:05.093 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:35:05.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:05.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:05.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:05.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:05.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:05.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:05.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:05.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:05.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:05.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:05.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:05.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:05.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:05.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:05.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:05.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:05.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:05.523 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:35:05.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:05.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:05.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:05.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:05.994 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:35:06.467 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:35:06.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:06.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:06.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:06.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:06.940 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:35:07.413 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:35:07.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:07.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:07.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:07.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:07.883 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:35:08.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:08.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:08.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:08.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:08.356 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:35:08.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:08.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:08.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:08.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:08.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:08.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:08.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:08.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:08.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:08.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:08.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:08.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:08.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:08.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:08.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:08.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:08.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:08.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:08.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:08.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:08.825 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:35:09.295 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:35:09.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:09.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:09.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:09.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:09.766 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:35:10.237 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:35:10.710 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:35:11.183 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:35:11.655 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:35:11.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:11.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:11.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:11.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:11.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:11.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:11.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:11.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:11.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:11.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:11.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:11.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:11.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:11.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:11.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:11.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:11.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:11.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:11.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:11.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:12.126 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:35:12.599 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:35:13.072 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:35:13.544 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:35:14.014 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:35:14.485 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:35:14.958 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:35:15.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:15.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:15.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:15.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:15.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:15.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:15.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:15.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:15.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:15.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:15.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:15.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:15.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:15.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:15.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:15.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:15.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:15.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:15.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:15.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:15.430 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:35:15.897 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:35:16.368 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:35:16.842 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:35:17.314 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:35:17.785 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:35:18.256 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:35:18.727 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:35:19.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:19.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:19.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:19.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:19.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:19.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:19.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:19.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:19.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:19.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:19.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:19.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:19.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:35:19.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:35:19.062 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:35:19.062 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3134 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:19.062 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3134 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:19.062 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3134 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:19.062 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:19.062 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:19.062 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:19.062 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:24.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:35:24.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:35:24.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:24.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:24.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:24.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:24.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:24.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:35:24.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:24.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:35:24.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:35:24.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:35:24.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:35:24.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:35:24.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:24.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:24.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:35:24.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:35:24.084 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:35:24.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:24.084 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:35:24.084 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:35:24.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:35:24.085 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:24.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:24.085 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:35:24.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:35:24.085 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:35:24.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:24.086 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:35:24.086 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:35:24.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:35:24.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:24.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:24.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:35:24.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:35:24.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:35:24.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:24.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:35:24.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:35:24.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:35:24.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:35:24.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:35:24.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:35:24.089 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:35:24.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:24.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:24.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:24.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:35:24.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:35:24.614 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:35:24.616 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:35:24.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:24.619 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:35:24.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:24.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:24.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:24.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:24.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:24.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:24.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:24.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:24.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:24.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:24.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:24.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:24.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:24.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:24.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:24.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:25.040 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:35:25.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:25.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:25.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:25.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:25.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:25.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:25.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:25.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:25.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:25.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:25.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:25.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:25.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:25.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:25.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:25.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:25.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:25.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:25.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:25.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:25.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:25.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:25.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:25.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:25.511 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:35:25.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:25.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:25.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:25.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:25.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:25.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:25.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:25.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:25.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:25.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:25.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:25.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:25.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:25.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:25.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:25.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:25.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:25.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:25.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:25.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:25.981 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:35:26.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:26.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:26.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:26.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:26.452 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:35:26.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:26.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:26.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:26.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:26.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:26.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:26.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:26.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:26.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:26.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:26.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:26.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:26.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:26.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:26.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:26.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:26.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:26.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:26.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:26.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:26.925 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:35:27.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:27.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:27.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:27.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:27.393 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:35:27.865 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:35:27.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:27.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:27.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:27.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:27.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:27.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:27.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:27.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:27.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:27.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:27.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:27.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:27.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:35:27.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:35:27.965 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:35:27.965 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:27.965 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:27.965 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:27.965 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:32.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:35:32.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:35:32.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:32.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:32.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:32.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:32.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:32.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:35:32.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:32.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:35:32.978 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:35:32.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:35:32.981 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:35:32.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:35:32.981 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:32.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:32.982 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:35:32.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:35:32.982 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:35:32.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:32.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:35:32.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:35:32.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:35:32.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:32.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:32.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:35:32.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:35:32.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:35:32.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:32.988 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:35:32.988 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:35:32.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:35:32.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:32.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:32.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:35:32.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:35:32.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:35:32.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:32.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:35:32.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:35:32.993 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:35:32.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:32.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:32.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:32.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:32.998 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:35:33.475 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:35:33.526 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:35:33.528 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:35:33.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:33.530 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:35:33.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:33.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:33.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:33.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:33.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:33.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:33.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:33.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:33.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:33.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:33.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:33.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:33.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:33.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:33.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:33.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:33.943 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:35:33.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:33.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:34.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:34.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:34.414 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:35:34.887 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:35:34.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:34.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:35.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:35.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:35.360 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:35:35.832 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:35:35.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:36.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:36.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:36.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:36.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:35:36.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:36.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:36.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:36.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:36.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:36.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:36.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:36.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:36.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:36.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:36.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:36.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:36.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:36.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:36.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:36.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:36.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:36.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:36.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:36.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:36.773 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:35:36.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:37.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:37.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:37.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:37.245 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:35:37.715 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:35:38.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:38.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:38.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:38.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:38.186 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:35:38.657 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:35:39.128 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:35:39.598 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:35:40.069 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:35:40.543 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:35:41.015 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:35:41.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:41.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:41.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:41.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:41.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:41.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:41.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:41.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:41.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:41.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:41.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:41.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:41.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:41.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:41.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:41.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:41.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:41.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:41.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:41.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:41.482 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:35:41.954 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:35:42.427 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:35:42.899 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:35:43.372 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:35:43.842 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:35:44.313 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:35:44.787 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:35:45.259 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:35:45.731 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:35:46.202 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:35:46.675 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:35:47.148 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:35:47.620 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:35:47.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:47.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:47.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:47.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:47.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:47.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:47.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:47.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:47.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:47.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:35:47.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:47.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:47.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:47.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:47.806 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:35:47.806 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:35:47.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:35:47.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:35:47.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:47.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:48.086 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:35:48.557 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:35:49.028 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:35:49.498 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:35:49.972 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:35:50.444 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:35:50.915 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:35:51.387 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:35:51.860 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:35:52.332 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:35:52.804 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:35:53.275 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:35:53.746 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:35:54.217 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:35:54.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:35:54.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:35:54.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:35:54.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:35:54.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:54.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:54.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:54.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:54.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:54.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:54.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:54.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:54.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:35:54.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:35:54.550 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:35:54.551 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4664 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:54.551 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4664 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:54.551 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4664 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:54.551 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4664 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:54.551 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4664 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:54.551 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4664 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:54.551 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4664 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:35:59.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:35:59.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:35:59.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:59.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:59.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:59.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:59.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:35:59.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:35:59.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:59.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:35:59.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:35:59.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:35:59.568 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:35:59.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:35:59.568 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:59.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:35:59.569 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:35:59.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:35:59.569 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:35:59.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:35:59.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:35:59.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:35:59.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:35:59.571 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:59.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:35:59.571 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:35:59.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:35:59.572 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:35:59.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:35:59.573 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:35:59.573 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:35:59.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:35:59.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:35:59.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:35:59.574 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:35:59.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:35:59.574 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:35:59.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:59.577 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:35:59.578 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:35:59.578 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:35:59.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:35:59.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:35:59.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:59.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:59.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:59.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:35:59.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:59.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:59.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:35:59.582 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:36:00.060 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:36:00.104 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:36:00.107 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:36:00.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:00.109 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:36:00.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:00.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:00.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:36:00.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:00.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:00.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:36:00.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:00.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:00.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:36:00.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:36:00.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:36:00.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:36:00.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:36:00.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:36:00.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:00.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:00.528 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:36:00.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:00.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:00.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:00.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:00.999 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:36:01.472 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:36:01.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:01.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:01.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:01.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:01.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:01.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:01.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:01.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:01.944 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:36:01.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:01.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:01.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:36:01.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:01.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:01.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:36:01.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:01.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:01.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:36:01.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:36:01.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:36:01.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:36:01.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:36:01.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:36:01.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:01.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:02.411 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:36:02.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:02.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:02.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:02.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:02.883 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:36:03.356 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:36:03.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:03.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:03.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:03.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:03.829 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:36:04.301 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:36:04.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:04.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:04.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:04.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:04.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:04.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:04.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:04.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:04.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:04.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:36:04.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:04.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:04.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:04.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:36:04.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:04.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:36:04.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:36:04.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:36:04.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:36:04.771 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:36:04.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:36:04.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:36:04.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:04.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:05.242 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:36:05.713 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:36:06.186 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:36:06.659 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:36:07.131 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:36:07.604 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:36:08.077 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:36:08.548 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:36:09.020 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:36:09.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:09.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:09.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:09.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:09.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:09.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:09.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:36:09.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:09.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:09.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:36:09.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:09.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:09.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:36:09.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:36:09.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:36:09.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:36:09.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:36:09.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:36:09.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:09.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:09.490 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:36:09.961 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:36:10.435 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:36:10.907 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:36:11.379 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:36:11.850 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:36:12.323 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:36:12.796 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:36:13.268 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:36:13.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:36:13.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:13.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:36:13.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:36:13.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:13.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:13.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:13.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:13.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:13.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:13.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:13.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:13.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:13.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:13.603 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:36:13.603 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3032 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:13.603 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3032 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:13.603 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3032 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:13.603 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3032 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:13.603 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3032 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:13.603 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3032 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:13.603 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3032 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:18.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:18.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:18.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:18.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:18.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:18.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:18.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:18.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:18.617 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:18.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:18.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:36:18.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:36:18.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:36:18.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:18.619 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:18.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:18.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:36:18.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:18.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:36:18.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:18.621 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:36:18.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:36:18.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:18.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:18.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:18.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:36:18.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:18.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:36:18.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:18.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:36:18.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:36:18.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:18.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:18.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:18.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:36:18.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:18.623 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:36:18.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:36:18.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:36:18.626 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:36:18.626 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:36:18.626 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:18.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:18.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:36:19.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:36:19.154 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:36:19.155 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:36:19.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.157 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:36:19.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.574 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:36:19.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:19.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:19.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:19.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:19.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:19.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:20.042 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:36:20.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:20.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:20.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:20.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:20.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:20.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:20.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:20.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:20.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:20.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:20.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:20.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:20.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:20.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:20.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:20.490 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:20.490 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:25.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:25.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:25.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:25.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:25.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:25.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:25.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:25.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:25.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:25.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:25.504 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:36:25.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:36:25.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:36:25.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:25.506 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:25.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:25.506 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:36:25.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:25.507 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:36:25.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:25.508 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:36:25.509 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:36:25.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:25.509 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:25.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:25.509 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:36:25.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:25.509 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:36:25.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:25.511 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:36:25.511 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:36:25.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:25.511 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:25.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:25.511 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:36:25.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:25.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:36:25.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:36:25.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:36:25.514 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:36:25.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:25.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:25.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:25.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:36:25.997 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:36:26.041 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:36:26.043 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:36:26.046 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:36:26.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:36:26.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:26.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:26.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:26.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:26.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:26.936 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:36:27.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:27.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:27.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:27.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:27.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:27.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:27.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:27.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:27.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:27.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:27.372 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:36:27.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:32.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:32.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:32.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:32.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:32.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:32.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:32.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:32.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:32.391 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:32.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:32.391 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:36:32.393 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:36:32.394 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:36:32.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:32.394 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:32.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:32.395 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:36:32.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:32.395 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:36:32.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:32.396 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:36:32.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:36:32.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:32.396 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:32.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:32.396 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:36:32.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:32.396 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:36:32.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:32.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:36:32.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:36:32.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:32.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:32.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:32.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:36:32.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:32.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:36:32.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:32.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:36:32.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:36:32.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:36:32.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:36:32.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:36:32.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:36:32.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:36:32.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:36:32.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:36:32.402 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:36:32.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:32.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:32.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:32.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:36:32.884 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:36:32.928 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:36:32.930 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:36:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:32.932 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:36:32.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:32.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:32.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.348 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:36:33.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:33.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:33.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:33.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:33.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:36:33.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:33.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:34.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:34.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:34.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:34.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:34.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:34.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:34.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:34.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:34.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:34.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:34.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:34.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:34.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:34.230 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:36:39.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:39.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:39.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:39.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:39.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:39.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:39.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:39.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:39.245 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:39.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:39.245 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:36:39.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:36:39.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:36:39.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:39.247 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:39.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:39.248 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:36:39.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:39.248 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:36:39.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:39.249 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:36:39.249 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:36:39.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:39.249 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:39.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:39.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:36:39.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:39.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:36:39.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:39.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:36:39.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:36:39.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:39.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:39.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:39.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:36:39.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:39.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:36:39.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:39.253 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:36:39.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:36:39.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:36:39.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:36:39.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:36:39.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:36:39.254 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:36:39.254 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:36:39.254 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:39.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:39.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:39.259 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:36:39.737 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:36:39.784 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:36:39.787 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:36:39.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:39.789 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:36:39.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:39.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.202 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:36:40.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:40.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:40.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:40.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:40.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.675 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:36:40.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:40.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:41.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:41.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:41.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:41.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:41.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:41.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:41.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:41.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:41.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:41.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:41.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:41.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:41.111 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:36:46.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:46.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:46.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:46.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:46.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:46.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:46.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:46.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:46.126 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:46.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:46.126 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:36:46.130 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:36:46.130 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:36:46.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:46.131 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:46.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:46.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:36:46.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:46.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:36:46.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:46.134 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:36:46.134 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:36:46.134 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:46.134 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:46.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:46.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:36:46.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:46.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:36:46.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:46.137 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:36:46.137 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:36:46.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:46.138 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:46.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:46.138 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:36:46.138 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:46.138 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:36:46.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:46.141 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:36:46.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:36:46.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:36:46.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:36:46.141 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:36:46.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:36:46.142 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:36:46.142 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:36:46.142 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:46.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:46.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:46.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:46.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:46.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:46.147 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:36:46.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:36:46.672 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:36:46.673 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:36:46.674 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:36:46.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:46.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:46.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:46.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:46.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.097 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:36:47.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:47.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:47.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:47.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:47.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.568 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:36:47.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:47.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:47.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:47.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:47.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:47.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:47.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:47.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:47.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:47.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:47.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:47.998 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=400 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=401 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:47.998 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:52.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:52.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:52.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:53.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:53.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:53.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:53.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:53.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:53.008 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:53.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:53.008 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:36:53.011 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:36:53.012 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:36:53.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:53.012 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:53.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:53.012 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:36:53.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:53.012 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:36:53.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:53.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:36:53.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:36:53.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:53.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:53.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:36:53.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:53.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:53.015 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:36:53.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:53.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:36:53.018 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:36:53.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:53.018 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:53.018 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:36:53.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:53.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:53.018 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:36:53.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:53.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:36:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:36:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:36:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:36:53.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:36:53.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:36:53.021 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:36:53.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:53.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:36:53.500 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:36:53.547 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:36:53.548 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:36:53.549 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:36:53.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:53.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:53.964 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:36:54.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:54.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:54.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:54.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.432 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:36:54.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:36:54.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:54.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:54.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:54.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:54.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:54.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:54.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:54.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:54.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:54.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:54.891 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:36:54.891 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.892 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.892 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.892 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.892 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.892 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.892 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.892 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.892 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.892 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.893 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.893 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.893 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.893 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:54.893 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:36:59.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:36:59.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:36:59.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:59.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:59.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:59.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:59.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:36:59.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:59.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:59.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:36:59.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:36:59.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:36:59.905 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:36:59.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:59.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:59.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:36:59.906 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:36:59.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:36:59.907 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:36:59.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:36:59.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:36:59.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:36:59.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:59.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:59.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:36:59.908 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:36:59.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:36:59.908 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:36:59.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:36:59.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:36:59.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:36:59.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:59.910 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:36:59.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:36:59.910 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:36:59.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:36:59.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:36:59.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:59.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:36:59.913 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:36:59.913 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:36:59.913 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:59.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:36:59.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:59.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:59.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:59.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:36:59.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:59.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:36:59.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:59.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:59.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:36:59.917 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:00.395 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:00.444 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:00.446 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:00.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.448 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:00.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:00.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:00.865 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:37:00.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:00.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:00.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:00.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:01.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.329 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:01.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:01.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:01.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:01.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:01.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:01.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:01.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:01.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:01.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:01.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:01.778 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:06.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:06.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:06.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:06.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:06.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:06.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:06.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:06.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:06.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:06.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:06.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:37:06.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:37:06.793 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:37:06.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:06.793 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:06.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:06.794 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:37:06.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:06.794 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:37:06.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:06.796 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:37:06.796 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:37:06.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:06.796 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:06.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:06.796 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:37:06.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:06.796 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:37:06.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:06.798 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:37:06.798 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:37:06.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:06.798 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:06.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:06.798 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:37:06.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:06.798 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:37:06.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:06.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:37:06.802 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:37:06.802 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:37:06.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:06.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:06.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:06.806 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:07.285 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:07.333 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:07.336 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:07.338 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:07.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:07.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:07.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:07.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:07.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:07.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:07.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:07.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:07.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:07.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:07.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:07.415 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:07.415 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=132 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:07.415 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:07.415 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:07.415 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:07.415 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:07.415 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:07.415 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:12.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:12.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:12.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:12.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:12.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:12.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:12.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:12.430 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:12.430 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:12.430 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:12.430 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:37:12.433 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:37:12.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:37:12.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:12.434 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:12.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:12.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:37:12.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:12.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:37:12.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:12.436 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:37:12.436 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:37:12.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:12.436 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:12.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:12.437 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:37:12.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:12.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:37:12.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:12.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:37:12.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:37:12.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:12.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:12.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:12.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:37:12.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:12.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:37:12.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:12.441 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:37:12.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:37:12.442 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:37:12.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:12.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:12.446 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:12.924 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:12.966 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:12.968 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:12.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:12.970 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:12.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:12.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:12.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:12.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:12.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:13.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:13.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:13.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:13.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:13.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:13.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:13.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:13.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:13.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:13.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:13.075 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:18.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:18.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:18.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:18.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:18.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:18.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:18.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:18.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:18.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:18.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:18.090 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:37:18.092 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:37:18.092 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:37:18.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:18.093 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:18.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:18.093 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:37:18.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:18.093 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:37:18.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:18.095 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:37:18.095 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:37:18.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:18.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:18.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:18.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:37:18.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:18.096 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:37:18.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:18.098 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:37:18.098 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:37:18.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:18.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:18.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:18.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:37:18.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:18.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:37:18.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:18.101 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:37:18.101 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:37:18.101 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:37:18.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:18.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:18.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:18.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:18.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:18.106 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:18.584 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:18.631 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:18.634 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:18.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.638 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:18.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:18.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:18.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:18.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:18.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:18.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:18.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:18.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:18.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:18.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:18.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:18.746 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:18.746 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:18.746 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:18.746 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:18.747 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:18.747 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:18.747 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:18.747 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:23.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:23.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:23.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:23.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:23.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:23.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:23.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:23.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:23.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:23.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:23.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:37:23.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:37:23.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:37:23.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:23.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:23.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:23.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:37:23.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:23.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:37:23.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:23.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:37:23.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:37:23.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:23.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:23.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:23.772 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:37:23.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:23.772 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:37:23.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:23.775 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:37:23.775 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:37:23.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:23.775 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:23.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:23.775 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:37:23.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:23.775 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:37:23.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:23.780 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:37:23.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:37:23.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:37:23.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:37:23.780 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:37:23.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:23.781 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:37:23.781 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:37:23.782 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:37:23.782 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:37:23.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:23.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:23.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:23.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:37:23.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:23.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:23.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:23.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:23.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:23.787 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:24.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:24.313 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:24.315 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:24.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.317 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:24.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:24.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:24.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:24.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:24.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:24.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:24.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:24.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:24.400 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:29.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:29.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:29.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:29.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:29.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:29.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:29.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:29.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:29.416 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:29.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:29.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:37:29.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:37:29.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:37:29.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:29.421 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:29.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:29.422 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:37:29.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:29.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:37:29.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:29.425 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:37:29.425 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:37:29.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:29.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:29.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:29.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:37:29.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:29.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:37:29.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:29.428 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:37:29.428 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:37:29.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:29.428 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:29.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:29.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:37:29.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:29.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:37:29.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:29.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:37:29.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:37:29.432 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:37:29.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:29.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:29.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:29.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:29.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:29.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:29.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:29.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:29.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:29.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:29.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:29.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:29.916 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:29.966 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:29.968 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:29.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:29.971 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:29.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:29.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:30.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:30.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:30.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:30.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:30.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:30.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:30.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:30.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:30.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:30.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:30.050 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:35.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:35.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:35.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:35.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:35.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:35.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:35.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:35.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:35.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:35.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:35.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:37:35.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:37:35.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:37:35.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:35.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:35.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:35.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:37:35.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:35.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:37:35.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:35.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:37:35.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:37:35.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:35.072 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:35.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:35.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:37:35.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:35.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:37:35.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:35.074 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:37:35.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:37:35.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:35.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:35.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:35.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:37:35.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:35.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:37:35.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:35.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:37:35.078 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:37:35.078 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:37:35.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:35.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:35.083 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:35.561 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:35.612 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:35.614 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:35.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.616 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:35.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:35.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:35.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:35.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:35.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:35.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:35.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:35.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:35.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:35.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:35.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:35.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:35.719 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:35.719 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=138 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:35.719 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:35.719 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:35.719 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:35.719 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:35.719 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:35.719 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:40.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:40.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:40.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:40.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:40.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:40.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:40.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:40.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:40.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:40.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:40.742 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:37:40.744 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:37:40.744 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:37:40.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:40.744 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:40.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:40.744 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:37:40.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:40.744 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:37:40.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:40.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:37:40.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:37:40.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:40.747 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:40.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:40.747 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:37:40.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:40.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:37:40.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:40.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:37:40.748 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:37:40.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:40.748 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:40.748 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:37:40.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:40.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:40.748 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:37:40.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:40.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:37:40.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:37:40.750 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:37:40.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:40.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:41.233 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:41.275 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:41.277 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:41.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.279 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:41.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:41.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:41.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:41.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:41.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:41.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:41.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:41.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:41.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:41.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:41.376 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:41.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:41.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:41.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:41.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:41.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:41.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:41.376 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:37:46.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:46.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:46.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:46.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:46.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:46.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:46.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:46.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:46.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:46.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:46.393 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:37:46.395 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:37:46.395 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:37:46.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:46.395 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:46.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:46.395 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:37:46.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:46.396 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:37:46.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:46.397 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:37:46.397 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:37:46.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:46.397 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:46.397 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:37:46.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:46.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:46.397 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:37:46.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:46.399 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:37:46.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:37:46.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:46.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:46.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:37:46.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:46.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:46.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:37:46.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:37:46.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:37:46.401 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:37:46.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:46.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:46.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:46.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:46.884 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:46.925 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:46.928 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:46.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:46.930 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:46.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:37:46.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:37:46.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:37:46.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:37:46.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:37:46.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:37:46.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:37:46.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:37:47.357 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:37:47.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:47.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:47.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:47.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:47.824 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:37:48.294 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:37:48.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:48.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:48.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:48.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:48.765 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:37:49.238 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:37:49.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:49.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:49.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:49.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:49.710 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:37:50.182 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:37:50.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:37:50.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:37:50.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:50.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:50.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:50.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:50.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:50.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:50.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:50.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:50.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:50.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:50.402 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:55.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:55.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:55.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:55.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:55.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:55.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:55.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:55.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:55.416 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:55.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:37:55.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:37:55.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:37:55.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:37:55.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:55.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:55.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:55.420 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:37:55.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:37:55.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:37:55.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:55.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:37:55.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:37:55.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:55.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:55.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:55.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:37:55.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:37:55.422 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:37:55.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:55.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:37:55.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:37:55.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:55.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:37:55.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:37:55.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:37:55.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:37:55.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:37:55.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:55.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:37:55.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:37:55.429 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:37:55.429 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:37:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:37:55.433 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:37:55.911 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:37:55.957 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:37:55.960 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:37:55.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:55.963 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:37:55.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:37:55.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:37:55.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:37:55.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:37:55.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:37:55.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:37:55.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:37:55.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:37:56.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:37:56.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:37:56.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:37:56.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:37:56.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:37:56.377 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:37:56.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:56.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:56.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:56.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:56.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:37:56.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:37:56.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:37:56.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:37:56.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:37:56.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:37:56.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:37:56.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:37:56.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:37:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:37:56.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:37:56.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:37:56.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:37:56.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:37:56.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:37:56.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:37:56.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:37:56.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:37:56.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:37:56.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:37:56.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:37:56.520 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:37:56.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:01.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:01.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:01.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:01.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:01.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:01.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:01.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:01.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:01.539 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:01.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:01.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:38:01.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:38:01.545 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:38:01.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:01.545 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:01.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:01.546 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:38:01.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:01.546 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:38:01.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:01.549 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:38:01.549 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:38:01.549 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:01.549 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:01.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:01.549 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:38:01.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:01.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:38:01.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:01.552 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:38:01.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:38:01.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:01.552 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:01.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:01.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:38:01.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:01.553 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:38:01.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:01.555 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:38:01.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:38:01.556 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:38:01.556 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:38:01.556 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:01.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:01.561 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:38:02.040 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:38:02.082 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:38:02.083 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:38:02.084 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:38:02.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:38:02.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:02.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:02.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:38:02.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:02.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:02.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:02.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:38:02.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:38:02.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:38:02.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:02.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:02.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:02.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:02.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:38:02.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:02.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:02.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:02.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:38:02.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:02.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:02.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:02.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:38:02.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:38:02.507 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:38:02.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:02.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:02.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:02.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:02.978 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:38:03.449 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:38:03.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:03.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:03.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:03.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:03.922 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:38:04.395 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:38:04.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:04.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:04.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:04.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:04.867 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:38:05.338 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:38:05.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:05.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:05.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:05.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:05.809 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:38:06.282 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:38:06.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:06.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:06.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:06.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:06.755 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:38:07.227 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:38:07.698 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:38:08.169 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:38:08.639 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:38:09.110 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:38:09.581 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:38:10.054 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:38:10.527 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:38:10.999 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:38:11.472 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:38:11.945 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:38:12.417 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:38:12.891 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:38:13.363 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:38:13.835 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:38:14.309 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:38:14.782 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:38:15.254 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:38:15.726 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:38:16.200 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:38:16.672 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:38:17.143 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:38:17.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:17.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:17.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:17.438 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=3432 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:17.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:38:17.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:17.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:17.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:17.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:38:17.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:38:17.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:38:17.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:17.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:17.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:17.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:17.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:17.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:17.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:17.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:17.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:17.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:17.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:17.482 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:38:17.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:17.483 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3441 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:17.483 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3441 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:17.483 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:17.483 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:17.483 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:17.483 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:22.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:22.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:22.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:22.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:22.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:22.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:22.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:22.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:22.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:22.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:22.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:38:22.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:38:22.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:38:22.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:22.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:22.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:22.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:38:22.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:22.505 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:38:22.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:22.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:38:22.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:38:22.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:22.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:22.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:22.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:38:22.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:22.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:38:22.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:22.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:38:22.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:38:22.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:22.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:22.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:22.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:38:22.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:22.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:38:22.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:22.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:38:22.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:38:22.512 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:38:22.512 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:22.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:22.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:22.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:22.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:22.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:22.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:22.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:38:22.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:38:23.046 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:38:23.048 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:38:23.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:38:23.050 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:38:23.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:23.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:23.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:38:23.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:23.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:23.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:23.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:38:23.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:38:23.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:38:23.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:23.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:23.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:23.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:23.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:38:23.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:38:23.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:23.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:23.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:23.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:38:23.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:23.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:23.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:23.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:38:23.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:38:23.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:38:23.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:23.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:23.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:23.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:23.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:23.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:23.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:23.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:23.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:23.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:23.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:23.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:23.428 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:38:23.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=197 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:23.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=197 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:23.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=197 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:23.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:23.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:23.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:23.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:28.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:28.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:28.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:28.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:28.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:28.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:28.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:28.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:28.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:28.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:28.441 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:38:28.443 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:38:28.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:38:28.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:28.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:28.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:28.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:38:28.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:28.445 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:38:28.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:28.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:38:28.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:38:28.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:28.447 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:28.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:28.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:38:28.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:28.447 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:38:28.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:28.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:38:28.449 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:38:28.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:28.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:28.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:28.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:38:28.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:28.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:38:28.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:28.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:38:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:38:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:38:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:38:28.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:38:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:38:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:38:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:38:28.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:38:28.454 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:38:28.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:38:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:28.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:28.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:28.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:28.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:28.459 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:38:28.937 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:38:28.981 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:38:28.983 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:38:28.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:38:28.985 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:38:29.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:29.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:29.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:38:29.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:29.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:29.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:29.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:38:29.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:38:29.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:38:29.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:29.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:29.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:29.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:29.410 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:38:29.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:29.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:29.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:29.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:29.881 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:38:30.354 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:38:30.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:30.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:30.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:30.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:30.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:38:31.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:31.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:31.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:31.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:38:31.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:38:31.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:38:31.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:38:31.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:38:31.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:38:31.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:38:31.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:38:31.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:38:31.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:31.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:31.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:31.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:31.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:31.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:31.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:31.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:31.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:31.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:31.069 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:38:31.070 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:31.070 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:31.070 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:31.070 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:31.070 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:38:36.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:36.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:36.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:36.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:36.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:36.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:36.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:36.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:36.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:36.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:36.073 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:38:36.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:38:36.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:38:36.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:36.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:36.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:36.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:38:36.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:36.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:38:36.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:36.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:38:36.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:38:36.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:36.075 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:36.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:36.075 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:38:36.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:36.075 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:38:36.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:36.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:38:36.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:38:36.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:36.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:36.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:36.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:38:36.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:36.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:38:36.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:36.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:38:36.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:38:36.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:38:36.078 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:38:36.078 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:38:36.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:36.079 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:36.079 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:38:36.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:41.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:41.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:41.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:41.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:41.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:41.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:41.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:41.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:41.084 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:41.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:38:41.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:38:41.085 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:38:41.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:38:41.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:41.085 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:41.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:41.085 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:38:41.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:38:41.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:38:41.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:38:41.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:38:41.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:38:41.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:41.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:41.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:41.086 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:38:41.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:38:41.086 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:38:41.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:38:41.087 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:38:41.087 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:38:41.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:41.087 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:38:41.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:41.087 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:38:41.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:38:41.087 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:38:41.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:38:41.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:38:41.088 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:38:41.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:41.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:41.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:41.089 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:38:46.000 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.205.20:5700'
2026-04-22 02:38:46.000 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.205.20:5802)
2026-04-22 02:38:46.000 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.205.20:5801)
2026-04-22 02:38:46.000 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.205.22:6700'
2026-04-22 02:38:46.001 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.205.22:6802)
2026-04-22 02:38:46.001 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.205.22:6801)
2026-04-22 02:38:46.001 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.205.20:5700/1'
2026-04-22 02:38:46.001 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.205.20:5804)
2026-04-22 02:38:46.001 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.205.20:5803)
2026-04-22 02:38:46.001 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.205.20:5700/2'
2026-04-22 02:38:46.001 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.205.20:5806)
2026-04-22 02:38:46.001 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.205.20:5805)
2026-04-22 02:38:46.001 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.205.20:5700/3'
2026-04-22 02:38:46.001 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.205.20:5808)
2026-04-22 02:38:46.001 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.205.20:5807)
2026-04-22 02:38:46.001 [INFO] fake_trx.py:429 Init complete
2026-04-22 02:38:46.001 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-04-22 02:38:47.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:38:47.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:38:47.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:47.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:47.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:38:47.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:58.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:38:58.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:38:58.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:38:58.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:03.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:03.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:03.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:03.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:03.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:03.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:03.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:03.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:03.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:03.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:08.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:08.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:08.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:08.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:08.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:08.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:08.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:08.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:08.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:08.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:13.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:13.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:13.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:13.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:13.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:13.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:13.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:13.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:13.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:13.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:18.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:18.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:18.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:18.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:18.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:18.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:18.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:18.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:18.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:18.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:23.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:23.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:23.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:23.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:23.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:23.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:23.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:23.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:23.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:23.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:28.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:28.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:28.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:28.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:28.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:28.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:28.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:28.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:28.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:28.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:33.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:33.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:33.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:33.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:33.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:33.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:33.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:33.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:33.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:33.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:38.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:38.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:38.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:38.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:38.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:38.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:38.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:38.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:38.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:38.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:43.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:43.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:43.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:43.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:43.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:43.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:43.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:43.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:43.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:43.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:48.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:48.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:48.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:48.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:48.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:48.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:39:49.015 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:39:49.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:39:49.015 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:39:49.015 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:39:49.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 0 -> 1
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:39:49.015 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 0 -> 1
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:39:49.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 0 -> 1
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:39:49.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:39:49.015 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 0 -> 1
2026-04-22 02:39:49.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:39:49.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:49.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:49.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:49.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:54.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:54.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:54.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:54.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:54.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:54.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:54.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:54.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:54.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:54.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:59.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:39:59.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:39:59.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:59.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:39:59.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:59.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:59.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:39:59.081 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:39:59.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:39:59.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:39:59.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:39:59.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:39:59.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:39:59.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:04.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:04.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:04.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:04.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:04.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:04.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:04.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:04.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:04.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:04.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:09.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:09.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:09.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:09.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:09.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:09.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:09.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:09.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:09.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:09.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:14.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:14.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:14.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:14.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:14.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:14.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:14.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:14.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:14.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:14.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:19.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:19.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:19.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:19.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:19.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:19.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:19.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:19.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:19.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:19.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:25.267 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.205.20:5700'
2026-04-22 02:40:25.267 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.205.20:5802)
2026-04-22 02:40:25.267 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.205.20:5801)
2026-04-22 02:40:25.267 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.205.22:6700'
2026-04-22 02:40:25.267 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.205.22:6802)
2026-04-22 02:40:25.267 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.205.22:6801)
2026-04-22 02:40:25.267 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.205.20:5700/1'
2026-04-22 02:40:25.267 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.205.20:5804)
2026-04-22 02:40:25.267 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.205.20:5803)
2026-04-22 02:40:25.267 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.205.20:5700/2'
2026-04-22 02:40:25.267 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.205.20:5806)
2026-04-22 02:40:25.267 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.205.20:5805)
2026-04-22 02:40:25.267 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.205.20:5700/3'
2026-04-22 02:40:25.267 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.205.20:5808)
2026-04-22 02:40:25.267 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.205.20:5807)
2026-04-22 02:40:25.267 [INFO] fake_trx.py:429 Init complete
2026-04-22 02:40:25.267 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-04-22 02:40:26.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:26.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:26.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:26.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:26.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:26.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:29.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:29.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:40:29.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:29.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:40:29.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 0 -> 1
2026-04-22 02:40:29.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:40:29.886 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:40:29.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:40:29.887 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:29.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:29.887 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:40:29.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:40:29.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 0 -> 1
2026-04-22 02:40:29.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:29.890 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:40:29.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:40:29.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:40:29.890 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:29.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:29.891 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:40:29.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:40:29.891 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 0 -> 1
2026-04-22 02:40:29.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:29.893 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:40:29.893 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:40:29.893 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:40:29.893 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:29.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:29.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:40:29.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:40:29.894 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 0 -> 1
2026-04-22 02:40:29.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:29.896 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:40:29.896 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:40:29.896 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:40:29.897 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:29.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:29.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:29.901 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:40:30.379 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:40:30.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:30.436 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:40:30.438 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:40:30.439 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:40:30.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:30.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:30.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:30.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:30.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:30.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:30.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:30.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:30.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:30.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:30.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:30.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:30.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:30.851 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:40:30.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:30.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:30.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:30.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:31.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:31.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:31.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:31.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:31.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:31.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:31.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:31.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:31.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:31.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:31.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:31.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:31.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:31.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:31.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:31.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:31.322 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:40:31.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:31.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:31.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:31.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:31.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:31.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:31.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:31.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:31.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:31.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:31.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:31.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:31.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:31.792 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:40:31.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:31.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:31.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:31.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:31.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:31.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:31.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:31.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:32.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:32.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:32.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:32.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:32.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:32.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:32.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:32.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:32.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:32.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:32.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:32.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:32.263 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:40:32.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:32.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:32.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:32.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:32.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:32.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:32.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:32.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:32.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:32.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:32.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:32.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:32.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:32.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:32.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:32.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:32.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:32.734 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:40:32.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:32.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:32.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:32.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:32.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:33.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:33.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:33.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:33.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:33.205 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:40:33.679 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:40:33.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:33.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:33.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:33.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:33.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:33.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:33.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:33.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:33.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:33.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:33.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:33.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:33.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:33.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:33.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:33.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:33.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:33.946 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:33.947 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:40:33.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:33.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:34.151 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:40:34.624 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:40:34.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:34.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:34.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:34.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:34.768 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:34.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:34.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:34.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:34.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:34.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:34.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:34.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:34.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:34.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:34.894 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:34.894 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 02:40:34.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:34.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:35.097 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:40:35.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:35.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:35.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:35.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:35.307 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:35.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:35.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:35.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:35.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:35.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:35.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:35.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:35.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:35.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:35.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:35.570 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:40:35.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:35.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:35.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:35.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:36.042 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:40:36.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:36.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:36.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:36.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:36.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:36.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:36.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:36.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:36.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:36.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:36.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:36.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:36.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:36.515 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:40:36.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:36.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:36.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:36.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:36.988 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:40:37.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:37.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:37.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:37.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:37.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:37.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:37.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:37.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:37.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:37.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:37.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:37.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:37.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:37.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:37.460 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:40:37.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:37.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:37.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:37.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:37.931 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:40:38.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:38.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:38.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:38.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:38.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:38.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:38.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:38.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:38.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:38.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:38.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:38.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:38.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:38.404 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:40:38.437 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:38.437 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:40:38.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:38.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:38.868 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:40:39.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:39.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:39.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:39.215 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:39.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:39.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:39.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:39.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:39.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:39.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:39.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:39.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:39.332 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:40:39.364 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:39.365 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:40:39.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:39.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:39.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:39.746 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:39.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:39.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:39.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:39.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:39.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:39.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:39.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:39.796 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:40:39.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:39.858 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:39.858 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:40:39.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:39.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:39.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:39.953 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:39.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:39.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:39.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:39.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:39.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:39.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:39.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:39.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:40.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:40.093 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:40.093 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:40:40.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:40.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:40.261 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:40:40.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:40.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:40.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:40.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:40.439 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:40.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:40.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:40.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:40.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:40.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:40.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:40.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:40.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:40.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:40.560 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:40.560 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:40:40.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:40.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:40.732 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:40:40.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:40.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:40.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:40.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:40.929 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:40.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:40.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:40.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:40.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:40.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:40.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:40.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:40.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:40.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:41.030 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:41.052 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:40:41.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:41.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:41.204 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:40:41.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:41.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:41.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:41.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:41.418 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:41.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:41.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:41.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:41.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:41.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:41.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:41.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:41.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:41.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:41.501 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:41.501 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:40:41.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:41.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:41.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:41.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:41.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:41.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:41.596 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:41.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:41.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:41.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:41.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:41.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:41.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:41.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:41.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:41.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:41.672 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:40:41.704 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:41.704 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:40:41.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:41.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:42.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:42.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:42.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:42.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:42.082 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:42.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:42.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:42.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:42.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:42.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:42.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:42.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:42.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:42.136 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:40:42.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:42.198 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:42.198 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:40:42.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:42.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:42.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:42.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:42.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:42.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:42.565 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:42.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:42.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:42.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:42.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:42.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:40:42.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:40:42.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:40:42.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:40:42.601 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:40:42.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:42.664 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:40:42.665 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:40:42.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:42.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:43.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:40:43.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:43.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:43.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:43.052 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:40:43.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:43.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:43.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:43.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:43.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:43.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:43.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:43.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:43.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:43.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:43.060 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:40:48.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:48.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:48.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:48.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:48.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:48.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:48.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:48.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:40:48.087 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:48.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:40:48.087 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:40:48.090 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:40:48.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:40:48.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:40:48.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:48.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:48.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:40:48.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:40:48.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:40:48.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:48.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:40:48.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:40:48.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:40:48.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:48.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:48.093 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:40:48.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:40:48.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:40:48.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:48.095 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:40:48.095 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:40:48.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:40:48.095 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:48.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:48.095 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:40:48.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:40:48.095 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:40:48.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:48.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:40:48.098 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:40:48.098 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:40:48.098 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:48.102 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:40:48.575 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:40:48.621 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:40:48.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.625 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:40:48.627 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:40:48.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:48.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:48.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:48.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:48.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.045 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:40:49.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:49.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:49.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:49.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:49.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 02:40:49.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 02:40:49.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 02:40:49.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
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2026-04-22 02:40:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:49.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:49.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:49.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:49.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:49.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:49.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:49.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:49.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:49.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:49.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:49.508 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:40:49.508 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=307 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:49.508 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=307 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:49.508 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=307 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:49.508 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=307 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:49.508 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=307 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:49.508 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=307 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:49.508 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=307 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:54.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:54.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:54.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:54.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:54.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:54.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:54.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:54.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:40:54.526 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:54.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:40:54.526 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:40:54.528 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:40:54.529 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:40:54.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:40:54.529 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:54.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:54.530 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:40:54.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:40:54.530 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:40:54.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:54.531 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:40:54.531 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:40:54.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:40:54.531 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:54.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:54.531 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:40:54.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:40:54.531 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:40:54.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:54.533 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:40:54.533 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:40:54.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:40:54.533 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:40:54.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:54.533 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:40:54.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:40:54.534 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:40:54.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:54.536 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:40:54.536 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:40:54.536 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:40:54.537 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:40:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:54.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:40:54.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:54.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:54.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:40:54.541 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:40:55.019 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:40:55.065 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:40:55.067 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:40:55.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:55.069 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:40:55.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:40:55.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:40:55.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:40:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:55.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:40:55.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:40:55.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:40:55.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:40:55.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:40:55.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:40:55.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:40:55.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:40:55.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:40:55.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:40:55.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:40:55.113 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:40:55.113 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:00.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:41:00.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:41:00.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:41:00.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:41:00.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:41:00.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:41:00.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:41:00.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:41:00.125 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:00.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:41:00.125 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:41:00.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:41:00.129 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:41:00.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:41:00.129 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:00.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:41:00.130 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:41:00.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:41:00.130 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:41:00.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:00.133 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:41:00.133 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:41:00.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:41:00.133 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:00.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:41:00.133 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:41:00.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:41:00.133 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:41:00.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:00.135 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:41:00.135 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:41:00.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:41:00.136 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:00.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:41:00.136 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:41:00.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:41:00.136 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:41:00.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:00.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:41:00.140 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:41:00.140 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:41:00.140 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:00.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:00.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:00.145 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:41:00.623 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:41:00.671 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:41:00.673 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:41:00.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:00.676 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:41:00.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:00.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:00.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:00.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:00.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:41:00.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:41:00.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:41:00.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:41:00.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:41:00.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:41:00.716 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:41:00.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:00.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:00.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:00.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:00.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:00.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:00.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:05.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:41:05.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:41:05.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:41:05.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:41:05.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:41:05.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:41:05.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:41:05.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:41:05.728 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:05.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:41:05.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:41:05.732 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:41:05.733 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:41:05.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:41:05.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:05.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:41:05.734 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:41:05.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:41:05.734 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:41:05.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:05.736 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:41:05.736 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:41:05.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:41:05.736 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:05.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:41:05.736 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:41:05.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:41:05.736 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:41:05.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:05.738 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:41:05.738 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:41:05.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:41:05.738 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:05.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:41:05.739 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:41:05.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:41:05.739 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:41:05.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:05.741 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:41:05.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:41:05.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:41:05.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:41:05.741 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:41:05.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:41:05.742 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:41:05.742 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:41:05.742 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:41:05.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:05.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:05.747 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:41:06.225 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:41:06.271 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:41:06.273 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:41:06.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:06.276 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:41:06.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:06.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:06.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:06.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:06.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:41:06.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:41:06.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:41:06.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:41:06.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:41:06.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:41:06.406 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:41:06.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=143 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:06.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:06.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:06.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:06.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:06.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:06.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:11.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:41:11.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:41:11.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:41:11.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:41:11.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:41:11.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:41:11.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:41:11.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:41:11.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:11.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:41:11.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:41:11.424 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:41:11.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:41:11.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:41:11.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:11.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:41:11.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:41:11.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:41:11.426 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:41:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:11.427 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:41:11.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:41:11.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:41:11.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:11.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:41:11.427 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:41:11.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:41:11.428 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:41:11.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:11.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:41:11.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:41:11.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:41:11.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:41:11.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:41:11.430 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:41:11.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:41:11.430 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:41:11.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:11.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:41:11.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:41:11.433 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:41:11.434 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:11.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:11.438 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:41:11.916 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:41:11.959 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:41:11.960 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:41:11.960 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:41:11.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:11.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:11.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:11.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:11.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:11.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:11.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:11.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:11.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:12.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:12.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:12.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:12.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:12.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:12.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:12.388 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:41:12.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:12.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:12.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:12.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:12.859 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:41:13.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:41:13.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:13.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:13.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:13.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:13.805 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:41:14.277 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:41:14.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:14.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:14.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:14.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:14.751 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:41:15.223 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:41:15.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:15.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:15.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:15.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:15.695 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:41:16.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:16.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:16.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:16.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:16.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:16.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:16.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:16.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:16.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:16.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:16.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:16.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:16.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:16.168 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:41:16.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:16.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:16.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:16.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:16.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:16.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:41:16.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:41:16.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:41:16.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:41:16.641 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:41:17.113 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:41:17.584 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:41:18.057 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:41:18.530 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:41:19.002 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:41:19.475 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:41:19.948 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:41:20.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:20.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:20.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:20.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:20.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:20.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:20.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:20.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:20.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:20.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:20.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:20.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:20.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:20.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:20.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:20.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:20.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:20.420 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:41:20.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:20.891 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:41:21.364 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:41:21.836 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:41:22.308 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:41:22.779 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:41:23.250 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:41:23.723 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:41:24.196 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:41:24.668 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:41:24.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:24.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:24.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:24.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:24.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:24.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:24.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:24.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:24.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:24.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:24.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:24.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:24.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:24.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:24.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:24.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:24.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:25.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:25.141 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:41:25.614 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:41:26.086 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:41:26.557 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:41:27.030 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:41:27.503 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:41:27.975 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:41:28.448 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:41:28.920 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:41:29.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:29.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:29.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:29.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:29.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:29.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:29.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:29.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:29.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:29.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:29.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:29.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:29.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:29.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:29.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:29.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:29.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:29.388 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:41:29.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:29.859 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:41:30.333 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:41:30.805 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:41:31.277 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:41:31.751 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:41:32.223 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:41:32.696 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:41:33.169 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:41:33.642 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:41:33.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:33.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:33.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:33.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:33.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:33.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:33.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:33.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:33.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:33.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:33.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:33.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:33.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:33.789 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:41:33.789 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:41:33.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:33.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:34.114 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:41:34.588 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:41:34.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:35.060 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:41:35.533 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:41:36.007 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:41:36.479 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:41:36.953 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:41:37.426 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:41:37.898 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:41:38.371 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:41:38.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:38.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:38.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:38.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:38.612 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:41:38.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:38.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:38.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:38.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:38.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:38.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:38.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:38.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:38.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:38.657 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:41:38.657 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 02:41:38.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:38.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:38.839 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:41:39.304 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:41:39.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:39.775 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:41:40.248 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:41:40.721 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:41:41.193 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:41:41.666 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:41:42.139 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:41:42.611 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:41:43.084 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:41:43.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:43.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:43.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:43.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:43.484 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:41:43.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:43.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:43.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:43.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:43.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:43.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:43.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:43.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:43.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:43.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:43.557 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:41:43.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:43.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:43.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:43.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:44.029 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:41:44.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:44.505 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:41:44.977 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:41:45.448 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:41:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:41:46.392 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:41:46.865 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:41:47.337 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:41:47.811 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:41:48.283 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:41:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:48.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:48.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:48.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:48.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:48.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:48.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:48.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:48.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:48.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:48.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:48.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:48.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:48.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:48.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:48.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:48.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:48.755 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:41:49.226 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:41:49.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:49.699 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:41:50.172 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:41:50.644 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:41:51.115 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:41:51.586 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:41:52.060 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:41:52.532 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:41:53.004 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:41:53.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:53.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:53.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:53.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:53.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:53.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:53.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:53.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:53.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:53.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:53.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:53.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:53.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:41:53.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:53.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:53.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:53.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:53.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:53.475 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:41:53.946 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:41:53.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:54.420 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 02:41:54.892 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 02:41:55.364 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 02:41:55.838 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 02:41:56.311 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 02:41:56.783 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 02:41:57.254 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 02:41:57.727 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 02:41:57.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:57.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:57.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:57.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:57.992 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=10056 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:41:58.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:41:58.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:41:58.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:41:58.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:58.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:41:58.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:41:58.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:41:58.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:41:58.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:58.059 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:41:58.059 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:41:58.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:58.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:41:58.199 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 02:41:58.666 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 02:41:58.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:41:59.129 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 02:41:59.593 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 02:42:00.057 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 02:42:00.526 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 02:42:00.992 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 02:42:01.466 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 02:42:01.939 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 02:42:02.412 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 02:42:02.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:02.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:02.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:02.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:02.803 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:02.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:02.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:02.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:02.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:02.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:02.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:02.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:02.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:02.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:02.828 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:02.828 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:42:02.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:02.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:02.885 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 02:42:03.357 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 02:42:03.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:03.829 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 02:42:04.302 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 02:42:04.776 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 02:42:05.247 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 02:42:05.720 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 02:42:06.193 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 02:42:06.666 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 02:42:07.139 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 02:42:07.612 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 02:42:07.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:07.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:07.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:07.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:07.648 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:07.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:07.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:07.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:07.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:07.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:07.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:07.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:07.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:07.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:07.713 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:07.713 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:07.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:07.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:08.084 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 02:42:08.557 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 02:42:09.030 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 02:42:09.502 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 02:42:09.974 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 02:42:10.448 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 02:42:10.919 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 02:42:11.391 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 02:42:11.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:11.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:11.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:11.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:11.773 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:11.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:11.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:11.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:11.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:11.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:11.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:11.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:11.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:11.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:11.809 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:11.809 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:11.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:11.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:11.863 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 02:42:12.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:12.327 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 02:42:12.793 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 02:42:13.265 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 02:42:13.738 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 02:42:14.210 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 02:42:14.682 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 02:42:15.156 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 02:42:15.628 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 02:42:16.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:16.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:16.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:16.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:16.040 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:16.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:16.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:16.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:16.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:16.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:16.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:16.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:16.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:16.100 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 02:42:16.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:16.108 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:16.108 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:16.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:16.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:16.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:16.565 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 02:42:17.032 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 02:42:17.505 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 02:42:17.978 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 02:42:18.451 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 02:42:18.924 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 02:42:19.397 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 02:42:19.869 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 02:42:20.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:20.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:20.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:20.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:20.297 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:20.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:20.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:20.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:20.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:20.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:20.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:20.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:20.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:20.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:20.340 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 02:42:20.346 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:20.346 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:20.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:20.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:20.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:20.813 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 02:42:21.286 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 02:42:21.758 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 02:42:22.229 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 02:42:22.703 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 02:42:23.175 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 02:42:23.648 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 02:42:24.121 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 02:42:24.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:24.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:24.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:24.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:24.555 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:24.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:24.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:24.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:24.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:24.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:24.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:24.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:24.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:24.591 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 02:42:24.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:24.600 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:24.600 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:24.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:24.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:24.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:25.058 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 02:42:25.530 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 02:42:26.004 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 02:42:26.476 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 02:42:26.948 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 02:42:27.422 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 02:42:27.894 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 02:42:28.365 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 02:42:28.838 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 02:42:28.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:28.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:28.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:28.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:28.984 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:29.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:29.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:29.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:29.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:29.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:29.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:29.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:29.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:29.022 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:29.022 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:29.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:29.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:29.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:29.311 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 02:42:29.783 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 02:42:30.257 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 02:42:30.729 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 02:42:31.201 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 02:42:31.675 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 02:42:32.147 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 02:42:32.619 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-22 02:42:33.091 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-22 02:42:33.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:33.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:33.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:33.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:33.250 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:33.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:33.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:33.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:33.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:33.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:33.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:33.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:33.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:33.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:33.333 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:33.333 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:33.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:33.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:33.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:33.564 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-22 02:42:34.037 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-22 02:42:34.509 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-22 02:42:34.982 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-22 02:42:35.455 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-22 02:42:35.927 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-22 02:42:36.399 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-22 02:42:36.873 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-22 02:42:37.344 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-22 02:42:37.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:37.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:37.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:37.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:37.522 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:37.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:37.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:37.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:37.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:37.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:37.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:37.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:37.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:37.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:37.590 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:37.591 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:37.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:37.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:37.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:37.817 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-22 02:42:38.290 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-22 02:42:38.756 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-22 02:42:39.219 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-22 02:42:39.681 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-22 02:42:40.143 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-22 02:42:40.605 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-22 02:42:41.067 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-22 02:42:41.529 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-22 02:42:41.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:41.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:41.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:41.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:41.790 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:41.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:42:41.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:42:41.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:42:41.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:42:41.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:42:41.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:42:41.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:42:41.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:42:41.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:42:41.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:42:41.798 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:42:46.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:42:46.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:42:46.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:42:46.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:42:46.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:42:46.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:42:46.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:42:46.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:42:46.813 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:42:46.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:42:46.814 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:42:46.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:42:46.816 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:42:46.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:42:46.816 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:42:46.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:42:46.817 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:42:46.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:42:46.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:42:46.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:42:46.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:42:46.818 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:42:46.818 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:42:46.818 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:42:46.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:42:46.818 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:42:46.818 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:42:46.818 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:42:46.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:42:46.820 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:42:46.820 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:42:46.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:42:46.820 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:42:46.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:42:46.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:42:46.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:42:46.820 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:42:46.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:42:46.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:42:46.823 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:42:46.823 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:42:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:46.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:42:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:42:46.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:42:46.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:42:46.825 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:42:51.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:42:51.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:42:51.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:42:51.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:42:51.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:42:51.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:42:51.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:42:51.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:42:51.842 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:42:51.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:42:51.843 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:42:51.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:42:51.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:42:51.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:42:51.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:42:51.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:42:51.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:42:51.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:42:51.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:42:51.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:42:51.848 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:42:51.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:42:51.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:42:51.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:42:51.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:42:51.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:42:51.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:42:51.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:42:51.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:42:51.851 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:42:51.851 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:42:51.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:42:51.851 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:42:51.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:42:51.851 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:42:51.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:42:51.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:42:51.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:51.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:42:51.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:42:51.854 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:42:51.854 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:51.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:42:52.337 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:42:52.383 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:42:52.385 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:42:52.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:52.387 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:42:52.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:52.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:52.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:52.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:52.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:52.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:52.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:52.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:52.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:52.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:52.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:52.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:52.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:52.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:52.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:52.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:52.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:52.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:52.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:52.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:52.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:52.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:52.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:52.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:52.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:52.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:52.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:52.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:52.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:52.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:52.805 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:42:52.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:42:52.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:42:52.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:42:52.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:42:53.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:53.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:53.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:53.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:53.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:53.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:53.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:53.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:53.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:53.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:53.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:53.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:53.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:53.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:53.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:53.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:53.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:53.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:53.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:53.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:53.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:53.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:53.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:53.276 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:42:53.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:53.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:53.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:53.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:53.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:53.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:53.746 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:42:53.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:53.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:53.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:53.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:53.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:53.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:53.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:53.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:53.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:53.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:53.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:53.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:42:53.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:42:53.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:42:53.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:42:54.218 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:42:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:54.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:54.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:54.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:54.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:54.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:54.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:54.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:54.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:54.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:54.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:54.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:54.329 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:54.329 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:42:54.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:54.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:54.691 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:42:54.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:54.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:54.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:54.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:54.796 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:54.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:54.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:54.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:54.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:54.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:54.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:54.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:54.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:54.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:54.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:42:54.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:42:54.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:42:54.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:42:54.866 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:54.866 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 02:42:54.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:54.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:55.164 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:42:55.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:55.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:55.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:55.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:55.342 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:55.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:55.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:55.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:55.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:55.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:55.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:55.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:55.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:55.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:55.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:55.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:55.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:55.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:55.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:55.637 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:42:55.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:42:55.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:42:55.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:42:55.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:42:55.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:55.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:55.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:55.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:55.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:55.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:55.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:55.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:55.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:55.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:55.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:55.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:55.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:55.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:55.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:55.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:55.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:56.110 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:42:56.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:56.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:56.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:56.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:56.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:56.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:56.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:56.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:56.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:56.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:56.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:56.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:56.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:42:56.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:56.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:56.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:56.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:56.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:56.582 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:42:56.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:42:56.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:42:56.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:42:56.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:42:57.055 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:42:57.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:57.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:57.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:57.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:57.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:57.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:57.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:57.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:57.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:57.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:57.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:57.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:57.396 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:57.396 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:42:57.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:57.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:57.527 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:42:57.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:57.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:57.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:57.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:57.808 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:57.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:57.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:57.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:57.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:57.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:57.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:57.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:57.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:57.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:57.867 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:57.867 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:42:57.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:57.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:58.000 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:42:58.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:58.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:58.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:58.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:58.353 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:58.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:58.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:58.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:58.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:58.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:58.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:58.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:58.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:58.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:58.428 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:58.428 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:58.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:58.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:58.471 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:42:58.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:58.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:58.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:58.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:58.630 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:58.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:58.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:58.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:58.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:58.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:58.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:58.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:58.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:58.701 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:58.701 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:58.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:58.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:58.937 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:42:59.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:59.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:59.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:59.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:59.115 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:59.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:59.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:59.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:59.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:59.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:59.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:59.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:59.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:59.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:59.187 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:59.188 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:59.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:59.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:59.409 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:42:59.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:59.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:59.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:59.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:59.604 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:42:59.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:42:59.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:42:59.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:42:59.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:59.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:42:59.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:42:59.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:42:59.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:42:59.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:42:59.682 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:42:59.682 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:42:59.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:59.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:42:59.882 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:43:00.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:00.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:00.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:00.092 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:00.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:00.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:00.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:00.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:00.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:00.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:00.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:00.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:00.170 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:00.170 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:00.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:00.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:00.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:00.275 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:00.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:00.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:00.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:00.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:00.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:00.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:00.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:00.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:00.355 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:43:00.356 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:00.357 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:00.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:00.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:00.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:00.768 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:00.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:00.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:00.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:00.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:00.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:00.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:00.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:00.827 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:43:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:00.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:00.840 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:00.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:00.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:01.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:01.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:01.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:01.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:01.258 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:01.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:01.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:01.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:01.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:01.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:01.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:01.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:01.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:01.298 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:43:01.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:01.321 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:01.322 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:01.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:01.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:01.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:01.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:01.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:01.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:01.747 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:01.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:01.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:01.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:01.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:01.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:43:01.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:43:01.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:43:01.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:43:01.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:43:01.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:43:01.753 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:43:01.753 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:01.753 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:01.753 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:01.753 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:01.753 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:01.753 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:01.753 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:01.753 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:06.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:43:06.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:43:06.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:43:06.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:43:06.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:43:06.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:43:06.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:43:06.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:43:06.770 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:43:06.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:43:06.771 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:43:06.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:43:06.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:43:06.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:43:06.775 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:43:06.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:43:06.776 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:43:06.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:43:06.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:43:06.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:06.777 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:43:06.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:43:06.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:43:06.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:43:06.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:43:06.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:43:06.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:43:06.778 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:43:06.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:06.780 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:43:06.780 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:43:06.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:43:06.780 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:43:06.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:43:06.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:43:06.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:43:06.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:43:06.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:06.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:43:06.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:43:06.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:43:06.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:06.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:43:06.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:43:06.784 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:43:06.784 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:06.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:06.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:06.789 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:43:07.267 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:43:07.312 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:43:07.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:07.314 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:43:07.315 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:43:07.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:07.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:07.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:07.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:07.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:07.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:07.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:07.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:07.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:07.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:07.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:07.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:07.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:07.734 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:43:07.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:07.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:07.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:07.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:07.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:07.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:08.205 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:43:08.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:08.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:08.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:08.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:08.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:08.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:08.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:08.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:08.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:08.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:08.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:08.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:08.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:08.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:08.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:08.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:08.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:08.677 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:43:08.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:08.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:08.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:08.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:09.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:43:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:09.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:09.623 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:43:09.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:09.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:09.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:09.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:09.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:09.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:09.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:09.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:09.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:09.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:09.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:09.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:09.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:09.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:09.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:09.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:09.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:09.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:09.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:09.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:09.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:10.095 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:43:10.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:10.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:10.569 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:43:10.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:10.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:10.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:10.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:11.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:11.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:11.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:11.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:11.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:11.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:11.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:11.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:11.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:11.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:11.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:11.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:11.040 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:43:11.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:11.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:11.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:11.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:11.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:11.512 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:43:11.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:11.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:11.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:11.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:11.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:11.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:11.985 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:43:12.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:12.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:12.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:12.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:12.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:12.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:12.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:12.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:12.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:12.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:12.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:12.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:12.457 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:43:12.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:12.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:12.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:12.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:12.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:12.930 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:43:13.403 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:43:13.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:13.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:13.876 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:43:14.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:14.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:14.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:14.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:14.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:14.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:14.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:14.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:14.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:14.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:14.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:14.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:14.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:14.080 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:14.080 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:43:14.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:14.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:14.343 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:43:14.815 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:43:15.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:15.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:15.288 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:43:15.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:15.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:15.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:15.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:15.507 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:15.507 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1885 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:15.507 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1885 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:43:15.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:15.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:15.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:15.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:15.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:15.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:15.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:15.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:15.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:15.588 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:15.588 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 02:43:15.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:15.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:15.757 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:43:16.222 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:43:16.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:16.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:16.693 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:43:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:16.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:16.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:16.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:16.999 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:17.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:17.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:17.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:17.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:17.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:17.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:17.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:17.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:17.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:17.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:17.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:17.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:17.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:17.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:17.166 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:43:17.639 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:43:18.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:18.111 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:43:18.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:18.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:18.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:18.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:18.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:18.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:18.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:18.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:18.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:18.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:18.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:18.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:18.582 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:43:18.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:18.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:18.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:18.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:18.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:19.053 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:43:19.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:19.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:19.526 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:43:19.999 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:43:20.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:20.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:20.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:20.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:20.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:20.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:20.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:20.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:20.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:20.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:20.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:20.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:20.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:20.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:20.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:20.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:20.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:20.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:20.471 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:43:20.942 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:43:21.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:21.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:21.415 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:43:21.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:21.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:21.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:21.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:21.888 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:43:21.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:21.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:21.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:21.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:21.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:21.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:21.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:21.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:21.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:21.944 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:21.944 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:43:21.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:21.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:22.361 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:43:22.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:22.834 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:43:22.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:23.307 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:43:23.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:23.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:23.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:23.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:23.321 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:23.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:23.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:23.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:23.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:23.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:23.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:23.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:23.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:23.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:23.391 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:23.392 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:43:23.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:23.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:23.779 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:43:24.252 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:43:24.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:24.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:24.724 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:43:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:24.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:24.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:24.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:24.828 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:24.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:24.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:24.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:24.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:24.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:24.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:24.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:24.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:24.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:24.901 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:24.901 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:24.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:24.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:25.195 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:43:25.668 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:43:25.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:25.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:26.141 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:43:26.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:26.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:26.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:26.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:26.300 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:26.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:26.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:26.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:26.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:26.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:26.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:26.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:26.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:26.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:26.361 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:26.361 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:26.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:26.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:26.612 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:43:27.084 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:43:27.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:27.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:27.558 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:43:27.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:27.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:27.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:27.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:27.736 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:27.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:27.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:27.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:27.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:27.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:27.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:27.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:27.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:27.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:27.804 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:27.804 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:27.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:27.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:28.030 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:43:28.504 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:43:28.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:28.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:28.975 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:43:29.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:29.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:29.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:29.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:29.172 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:29.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:29.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:29.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:29.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:29.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:29.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:29.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:29.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:29.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:29.236 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:29.237 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:29.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:29.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:29.447 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:43:29.919 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:43:30.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:30.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:30.392 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:43:30.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:30.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:30.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:30.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:30.603 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:30.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:30.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:30.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:30.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:30.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:30.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:30.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:30.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:30.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:30.679 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:30.679 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:30.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:30.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:30.864 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:43:31.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:31.336 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:43:31.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:31.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:31.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:31.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:31.730 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:31.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:31.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:31.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:31.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:31.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:31.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:31.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:31.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:31.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:31.809 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:43:31.815 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:31.815 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:31.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:31.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:32.282 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:43:32.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:32.754 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:43:33.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:33.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:33.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:33.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:33.166 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:33.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:33.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:33.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:33.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:33.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:33.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:33.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:33.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:33.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:33.227 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:43:33.233 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:33.233 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:33.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:33.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:33.700 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:43:34.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:34.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:34.172 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:43:34.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:34.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:34.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:34.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:34.610 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:34.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:34.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:34.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:34.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:34.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:34.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:34.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:34.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:34.645 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:43:34.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:34.687 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:43:34.687 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:43:34.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:34.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:35.113 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:43:35.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:35.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:35.584 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:43:36.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:36.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:36.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:36.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:36.034 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:43:36.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:36.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:36.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:36.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:36.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:43:36.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:43:36.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:43:36.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:43:36.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:43:36.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:43:36.047 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:43:41.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:43:41.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:43:41.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:43:41.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:43:41.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:43:41.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:43:41.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:43:41.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:43:41.063 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:43:41.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:43:41.063 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:43:41.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:43:41.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:43:41.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:43:41.067 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:43:41.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:43:41.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:43:41.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:43:41.068 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:43:41.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:41.069 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:43:41.069 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:43:41.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:43:41.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:43:41.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:43:41.069 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:43:41.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:43:41.069 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:43:41.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:41.071 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:43:41.071 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:43:41.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:43:41.071 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:43:41.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:43:41.072 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:43:41.072 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:43:41.072 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:43:41.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:41.074 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:43:41.075 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:43:41.075 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:43:41.075 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:41.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:41.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:43:41.080 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:43:41.557 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:43:41.600 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:43:41.601 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:43:41.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:41.605 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:43:41.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:41.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:41.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:41.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:41.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:41.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:41.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:41.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:41.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:41.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:41.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:41.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:41.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:42.025 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:43:42.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:42.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:42.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:42.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:42.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:43:42.970 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:43:43.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:43.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:43.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:43.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:43.441 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:43:43.914 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:43:44.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:44.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:44.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:44.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:44.387 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:43:44.859 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:43:45.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:45.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:45.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:45.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:45.331 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:43:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:45.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:45.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:45.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:45.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:45.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:45.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:45.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:45.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:45.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:45.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:45.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:45.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:45.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:45.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:45.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:45.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:45.802 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:43:46.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:43:46.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:43:46.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:43:46.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:43:46.276 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:43:46.748 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:43:47.220 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:43:47.691 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:43:48.165 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:43:48.637 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:43:49.109 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:43:49.583 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:43:49.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:49.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:49.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:49.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:49.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:49.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:49.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:49.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:49.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:49.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:49.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:49.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:49.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:49.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:49.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:49.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:49.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:50.055 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:43:50.527 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:43:50.998 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:43:51.471 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:43:51.944 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:43:52.416 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:43:52.887 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:43:53.360 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:43:53.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:53.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:53.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:53.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:53.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:53.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:53.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:53.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:53.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:53.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:53.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:53.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:53.832 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:43:53.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:53.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:53.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:53.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:53.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:54.304 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:43:54.775 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:43:55.248 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:43:55.721 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:43:56.193 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:43:56.664 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:43:57.137 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:43:57.610 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:43:58.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:58.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:58.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:58.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:58.082 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:43:58.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:43:58.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:43:58.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:43:58.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:58.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:58.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:58.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:43:58.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:43:58.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:43:58.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:43:58.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:43:58.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:58.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:43:58.553 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:43:59.026 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:43:59.499 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:43:59.971 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:44:00.442 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:44:00.915 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:44:01.388 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:44:01.860 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:44:02.331 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:44:02.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:02.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:02.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:02.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:02.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:02.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:02.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:02.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:02.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:02.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:02.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:02.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:02.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:02.804 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:44:02.809 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:02.809 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:44:02.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:02.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:03.277 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:44:03.764 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:44:04.236 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:44:04.710 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:44:05.183 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:44:05.655 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:44:06.128 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:44:06.601 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:44:07.073 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:44:07.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:07.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:07.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:07.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:07.152 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:07.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:07.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:07.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:07.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:07.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:07.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:07.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:07.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:07.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:07.220 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:07.220 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 02:44:07.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:07.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:07.545 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:44:08.018 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:44:08.490 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:44:08.963 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:44:09.436 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:44:09.909 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:44:10.382 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:44:10.854 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:44:11.326 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:44:11.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:11.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:11.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:11.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:11.551 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:11.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:11.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:11.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:11.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:11.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:11.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:11.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:11.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:11.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:44:11.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:11.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:11.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:11.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:11.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:11.799 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:44:12.272 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:44:12.744 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:44:13.215 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:44:13.686 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:44:14.156 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:44:14.627 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:44:15.098 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:44:15.569 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:44:15.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:15.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:15.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:15.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:15.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:15.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:15.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:15.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:15.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:15.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:15.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:15.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:16.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:16.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:16.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:16.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:16.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:16.042 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:44:16.514 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:44:16.987 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:44:17.457 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:44:17.928 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:44:18.399 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:44:18.870 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:44:19.340 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:44:19.811 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:44:20.282 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:44:20.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:20.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:20.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:20.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:20.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:20.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:20.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:20.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:20.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:20.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:20.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:20.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:20.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:44:20.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:20.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:20.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:20.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:20.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:20.755 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:44:21.228 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:44:21.700 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:44:22.171 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:44:22.644 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:44:23.117 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:44:23.589 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:44:24.060 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 02:44:24.533 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 02:44:24.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:24.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:24.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:24.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:24.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:24.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:24.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:24.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:24.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:24.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:24.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:24.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:24.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:24.668 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:24.669 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:44:24.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:24.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:25.006 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 02:44:25.478 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 02:44:25.952 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 02:44:26.424 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 02:44:26.897 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 02:44:27.371 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 02:44:27.843 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 02:44:28.315 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 02:44:28.790 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 02:44:28.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:28.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:28.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:28.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:28.935 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:28.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:28.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:28.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:28.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:28.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:28.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:28.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:28.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:28.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:29.005 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:29.005 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:44:29.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:29.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:29.257 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 02:44:29.722 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 02:44:30.186 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 02:44:30.651 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 02:44:31.115 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 02:44:31.580 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 02:44:32.054 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 02:44:32.525 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 02:44:32.998 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 02:44:33.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:33.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:33.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:33.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:33.283 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:33.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:33.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:33.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:33.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:33.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:33.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:33.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:33.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:33.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:33.377 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:33.377 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:44:33.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:33.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:33.469 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 02:44:33.937 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 02:44:34.410 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 02:44:34.883 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 02:44:35.356 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 02:44:35.829 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 02:44:36.301 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 02:44:36.773 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 02:44:37.247 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 02:44:37.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:37.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:37.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:37.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:37.401 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:37.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:37.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:37.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:37.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:37.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:37.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:37.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:37.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:37.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:37.481 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:37.481 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:44:37.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:37.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:37.719 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 02:44:38.190 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 02:44:38.663 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 02:44:39.136 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 02:44:39.607 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 02:44:40.073 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 02:44:40.545 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 02:44:41.019 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 02:44:41.491 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 02:44:41.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:41.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:41.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:41.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:41.668 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:41.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:41.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:41.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:41.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:41.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:41.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:41.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:41.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:41.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:41.764 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:41.764 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:44:41.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:41.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:41.958 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 02:44:42.429 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 02:44:42.903 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 02:44:43.375 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 02:44:43.848 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 02:44:44.321 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 02:44:44.793 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 02:44:45.265 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 02:44:45.739 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 02:44:45.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:45.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:45.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:45.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:45.932 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:45.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:45.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:45.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:45.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:45.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:45.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:45.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:45.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:45.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:45.992 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:45.992 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:44:45.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:45.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:46.211 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 02:44:46.682 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 02:44:47.154 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 02:44:47.628 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 02:44:48.096 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 02:44:48.565 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 02:44:49.037 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 02:44:49.509 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 02:44:49.980 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 02:44:50.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:50.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:50.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:50.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:50.194 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:50.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:50.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:50.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:50.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:50.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:50.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:50.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:50.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:50.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:50.268 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:50.268 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:44:50.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:50.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:50.453 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 02:44:50.926 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 02:44:51.398 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 02:44:51.869 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 02:44:52.342 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 02:44:52.815 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 02:44:53.287 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 02:44:53.760 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 02:44:54.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:54.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:54.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:54.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:54.151 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:54.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:54.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:54.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:54.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:54.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:54.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:54.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:54.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:54.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:54.221 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:54.221 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:44:54.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:54.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:54.232 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 02:44:54.704 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 02:44:55.178 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 02:44:55.651 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 02:44:56.124 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 02:44:56.597 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 02:44:57.070 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 02:44:57.543 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 02:44:58.016 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 02:44:58.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:58.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:58.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:58.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:58.430 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:44:58.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:44:58.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:44:58.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:44:58.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:58.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:44:58.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:44:58.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:44:58.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:44:58.487 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 02:44:58.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:44:58.500 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:44:58.500 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:44:58.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:58.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:44:58.959 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 02:44:59.432 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 02:44:59.904 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 02:45:00.377 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 02:45:00.851 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 02:45:01.324 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 02:45:01.797 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 02:45:02.269 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-22 02:45:02.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:02.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:02.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:02.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:02.702 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:45:02.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:02.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:02.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:02.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:02.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:02.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:02.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:02.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:02.741 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-22 02:45:02.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:02.772 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:45:02.772 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:45:02.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:02.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:03.214 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-22 02:45:03.687 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-22 02:45:04.159 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-22 02:45:04.632 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-22 02:45:05.096 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-22 02:45:05.561 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-22 02:45:06.025 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-22 02:45:06.490 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-22 02:45:06.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:06.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:06.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:06.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:06.939 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:45:06.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:45:06.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:45:06.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:45:06.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:45:06.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:45:06.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:45:06.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:45:06.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:45:06.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:45:06.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:45:06.956 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:45:06.956 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=18565 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:45:06.956 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=18565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:45:06.956 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:45:06.956 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:45:06.956 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:45:06.956 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=18565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:45:06.956 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=18565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:45:11.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:45:11.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:45:11.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:45:11.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:45:11.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:45:11.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:45:11.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:45:11.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:45:11.968 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:45:11.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:45:11.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:45:11.969 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:45:11.969 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:45:11.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:45:11.969 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:45:11.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:45:11.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:45:11.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:45:11.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:45:11.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:45:11.970 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:45:11.970 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:45:11.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:45:11.970 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:45:11.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:45:11.970 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:45:11.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:45:11.970 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:45:11.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:45:11.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:45:11.971 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:45:11.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:45:11.971 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:45:11.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:45:11.971 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:45:11.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:45:11.971 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:45:11.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:45:11.973 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:45:11.973 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:45:11.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:45:11.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:45:11.974 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:45:16.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:45:16.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:45:16.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:45:16.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:45:16.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:45:16.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:45:16.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:45:16.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:45:16.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:45:16.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:45:16.980 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:45:16.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:45:16.981 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:45:16.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:45:16.981 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:45:16.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:45:16.981 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:45:16.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:45:16.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:45:16.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:45:16.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:45:16.982 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:45:16.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:45:16.982 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:45:16.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:45:16.982 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:45:16.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:45:16.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:45:16.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:45:16.983 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:45:16.983 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:45:16.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:45:16.983 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:45:16.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:45:16.983 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:45:16.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:45:16.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:45:16.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:45:16.984 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:45:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:45:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:45:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:45:16.984 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:45:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:45:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:45:16.985 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:45:16.985 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:45:16.985 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:16.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:16.989 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:45:17.465 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:45:17.500 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:45:17.501 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:45:17.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:17.502 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:45:17.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:17.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:17.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:17.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:17.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:17.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:17.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:17.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:17.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:17.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:17.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:17.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:17.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:17.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:45:17.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:45:17.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:45:17.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:45:17.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:45:18.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:45:18.872 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:45:18.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:45:18.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:45:18.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:45:18.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:45:19.343 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:45:19.814 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:45:19.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:45:19.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:45:19.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:45:19.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:45:20.282 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:45:20.752 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:45:20.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:45:20.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:45:20.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:45:20.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:45:21.219 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:45:21.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:21.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:21.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:21.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:21.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:21.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:21.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:21.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:21.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:21.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:21.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:21.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:21.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:21.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:21.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:21.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:21.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:21.685 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:45:21.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:45:21.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:45:21.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:45:21.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:45:22.155 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:45:22.622 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:45:23.088 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:45:23.554 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:45:24.021 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:45:24.490 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:45:24.961 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:45:25.431 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:45:25.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:25.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:25.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:25.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:25.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:25.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:25.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:25.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:25.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:25.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:25.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:25.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:25.901 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:45:25.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:25.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:25.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:25.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:25.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:26.369 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:45:26.839 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:45:27.310 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:45:27.778 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:45:28.248 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:45:28.718 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:45:29.188 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:45:29.659 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:45:30.130 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:45:30.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:30.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:30.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:30.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:30.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:30.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:30.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:30.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:30.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:30.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:30.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:30.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:30.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:30.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:30.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:30.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:30.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:30.598 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:45:31.068 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:45:31.534 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:45:32.006 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:45:32.479 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:45:32.951 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:45:33.424 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:45:33.896 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:45:34.369 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:45:34.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:34.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:34.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:34.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:34.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:34.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:34.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:34.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:34.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:34.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:34.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:34.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:34.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:34.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:34.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:34.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:34.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:34.837 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:45:35.308 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:45:35.781 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:45:36.254 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:45:36.726 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:45:37.197 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:45:37.667 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:45:38.139 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:45:38.611 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:45:39.084 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:45:39.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:39.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:39.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:39.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:39.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:39.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:39.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:39.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:39.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:39.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:39.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:39.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:39.213 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:45:39.213 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:45:39.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:39.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:39.556 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:45:40.028 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:45:40.501 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:45:40.974 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:45:41.446 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:45:41.918 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:45:42.392 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:45:42.864 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:45:43.336 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:45:43.810 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:45:44.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:44.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:44.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:44.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:44.018 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:45:44.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:44.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:44.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:44.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:44.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:44.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:44.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:44.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:44.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:44.081 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:45:44.081 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 02:45:44.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:44.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:44.282 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:45:44.755 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:45:45.228 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:45:45.700 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:45:46.173 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:45:46.646 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:45:47.118 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:45:47.591 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:45:48.064 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:45:48.536 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:45:48.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:48.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:48.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:48.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:48.895 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:45:48.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:48.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:48.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:48.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:48.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:48.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:48.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:48.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:48.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:48.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:48.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:48.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:48.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:48.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:49.009 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:45:49.482 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:45:49.954 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:45:50.425 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:45:50.896 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:45:51.367 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:45:51.840 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:45:52.313 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:45:52.785 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:45:53.259 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:45:53.731 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:45:53.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:53.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:53.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:53.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:53.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:53.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:53.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:53.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:53.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:53.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:53.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:53.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:53.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:53.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:53.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:53.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:53.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:54.203 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:45:54.674 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:45:55.147 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:45:55.620 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:45:56.092 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:45:56.566 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:45:57.038 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:45:57.511 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:45:57.981 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:45:58.452 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:45:58.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:58.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:58.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:58.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:58.651 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=9021 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:45:58.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:45:58.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:45:58.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:45:58.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:58.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:58.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:58.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:45:58.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:45:58.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:45:58.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:45:58.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:45:58.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:45:58.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:58.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:45:58.923 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:45:59.397 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:45:59.869 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 02:46:00.342 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 02:46:00.812 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 02:46:01.286 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 02:46:01.759 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 02:46:02.231 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 02:46:02.704 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 02:46:03.177 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 02:46:03.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:03.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:03.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:03.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:03.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:03.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:03.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:03.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:03.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:03.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:03.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:03.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:03.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:03.472 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:03.472 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:46:03.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:03.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:03.649 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 02:46:04.122 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 02:46:04.595 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 02:46:05.068 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 02:46:05.542 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 02:46:06.014 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 02:46:06.487 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 02:46:06.960 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 02:46:07.433 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 02:46:07.907 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 02:46:08.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:08.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:08.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:08.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:08.221 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:08.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:08.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:08.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:08.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:08.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:08.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:08.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:08.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:08.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:08.292 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:08.292 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:46:08.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:08.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:08.377 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 02:46:08.841 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 02:46:09.306 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 02:46:09.770 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 02:46:10.239 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 02:46:10.712 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 02:46:11.185 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 02:46:11.658 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 02:46:12.132 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 02:46:12.604 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 02:46:13.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:13.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:13.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:13.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:13.075 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:13.077 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 02:46:13.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:13.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:13.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:13.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:13.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:13.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:13.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:13.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:13.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:13.144 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:13.144 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:46:13.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:13.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:13.550 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 02:46:14.022 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 02:46:14.496 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 02:46:14.968 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 02:46:15.440 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 02:46:15.914 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 02:46:16.387 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 02:46:16.860 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 02:46:17.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:17.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:17.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:17.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:17.180 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:17.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:17.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:17.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:17.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:17.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:17.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:17.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:17.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:17.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:17.252 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:17.252 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:46:17.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:17.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:17.332 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 02:46:17.804 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 02:46:18.278 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 02:46:18.750 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 02:46:19.223 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 02:46:19.696 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 02:46:20.163 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 02:46:20.634 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 02:46:21.106 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 02:46:21.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:21.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:21.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:21.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:21.451 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:21.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:21.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:21.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:21.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:21.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:21.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:21.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:21.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:21.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:21.516 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:21.516 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:46:21.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:21.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:21.577 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 02:46:22.041 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 02:46:22.508 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 02:46:22.980 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 02:46:23.453 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 02:46:23.925 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 02:46:24.398 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 02:46:24.872 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 02:46:25.344 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 02:46:25.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:25.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:25.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:25.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:25.705 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:25.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:25.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:25.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:25.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:25.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:25.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:25.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:25.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:25.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:25.772 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:25.772 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:46:25.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:25.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:25.817 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 02:46:26.290 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 02:46:26.777 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 02:46:27.250 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 02:46:27.723 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 02:46:28.195 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 02:46:28.667 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 02:46:29.139 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 02:46:29.613 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 02:46:29.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:29.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:29.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:29.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:29.995 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:30.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:30.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:30.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:30.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:30.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:30.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:30.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:30.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:30.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:30.068 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:30.068 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:46:30.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:30.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:30.084 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 02:46:30.556 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 02:46:31.022 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 02:46:31.487 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 02:46:31.959 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 02:46:32.432 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 02:46:32.905 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 02:46:33.376 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 02:46:33.848 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 02:46:34.321 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 02:46:34.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:34.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:34.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:34.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:34.416 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:34.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:34.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:34.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:34.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:34.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:34.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:34.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:34.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:34.489 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:34.489 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:46:34.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:34.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:34.794 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 02:46:35.265 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 02:46:35.738 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 02:46:36.212 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 02:46:36.684 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 02:46:37.158 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 02:46:37.630 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 02:46:38.103 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-22 02:46:38.572 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-22 02:46:38.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:38.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:38.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:38.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:38.679 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:38.679 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=17671 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:46:38.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:38.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:38.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:38.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:38.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:38.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:38.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:38.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:38.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:38.750 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:38.750 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:46:38.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:38.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:39.043 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-22 02:46:39.515 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-22 02:46:39.988 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-22 02:46:40.461 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-22 02:46:40.935 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-22 02:46:41.407 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-22 02:46:41.880 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-22 02:46:42.353 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-22 02:46:42.825 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-22 02:46:42.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:42.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:42.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:42.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:42.947 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:42.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:42.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:42.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:42.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:42.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:42.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:42.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:42.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:43.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:43.016 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:46:43.016 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:46:43.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:43.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:43.296 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-22 02:46:43.767 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-22 02:46:44.237 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-22 02:46:44.703 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-22 02:46:45.176 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-22 02:46:45.649 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-22 02:46:46.122 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-22 02:46:46.595 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-22 02:46:47.067 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-22 02:46:47.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:47.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:47.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:47.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:47.216 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:46:47.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:46:47.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:46:47.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:46:47.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:46:47.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:46:47.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:46:47.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:46:47.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:46:47.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:46:47.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:46:47.223 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:46:52.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:46:52.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:46:52.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:46:52.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:46:52.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:46:52.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:46:52.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:46:52.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:46:52.236 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:46:52.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:46:52.237 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:46:52.239 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:46:52.240 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:46:52.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:46:52.240 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:46:52.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:46:52.241 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:46:52.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:46:52.242 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:46:52.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:46:52.243 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:46:52.243 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:46:52.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:46:52.244 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:46:52.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:46:52.244 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:46:52.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:46:52.244 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:46:52.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:46:52.246 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:46:52.246 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:46:52.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:46:52.246 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:46:52.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:46:52.246 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:46:52.247 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:46:52.247 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:46:52.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:46:52.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:52.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:52.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:52.251 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:46:52.251 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:46:52.251 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:46:52.251 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:46:52.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:52.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:52.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:52.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:52.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:46:52.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:46:52.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:46:52.253 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:46:57.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:46:57.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:46:57.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:46:57.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:46:57.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:46:57.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:46:57.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:46:57.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:46:57.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:46:57.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:46:57.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:46:57.272 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:46:57.272 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:46:57.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:46:57.273 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:46:57.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:46:57.273 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:46:57.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:46:57.274 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:46:57.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:46:57.275 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:46:57.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:46:57.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:46:57.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:46:57.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:46:57.276 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:46:57.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:46:57.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:46:57.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:46:57.278 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:46:57.278 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:46:57.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:46:57.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:46:57.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:46:57.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:46:57.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:46:57.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:46:57.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:46:57.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:46:57.282 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:46:57.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:57.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:46:57.287 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:46:57.765 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:46:57.809 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:46:57.810 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:46:57.811 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:46:57.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:57.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:57.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:57.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:57.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:57.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:57.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:57.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:57.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:57.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:57.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:57.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:57.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:57.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:58.232 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:46:58.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:46:58.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:46:58.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:46:58.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:46:58.703 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:46:58.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:58.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:58.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:58.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:58.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:46:58.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:46:58.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:46:58.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:58.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:58.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:58.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:46:58.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:46:58.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:46:58.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:46:58.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:46:58.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:58.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:46:59.176 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:46:59.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:46:59.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:46:59.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:46:59.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:46:59.649 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:47:00.121 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:47:00.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:00.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:00.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:00.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:00.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:00.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:00.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:00.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:00.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:00.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:00.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:00.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:00.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:00.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:00.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:00.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:00.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:00.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:00.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:00.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:00.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:00.594 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:47:01.067 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:47:01.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:01.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:01.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:01.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:01.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:01.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:01.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:01.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:01.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:01.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:01.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:01.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:01.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:01.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:01.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:01.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:01.539 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:47:01.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:01.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:01.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:01.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:01.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:02.010 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:47:02.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:02.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:02.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:02.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:02.483 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:47:02.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:02.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:02.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:02.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:02.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:02.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:02.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:02.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:02.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:02.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:02.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:02.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:02.955 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:47:03.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:03.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:03.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:03.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:03.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:03.428 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:47:03.901 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:47:04.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:04.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:04.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:04.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:04.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:04.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:04.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:04.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:04.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:04.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:04.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:04.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:04.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:04.093 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:04.093 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:47:04.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:04.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:04.374 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:47:04.846 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:47:05.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:05.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:05.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:05.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:05.045 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:05.045 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1677 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:05.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:05.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:05.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:05.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:05.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:05.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:05.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:05.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:05.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:05.116 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:05.116 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 02:47:05.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:05.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:05.315 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:47:05.780 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:47:06.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:06.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:06.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:06.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:06.057 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:06.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:06.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:06.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:06.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:06.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:06.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:06.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:06.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:06.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:06.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:06.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:06.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:06.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:06.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:06.244 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:47:06.715 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:47:07.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:07.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:07.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:07.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:07.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:07.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:07.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:07.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:07.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:07.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:07.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:07.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:07.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:07.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:07.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:07.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:07.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:07.186 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:47:07.657 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:47:08.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:08.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:08.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:08.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:08.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:08.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:08.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:08.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:08.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:08.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:08.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:08.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:08.127 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:47:08.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:08.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:08.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:08.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:08.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:08.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:08.598 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:47:09.069 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:47:09.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:09.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:09.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:09.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:09.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:09.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:09.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:09.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:09.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:09.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:09.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:09.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:09.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:09.542 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:47:09.549 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:09.549 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:47:09.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:09.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:10.013 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:47:10.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:10.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:10.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:10.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:10.432 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:10.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:10.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:10.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:10.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:10.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:10.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:10.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:10.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:10.477 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:47:10.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:10.508 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:10.508 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:47:10.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:10.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:10.947 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:47:11.420 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:47:11.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:11.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:11.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:11.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:11.448 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:11.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:11.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:11.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:11.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:11.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:11.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:11.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:11.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:11.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:11.520 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:11.520 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:11.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:11.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:11.893 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:47:12.365 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:47:12.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:12.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:12.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:12.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:12.526 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:12.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:12.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:12.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:12.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:12.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:12.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:12.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:12.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:12.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:12.593 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:12.594 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:12.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:12.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:12.838 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:47:13.310 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:47:13.783 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:47:13.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:13.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:13.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:13.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:13.959 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:13.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:13.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:13.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:13.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:13.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:13.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:13.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:13.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:14.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:14.029 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:14.029 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:14.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:14.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:14.256 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:47:14.728 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:47:15.201 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:47:15.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:15.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:15.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:15.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:15.396 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:15.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:15.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:15.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:15.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:15.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:15.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:15.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:15.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:15.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:15.470 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:15.470 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:15.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:15.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:15.670 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:47:16.141 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:47:16.614 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:47:16.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:16.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:16.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:16.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:16.826 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:16.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:16.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:16.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:16.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:16.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:16.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:16.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:16.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:16.888 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:16.888 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:16.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:16.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:17.082 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:47:17.546 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:47:17.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:17.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:17.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:17.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:17.940 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:17.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:17.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:17.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:17.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:17.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:17.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:17.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:17.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:17.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:18.003 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:18.003 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:18.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:18.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:18.016 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:47:18.488 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:47:18.961 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:47:19.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:19.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:19.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:19.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:19.370 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:19.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:19.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:19.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:19.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:19.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:19.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:19.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:19.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:19.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:19.433 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:47:19.437 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:19.437 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:19.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:19.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:19.900 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:47:20.366 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:47:20.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:20.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:20.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:20.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:20.797 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:20.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:20.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:20.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:20.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:20.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:20.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:20.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:20.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:20.831 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:47:20.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:20.868 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:20.868 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:20.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:20.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:21.295 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:47:21.765 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:47:22.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:22.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:22.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:22.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:22.215 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:22.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:22.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:22.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:22.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:22.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:47:22.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:47:22.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:47:22.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:47:22.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:47:22.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:47:22.232 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:47:22.233 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:22.233 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:22.233 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:22.233 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:22.233 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:22.233 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:22.234 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:27.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:47:27.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:47:27.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:47:27.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:47:27.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:47:27.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:47:27.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:47:27.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:47:27.241 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:47:27.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:47:27.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:47:27.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:47:27.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:47:27.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:47:27.245 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:47:27.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:47:27.245 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:47:27.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:47:27.245 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:47:27.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:27.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:47:27.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:47:27.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:47:27.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:47:27.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:47:27.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:47:27.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:47:27.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:47:27.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:27.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:47:27.250 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:47:27.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:47:27.250 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:47:27.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:47:27.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:47:27.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:47:27.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:47:27.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:27.253 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:47:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:47:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:47:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:47:27.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:47:27.254 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:47:27.254 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:47:27.254 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:47:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:47:27.259 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:47:27.737 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:47:27.780 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:47:27.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:27.783 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:47:27.785 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:47:27.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:27.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:27.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:27.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:27.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:27.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:27.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:27.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:27.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:47:27.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:27.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:27.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:27.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:28.209 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:47:28.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:28.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:28.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:28.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:28.681 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:47:29.154 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:47:29.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:29.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:29.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:29.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:29.627 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:47:30.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:47:30.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:30.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:30.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:30.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:30.572 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:47:30.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:31.045 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:47:31.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:31.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:31.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:31.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:31.517 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:47:31.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:31.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:31.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:31.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:31.591 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:31.591 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=936 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:31.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:31.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:31.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:31.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:31.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:31.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:31.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:47:31.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:31.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:31.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:31.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:31.990 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:47:32.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:32.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:32.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:32.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:32.463 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:47:32.935 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:47:33.406 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:47:33.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:47:34.350 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:47:34.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:34.823 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:47:35.295 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:47:35.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:35.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:35.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:35.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:35.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:35.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:35.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:35.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:35.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:35.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:35.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:35.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:35.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:47:35.513 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:35.513 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:47:35.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:35.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:35.768 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:47:36.242 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:47:36.714 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:47:37.187 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:47:37.660 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:47:38.132 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:47:38.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:38.601 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:47:39.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:39.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:39.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:39.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:39.051 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:39.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:39.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:39.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:39.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:39.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:39.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:39.065 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:47:39.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:47:39.069 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:39.069 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:47:39.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:39.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:39.530 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:47:39.994 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:47:40.459 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:47:40.923 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:47:41.387 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:47:41.851 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:47:42.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:42.316 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:47:42.779 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:47:42.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:42.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:42.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:42.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:42.836 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:42.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:42.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:42.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:42.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:42.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:42.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:42.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:42.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:42.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:47:42.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:42.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:42.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:42.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:43.245 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:47:43.717 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:47:44.190 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:47:44.662 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:47:45.135 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:47:45.605 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:47:46.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:46.076 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:47:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:46.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:46.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:46.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:46.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:46.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:46.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:46.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:46.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:46.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:46.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:47:46.547 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:47:46.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:46.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:46.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:46.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:47.018 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:47:47.491 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:47:47.964 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:47:48.436 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:47:48.906 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:47:49.377 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:47:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:49.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:49.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:49.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:49.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:49.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:49.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:49.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:49.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:49.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:49.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:49.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:49.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:49.850 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:47:49.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:47:49.886 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:49.886 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:49.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:49.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:50.323 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:47:50.794 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:47:51.267 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:47:51.741 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:47:52.213 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:47:52.686 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:47:53.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:53.158 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:47:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:53.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:53.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:53.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:53.555 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:53.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:47:53.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:53.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:47:53.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:47:53.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:47:53.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:47:53.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:47:53.582 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:47:53.582 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:47:53.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:53.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:53.630 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:47:54.103 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:47:54.576 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:47:55.047 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:47:55.519 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:47:55.993 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:47:56.465 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:47:56.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:56.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:47:56.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:47:56.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:47:56.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:47:56.860 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:47:56.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:47:56.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:47:56.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:47:56.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:47:56.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:47:56.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:47:56.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:47:56.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:47:56.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:47:56.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:47:56.874 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:47:56.874 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:56.874 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:56.874 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:56.874 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:56.874 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:56.874 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:47:56.874 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:01.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:48:01.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:48:01.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:48:01.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:48:01.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:48:01.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:48:01.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:48:01.887 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:48:01.887 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:48:01.888 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:48:01.888 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:48:01.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:48:01.890 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:48:01.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:48:01.890 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:48:01.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:48:01.890 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:48:01.891 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:48:01.891 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:48:01.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:01.892 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:48:01.892 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:48:01.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:48:01.892 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:48:01.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:48:01.892 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:48:01.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:48:01.892 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:48:01.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:01.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:48:01.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:48:01.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:48:01.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:48:01.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:48:01.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:48:01.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:48:01.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:48:01.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:48:01.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:48:01.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:48:01.898 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:48:01.898 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:01.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:01.903 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:48:02.381 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:48:02.424 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:48:02.425 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:48:02.426 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:48:02.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:02.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:02.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:02.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:02.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:02.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:02.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:02.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:02.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:02.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:02.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:02.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:02.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:02.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:02.854 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:48:02.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:02.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:02.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:02.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:03.327 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:48:03.800 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:48:03.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:03.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:03.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:03.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:04.272 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:48:04.743 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:48:04.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:04.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:04.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:04.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:05.216 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:48:05.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:05.689 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:48:05.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:05.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:05.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:05.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:06.161 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:48:06.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:06.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:06.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:06.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:06.235 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=936 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:06.236 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:06.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:06.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:06.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:06.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:06.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:06.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:06.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:06.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:06.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:06.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:06.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:06.635 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:48:06.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:06.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:06.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:06.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:07.108 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:48:07.580 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:48:08.051 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:48:08.521 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:48:08.992 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:48:09.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:09.466 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:48:09.938 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:48:10.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:10.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:10.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:10.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:10.088 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1768 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:10.088 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1768 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:10.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:10.088 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=1768 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:10.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:10.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:10.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:10.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:10.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:10.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:10.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:10.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:10.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:10.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:10.411 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:48:10.884 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:48:11.357 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:48:11.829 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:48:12.300 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:48:12.773 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:48:13.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:13.246 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:48:13.718 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:48:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:13.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:13.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:13.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:13.940 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=2600 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:13.941 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=2600 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:13.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:13.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:13.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:13.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:13.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:13.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:13.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:13.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:13.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:13.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:13.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:14.189 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:48:14.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:14.662 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:48:14.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:14.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:14.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:14.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:14.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:14.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:14.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:14.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:14.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:14.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:14.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:14.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:14.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:14.961 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:48:14.962 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:48:14.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:14.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:15.134 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:48:15.607 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:48:16.080 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:48:16.553 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:48:17.026 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:48:17.499 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:48:17.972 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:48:17.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:18.444 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:48:18.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:18.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:18.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:18.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:18.521 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:48:18.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:18.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:18.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:18.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:18.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:18.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:18.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:18.538 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:48:18.538 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:48:18.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:18.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:18.918 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:48:19.390 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:48:19.862 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:48:20.336 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:48:20.809 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:48:21.283 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:48:21.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:21.755 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:48:22.228 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:48:22.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:22.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:22.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:22.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:22.377 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:48:22.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:22.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:22.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:22.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:22.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:22.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:22.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:22.413 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:48:22.413 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:48:22.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:22.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:22.702 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:48:23.174 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:48:23.641 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:48:24.105 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:48:24.570 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:48:25.034 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:48:25.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:25.504 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:48:25.977 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:48:26.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:26.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:26.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:26.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:26.198 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:48:26.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:26.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:26.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:26.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:26.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:26.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:26.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:26.211 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:48:26.211 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:48:26.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:26.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:26.446 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:48:26.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:26.910 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:48:27.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:27.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:27.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:27.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:27.149 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:48:27.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:27.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:27.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:27.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:27.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:27.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:27.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:27.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:27.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:27.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:27.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:27.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:27.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:27.374 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:48:27.845 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:48:28.316 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:48:28.787 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:48:29.257 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:48:29.730 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:48:30.203 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:48:30.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:30.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:30.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:30.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:30.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:30.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:30.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:30.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:30.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:30.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:30.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:30.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:30.675 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:48:30.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:30.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:30.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:30.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:31.148 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:48:31.621 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:48:32.093 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:48:32.564 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:48:33.037 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:48:33.509 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:48:33.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:33.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:33.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:33.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:33.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:33.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:33.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:33.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:33.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:33.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:33.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:33.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:33.982 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:48:33.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:33.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:33.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:33.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:34.452 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:48:34.926 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:48:35.398 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:48:35.870 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:48:36.341 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:48:36.812 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:48:37.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:37.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:37.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:37.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:37.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:37.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:37.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:37.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:37.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:37.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:37.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:37.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:37.283 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:48:37.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:37.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:37.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:37.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:37.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:37.756 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:48:38.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:38.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:38.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:38.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:38.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:38.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:38.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:38.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:38.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:38.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:38.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:38.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:38.228 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:48:38.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:38.261 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:48:38.261 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:48:38.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:38.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:38.692 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:48:39.156 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:48:39.623 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:48:40.094 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:48:40.568 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:48:41.039 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:48:41.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:41.512 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:48:41.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:41.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:41.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:41.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:41.906 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:48:41.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:41.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:41.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:41.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:41.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:41.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:41.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:41.933 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:48:41.933 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:48:41.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:41.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:41.985 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:48:42.458 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:48:42.930 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:48:43.403 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:48:43.876 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:48:44.348 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:48:44.822 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 02:48:44.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:45.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:45.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:45.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:45.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:45.213 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:48:45.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:45.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:45.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:45.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:45.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:45.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:45.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:45.239 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:48:45.239 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:48:45.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:45.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:45.294 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 02:48:45.766 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 02:48:46.238 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 02:48:46.712 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 02:48:47.185 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 02:48:47.659 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 02:48:48.131 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 02:48:48.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:48.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:48.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:48.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:48.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:48.524 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:48:48.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:48.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:48.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:48.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:48.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:48.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:48.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:48:48.551 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:48:48.551 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:48:48.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:48.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:48.605 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 02:48:49.077 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 02:48:49.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:49.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:49.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:49.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:49.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:49.470 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:48:49.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:49.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:49.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:49.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:49.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:48:49.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:48:49.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:48:49.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:48:49.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:48:49.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:48:49.486 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:48:49.486 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10290 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:49.486 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10290 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:49.487 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10290 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:49.487 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10290 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:49.487 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:49.487 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:49.487 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:49.487 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=10290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:48:54.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:48:54.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:48:54.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:48:54.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:48:54.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:48:54.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:48:54.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:48:54.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:48:54.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:48:54.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:48:54.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:48:54.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:48:54.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:48:54.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:48:54.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:48:54.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:48:54.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:48:54.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:48:54.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:48:54.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:54.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:48:54.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:48:54.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:48:54.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:48:54.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:48:54.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:48:54.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:48:54.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:48:54.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:54.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:48:54.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:48:54.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:48:54.507 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:48:54.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:48:54.507 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:48:54.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:48:54.507 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:48:54.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:54.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:48:54.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:48:54.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:48:54.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:48:54.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:54.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:48:54.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:48:54.511 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:48:54.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:48:54.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:54.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:54.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:54.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:54.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:48:54.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:48:54.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:48:55.041 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:48:55.042 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:48:55.043 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:48:55.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:48:55.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:48:55.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:48:55.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:48:55.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:48:55.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:48:55.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:48:55.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:48:55.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:48:55.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:48:55.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:55.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:55.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:55.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:55.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:48:56.408 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:48:56.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:56.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:56.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:56.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:56.895 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:48:57.362 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:48:57.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:57.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:57.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:57.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:57.828 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:48:58.294 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:48:58.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:58.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:58.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:58.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:58.759 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:48:59.227 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:48:59.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:48:59.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:48:59.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:48:59.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:48:59.698 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:49:00.169 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:49:00.639 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:49:01.111 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:49:01.583 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:49:02.051 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:49:02.518 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:49:02.984 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:49:03.450 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:49:03.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:03.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:03.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:03.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:03.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:03.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:03.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:03.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:03.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:03.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:03.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:49:03.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:49:03.836 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:49:03.836 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2022 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.836 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2022 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.836 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2022 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2022 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2022 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2022 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2022 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2023 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2023 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2023 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2023 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2023 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2023 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2023 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:03.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2023 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:08.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:49:08.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:49:08.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:08.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:08.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:08.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:08.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:08.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:49:08.847 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:08.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:49:08.847 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:49:08.849 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:49:08.849 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:49:08.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:49:08.849 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:08.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:08.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:49:08.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:49:08.850 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:49:08.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:08.851 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:49:08.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:49:08.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:49:08.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:08.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:08.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:49:08.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:49:08.851 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:49:08.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:08.853 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:49:08.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:49:08.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:49:08.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:08.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:08.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:49:08.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:49:08.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:49:08.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:49:08.855 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:49:08.855 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:49:08.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:49:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:08.860 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:49:09.338 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:49:09.386 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:09.388 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:49:09.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:09.390 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:49:09.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:09.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:09.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:09.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:09.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:09.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:09.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:09.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:09.808 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:49:09.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:09.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:09.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:09.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:10.275 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:49:10.742 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:49:10.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:10.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:10.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:10.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:11.213 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:49:11.684 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:49:11.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:11.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:11.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:11.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:12.155 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:49:12.624 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:49:12.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:12.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:12.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:12.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:13.090 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:49:13.556 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:49:13.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:13.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:13.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:13.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:14.021 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:49:14.486 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:49:14.952 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:49:15.417 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:49:15.883 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:49:16.349 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:49:16.814 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:49:17.280 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:49:17.747 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:49:18.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:18.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:18.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:18.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:18.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:18.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:18.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:18.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:18.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:18.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:18.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:49:18.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:49:18.106 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:49:18.106 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:18.106 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:18.106 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:18.106 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:18.106 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:18.106 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:18.106 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:23.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:49:23.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:49:23.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:23.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:23.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:23.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:23.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:23.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:49:23.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:23.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:49:23.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:49:23.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:49:23.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:49:23.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:49:23.124 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:23.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:23.124 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:49:23.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:49:23.124 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:49:23.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:23.126 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:49:23.126 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:49:23.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:49:23.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:23.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:23.126 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:49:23.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:49:23.126 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:49:23.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:23.128 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:49:23.128 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:49:23.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:49:23.128 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:23.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:23.128 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:49:23.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:49:23.128 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:49:23.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:23.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:49:23.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:49:23.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:49:23.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:49:23.131 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:49:23.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:23.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:23.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:49:23.610 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:49:23.658 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:23.659 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:49:23.661 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:49:23.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:23.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:23.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:23.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:24.082 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:49:24.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:24.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:24.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:24.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:24.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:49:24.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:24.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:24.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:24.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:24.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:25.026 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:49:25.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:25.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:25.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:25.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:25.494 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:49:25.965 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:49:26.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:26.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:26.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:26.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:26.439 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:49:26.911 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:49:27.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:27.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:27.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:27.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:27.379 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:49:27.848 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:49:28.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:28.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:28.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:28.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:28.313 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:49:28.778 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:49:29.243 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:49:29.709 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:49:30.176 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:49:30.642 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:49:31.108 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:49:31.579 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:49:32.047 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:49:32.515 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:49:32.982 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:49:33.447 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:49:33.914 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:49:34.385 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:49:34.859 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:49:35.331 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:49:35.803 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:49:36.274 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:49:36.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:36.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:36.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:36.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:36.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:36.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:36.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:36.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:36.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:36.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:36.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:49:36.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:49:36.462 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:49:36.462 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2898 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:36.462 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2898 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:36.462 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2898 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:36.462 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2898 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:36.463 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2898 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:36.463 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2898 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:36.463 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2898 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:36.463 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2898 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:36.463 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2899 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:41.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:49:41.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:49:41.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:41.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:41.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:41.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:41.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:41.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:49:41.473 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:41.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:49:41.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:49:41.476 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:49:41.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:49:41.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:49:41.477 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:41.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:41.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:49:41.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:49:41.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:49:41.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:41.480 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:49:41.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:49:41.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:49:41.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:41.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:41.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:49:41.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:49:41.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:49:41.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:41.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:49:41.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:49:41.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:49:41.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:41.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:41.483 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:49:41.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:49:41.483 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:49:41.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:41.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:49:41.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:49:41.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:49:41.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:49:41.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:49:41.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:49:41.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:49:41.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:49:41.487 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:49:41.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:41.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:41.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:41.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:49:41.971 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:49:42.020 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:42.023 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:49:42.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:42.025 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:49:42.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:42.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:42.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:42.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:42.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:42.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:42.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:42.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:42.443 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:49:42.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:42.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:42.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:42.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:42.914 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:49:43.061 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:43.387 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:49:43.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:43.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:43.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:43.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:43.586 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:43.860 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:49:44.108 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:44.332 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:49:44.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:44.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:44.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:44.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:44.803 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:49:45.276 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:49:45.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:45.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:45.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:45.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:45.748 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:49:46.124 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:46.220 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:49:46.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:46.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:46.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:46.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:46.656 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:46.693 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:49:47.166 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:49:47.179 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:47.638 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:49:47.696 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:48.109 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:49:48.582 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:49:49.055 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:49:49.527 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:49:49.702 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:49.998 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:49:50.471 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:49:50.944 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:49:51.416 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:49:51.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:51.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:51.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:51.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:51.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:51.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:51.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:51.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:51.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:51.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:51.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:49:51.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:49:51.756 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2217 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2218 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2218 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2218 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2218 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2218 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2218 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2218 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:51.757 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2218 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:49:56.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:49:56.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:49:56.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:56.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:56.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:56.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:56.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:49:56.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:49:56.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:56.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:49:56.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:49:56.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:49:56.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:49:56.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:49:56.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:56.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:49:56.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:49:56.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:49:56.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:49:56.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:56.775 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:49:56.775 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:49:56.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:49:56.775 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:56.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:49:56.775 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:49:56.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:49:56.775 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:49:56.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:56.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:49:56.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:49:56.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:49:56.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:49:56.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:49:56.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:49:56.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:49:56.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:49:56.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:56.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:49:56.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:49:56.780 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:49:56.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:56.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:56.785 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:49:57.264 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:49:57.308 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:49:57.310 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:49:57.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:57.313 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:49:57.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:57.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:57.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:57.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:57.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:57.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:57.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:57.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:57.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:57.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:57.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:57.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:57.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:57.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:57.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:57.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:57.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:57.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:57.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:57.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:57.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:57.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:57.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:57.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:57.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:57.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:57.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:57.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:57.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:57.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:57.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:57.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:57.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:57.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:57.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:57.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:49:57.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:57.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:57.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:57.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:57.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:57.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:57.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:57.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:57.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:57.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:57.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:57.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:57.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:57.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:57.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:57.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:57.970 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:57.970 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.207 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:49:58.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.301 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:58.302 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:49:58.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.307 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:49:58.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.347 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:58.347 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 02:49:58.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.355 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:49:58.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:58.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:49:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.543 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:58.543 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:49:58.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.560 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:49:58.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.633 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:58.633 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:49:58.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.658 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:49:58.673 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:49:58.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.725 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:58.725 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:49:58.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.741 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:49:58.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:58.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:58.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:58.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:58.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:58.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:58.762 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:58.762 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:49:58.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:58.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:58.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:58.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:58.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:58.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:58.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:58.995 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:49:59.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:59.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:59.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:59.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:59.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:59.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:59.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:59.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:59.053 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:59.053 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:49:59.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.144 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:49:59.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:59.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:59.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:59.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:59.260 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:49:59.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:59.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:59.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:59.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:59.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:59.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:59.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:59.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:59.331 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:59.331 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:49:59.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:59.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:59.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:59.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:59.505 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:49:59.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:59.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:59.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:59.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:59.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:59.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:59.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:59.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:59.572 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:59.572 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:49:59.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.617 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:49:59.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:59.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:49:59.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:59.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:59.757 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:49:59.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:49:59.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:49:59.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:49:59.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:49:59.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:49:59.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:49:59.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:49:59.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:49:59.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:49:59.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:49:59.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:49:59.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:49:59.803 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:49:59.803 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:49:59.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:49:59.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:00.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:50:00.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:50:00.012 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:50:00.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:50:00.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:50:00.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:50:00.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:50:00.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:50:00.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:50:00.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:50:00.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:50:00.033 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:50:00.033 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:50:00.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.084 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:50:00.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:00.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:00.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:50:00.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:50:00.271 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:50:00.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:50:00.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:50:00.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:50:00.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:50:00.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:50:00.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:50:00.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:50:00.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:50:00.322 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:50:00.322 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:50:00.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:00.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:00.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:00.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:50:00.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:50:00.513 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:50:00.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:00.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:00.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:00.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:00.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:00.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:00.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:00.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:00.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:00.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:00.529 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:50:00.529 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=812 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.529 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=812 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=812 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=812 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=812 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=813 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=813 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=813 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=813 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=813 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=813 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=813 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:00.530 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=813 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:05.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:05.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:05.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:05.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:05.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:05.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:05.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:05.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:05.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:05.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:05.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:50:05.541 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:50:05.541 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:50:05.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:05.541 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:05.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:05.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:50:05.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:05.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:50:05.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:05.543 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:50:05.543 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:50:05.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:05.543 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:05.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:05.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:50:05.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:05.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:50:05.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:05.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:50:05.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:50:05.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:05.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:05.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:05.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:50:05.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:05.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:50:05.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:05.546 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:50:05.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:50:05.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:50:05.547 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:50:05.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:05.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:05.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:05.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:50:06.030 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:50:06.071 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:50:06.071 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:50:06.073 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:50:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:06.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:50:06.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:50:06.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:50:06.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:06.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:50:06.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:50:06.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:50:06.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:50:06.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 02:50:06.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:50:06.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:50:06.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:06.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:06.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:06.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:50:06.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:06.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:06.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:06.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:06.976 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:50:07.449 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:50:07.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:07.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:07.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:07.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:07.921 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:50:08.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:50:08.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:50:08.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:08.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:08.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:08.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:08.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:08.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:08.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:08.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:08.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:08.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:08.196 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:50:08.196 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:08.196 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:08.196 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:13.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:13.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:13.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:13.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:13.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:13.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:13.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:13.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:13.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:13.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:13.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:50:13.217 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:50:13.218 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:50:13.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:13.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:13.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:13.219 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:50:13.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:13.220 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:50:13.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:13.221 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:50:13.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:50:13.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:13.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:13.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:13.222 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:50:13.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:13.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:50:13.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:13.224 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:50:13.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:50:13.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:13.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:13.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:13.225 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:50:13.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:13.225 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:50:13.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:13.228 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:50:13.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:50:13.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:50:13.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:50:13.228 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:50:13.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:50:13.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:50:13.229 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:50:13.229 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:50:13.229 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:13.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:13.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:13.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:13.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:13.231 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:50:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:18.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:18.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:18.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:18.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:18.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:18.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:18.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:18.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:18.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:18.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:18.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:50:18.252 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:50:18.252 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:50:18.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:18.253 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:18.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:18.253 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:50:18.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:18.254 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:50:18.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:18.255 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:50:18.255 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:50:18.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:18.255 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:18.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:18.255 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:50:18.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:18.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:50:18.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:18.257 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:50:18.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:50:18.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:18.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:18.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:18.258 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:50:18.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:18.258 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:50:18.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:18.260 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:50:18.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:50:18.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:50:18.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:50:18.260 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:50:18.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:50:18.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:50:18.261 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:50:18.261 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:50:18.261 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:18.266 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:50:18.743 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:50:18.786 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:50:18.788 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:50:18.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:18.790 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:50:19.215 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:50:19.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:19.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:19.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:19.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:19.689 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:50:20.161 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:50:20.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:20.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:20.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:20.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:20.629 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:50:21.092 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:50:21.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:21.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:21.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:21.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:21.556 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:50:22.019 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:50:22.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:22.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:22.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:22.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:22.483 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:50:22.946 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:50:23.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:23.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:23.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:23.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:23.410 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:50:23.873 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:50:24.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:24.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:24.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:24.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:24.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:24.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:24.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:24.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:24.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:24.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:24.279 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:50:24.280 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:24.280 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:24.280 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:24.280 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:24.280 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:29.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:29.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:29.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:29.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:29.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:29.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:29.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:29.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:29.294 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:29.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:29.294 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:50:29.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:50:29.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:50:29.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:29.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:29.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:29.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:50:29.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:29.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:50:29.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:29.300 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:50:29.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:50:29.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:29.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:29.300 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:50:29.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:29.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:29.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:50:29.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:29.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:50:29.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:50:29.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:29.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:29.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:29.304 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:50:29.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:29.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:50:29.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:29.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:50:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:50:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:50:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:50:29.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:50:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:50:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:50:29.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:50:29.307 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:50:29.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:50:29.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:29.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:29.312 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:50:29.790 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:50:29.836 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:50:29.838 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:50:29.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:29.842 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:50:30.261 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:50:30.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:30.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:30.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:30.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:30.732 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:50:31.207 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:50:31.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:31.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:31.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:31.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:31.679 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:50:32.143 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:50:32.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:32.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:32.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:32.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:32.606 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:50:33.071 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:50:33.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:33.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:33.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:33.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:33.534 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:50:33.998 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:50:34.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:34.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:34.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:34.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:34.461 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:50:34.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:34.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:34.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:34.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:34.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:34.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:34.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:34.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:34.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:34.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:34.857 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:50:34.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:34.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:34.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:34.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:34.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:34.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:34.857 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:50:39.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:39.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:39.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:39.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:39.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:39.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:39.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:39.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:39.868 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:39.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:39.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:50:39.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:50:39.871 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:50:39.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:39.871 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:39.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:39.872 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:50:39.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:39.872 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:50:39.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:39.873 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:50:39.873 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:50:39.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:39.873 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:39.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:39.873 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:50:39.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:39.873 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:50:39.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:39.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:50:39.875 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:50:39.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:39.875 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:39.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:39.875 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:50:39.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:39.875 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:50:39.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:39.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:50:39.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:50:39.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:50:39.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:50:39.877 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:50:39.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:50:39.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:50:39.878 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:50:39.878 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:50:39.878 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:39.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:39.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:39.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:39.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:39.880 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:50:44.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:50:44.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:50:44.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:44.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:44.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:44.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:44.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:50:44.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:44.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:44.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:50:44.897 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:50:44.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:50:44.900 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:50:44.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:44.900 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:44.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:50:44.901 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:50:44.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:50:44.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:50:44.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:44.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:50:44.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:50:44.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:44.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:44.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:50:44.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:50:44.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:50:44.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:50:44.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:44.905 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:50:44.905 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:50:44.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:44.905 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:50:44.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:50:44.905 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:50:44.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:50:44.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:50:44.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:44.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:50:44.909 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:50:44.909 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:50:44.909 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:50:44.913 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:50:45.391 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:50:45.438 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:50:45.440 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:50:45.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:50:45.441 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:50:45.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:50:45.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:50:45.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:50:45.863 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:50:45.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:45.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:45.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:45.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:46.338 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:50:46.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:50:46.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:50:46.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:50:46.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:50:46.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:50:46.811 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:50:46.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:46.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:46.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:46.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:47.281 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:50:47.752 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:50:47.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:47.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:47.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:47.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:48.222 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:50:48.689 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:50:48.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:48.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:48.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:48.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:49.155 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:50:49.624 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:50:49.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:50:49.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:50:49.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:50:49.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:50:50.091 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:50:50.558 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:50:51.028 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:50:51.494 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:50:51.961 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:50:52.427 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:50:52.893 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:50:53.359 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:50:53.824 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:50:54.291 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:50:54.763 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:50:55.233 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:50:55.704 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:50:56.175 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:50:56.649 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:50:57.121 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:50:57.593 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:50:58.064 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:50:58.537 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:50:59.009 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:50:59.481 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:50:59.952 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:51:00.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:00.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:00.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:00.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:00.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:00.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:00.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:00.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:00.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:00.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:00.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:00.165 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:51:00.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:00.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:00.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:00.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:00.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:00.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:00.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:00.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:00.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:05.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:05.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:05.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:05.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:05.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:05.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:05.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:05.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:05.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:05.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:05.179 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:51:05.181 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:51:05.181 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:51:05.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:05.181 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:05.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:05.182 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:51:05.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:05.182 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:51:05.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:05.184 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:51:05.184 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:51:05.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:05.184 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:05.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:05.184 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:51:05.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:05.184 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:51:05.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:05.186 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:51:05.186 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:51:05.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:05.186 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:05.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:05.186 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:51:05.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:05.186 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:51:05.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:05.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:51:05.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:51:05.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:51:05.189 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:51:05.189 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:05.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:05.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:51:05.672 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:51:05.713 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:05.716 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:05.717 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:51:05.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:05.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:05.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:05.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:51:05.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:05.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:05.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:05.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:51:05.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:51:05.764 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:05.767 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:05.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:05.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:05.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:05.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:05.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:06.140 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:51:06.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:06.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:06.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:06.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:06.611 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:51:07.082 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:51:07.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:07.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:07.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:07.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:07.555 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:51:08.028 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:51:08.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:08.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:08.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:08.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:08.500 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:51:08.971 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:51:09.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:09.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:09.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:09.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:09.442 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:51:09.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:51:10.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:10.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:10.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:10.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:10.388 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:51:10.859 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:51:11.331 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:51:11.804 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:51:12.277 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:51:12.749 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:51:13.223 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:51:13.695 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:51:13.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:13.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:13.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:13.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:13.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:13.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:13.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:13.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:13.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:13.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:13.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:13.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:13.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:13.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:13.796 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:51:13.796 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:13.797 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:13.797 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:13.797 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:13.797 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:13.797 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:13.797 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:18.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:18.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:18.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:18.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:18.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:18.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:18.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:18.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:18.806 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:18.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:18.806 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:51:18.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:51:18.810 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:51:18.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:18.810 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:18.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:18.811 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:51:18.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:18.811 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:51:18.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:18.813 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:51:18.813 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:51:18.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:18.813 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:18.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:18.813 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:51:18.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:18.814 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:51:18.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:18.816 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:51:18.816 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:51:18.816 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:18.816 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:18.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:18.816 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:51:18.816 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:18.816 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:51:18.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:18.819 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:51:18.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:18.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:51:18.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:51:18.820 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:51:18.821 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:18.825 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:51:19.303 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:51:19.348 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:19.351 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:19.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:19.353 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:51:19.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:19.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:19.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:51:19.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:19.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:19.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:19.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:51:19.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:51:19.396 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:19.399 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:19.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:19.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:19.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:19.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:19.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:19.771 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:51:19.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:19.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:19.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:19.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:20.268 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:51:20.741 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:51:20.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:20.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:20.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:20.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:21.214 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:51:21.687 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:51:21.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:21.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:21.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:21.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:22.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:51:22.632 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:51:22.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:22.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:22.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:22.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:23.105 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:51:23.577 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:51:23.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:23.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:23.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:23.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:24.048 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:51:24.522 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:51:24.995 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:51:25.467 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:51:25.940 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:51:26.413 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:51:26.885 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:51:27.359 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:51:27.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:27.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:27.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:27.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:27.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:27.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:27.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:27.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:27.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:27.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:27.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:27.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:27.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:27.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:27.428 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:51:27.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.428 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.429 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.429 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.429 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.429 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.429 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.429 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.429 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.429 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:27.429 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:32.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:32.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:32.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:32.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:32.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:32.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:32.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:32.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:32.441 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:32.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:32.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:51:32.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:51:32.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:51:32.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:32.445 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:32.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:32.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:51:32.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:32.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:51:32.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:32.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:51:32.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:51:32.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:32.447 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:32.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:32.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:51:32.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:32.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:51:32.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:32.450 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:51:32.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:51:32.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:32.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:32.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:32.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:51:32.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:32.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:51:32.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:32.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:51:32.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:51:32.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:51:32.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:51:32.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:51:32.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:51:32.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:51:32.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:51:32.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:51:32.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:51:32.454 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:51:32.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:32.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:32.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:32.459 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:51:32.937 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:51:32.983 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:32.986 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:32.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:32.988 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:51:33.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:33.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:33.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:51:33.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:33.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:33.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:33.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:51:33.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:51:33.027 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:33.030 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:33.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:33.044 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:51:33.044 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:51:33.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:33.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:33.402 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:51:33.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:33.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:33.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:33.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:33.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:33.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:33.593 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:51:33.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:33.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:33.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:33.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:33.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:33.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:33.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:33.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:33.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:33.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:33.600 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:51:33.600 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:33.600 [WARNING] transceiver.py:257 (TRX3@172.18.205.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:33.600 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:33.600 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:33.601 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:33.601 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:33.601 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:33.601 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:38.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:38.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:38.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:38.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:38.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:38.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:38.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:38.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:38.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:38.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:38.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:51:38.616 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:51:38.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:51:38.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:38.617 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:38.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:51:38.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:38.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:51:38.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:38.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:38.621 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:51:38.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:51:38.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:38.622 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:38.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:38.622 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:51:38.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:38.622 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:51:38.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:38.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:51:38.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:51:38.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:38.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:38.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:38.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:51:38.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:38.627 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:51:38.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:38.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:51:38.631 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:51:38.631 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:51:38.631 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:38.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:38.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:38.636 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:51:39.114 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:51:39.162 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:39.163 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:39.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:39.166 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:51:39.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:39.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:39.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:51:39.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:39.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:39.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:39.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:51:39.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:51:39.206 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:39.209 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:39.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:39.217 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:51:39.217 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:51:39.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:39.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:39.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:51:39.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:39.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:39.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:39.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:39.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:39.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:39.769 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:51:39.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:39.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:39.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:39.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:39.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:39.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:39.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:39.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:39.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:39.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:39.779 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:51:39.779 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.779 [WARNING] transceiver.py:257 (TRX3@172.18.205.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=250 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.780 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.781 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.781 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.781 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:39.781 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:51:44.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:44.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:44.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:44.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:44.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:44.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:44.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:44.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:44.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:44.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:44.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:51:44.794 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:51:44.795 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:51:44.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:44.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:44.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:44.795 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:51:44.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:44.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:51:44.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:44.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:51:44.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:51:44.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:44.797 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:44.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:44.797 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:51:44.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:44.797 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:51:44.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:44.799 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:51:44.799 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:51:44.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:44.799 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:44.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:44.800 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:51:44.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:44.800 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:51:44.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:51:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:51:44.803 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:51:44.803 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:51:44.803 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:44.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:44.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:44.808 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:51:45.284 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:51:45.335 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:45.337 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:45.339 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:51:45.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:45.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:45.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:45.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:51:45.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:45.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:45.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:45.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:51:45.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:51:45.376 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:45.378 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:45.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:45.387 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:51:45.387 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:51:45.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:45.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:45.757 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:51:45.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:45.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:45.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:45.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:45.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:45.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:45.950 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:51:45.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:45.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:45.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:45.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:45.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:45.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:45.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:45.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:45.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:45.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:45.956 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:51:50.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:51:50.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:51:50.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:50.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:50.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:50.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:50.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:51:50.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:50.974 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:50.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:51:50.974 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:51:50.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:51:50.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:51:50.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:50.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:50.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:51:50.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:51:50.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:51:50.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:51:50.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:50.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:51:50.982 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:51:50.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:50.982 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:50.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:51:50.983 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:51:50.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:51:50.983 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:51:50.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:50.984 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:51:50.984 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:51:50.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:50.985 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:51:50.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:51:50.985 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:51:50.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:51:50.985 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:51:50.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:50.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:51:50.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:51:50.988 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:51:50.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:51:50.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:51:50.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:51:50.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:50.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:50.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:50.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:50.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:51:50.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:51:51.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:51:51.516 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:51.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:51.520 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:51.522 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:51:51.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:51.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:51.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:51:51.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:51.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:51.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:51.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:51:51.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:51:51.562 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:51.565 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:51.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:51.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:51.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:51.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:51.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:51.936 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:51:51.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:51.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:51.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:51.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:52.402 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:51:52.870 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:51:52.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:52.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:52.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:52.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:53.344 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:51:53.816 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:51:53.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:53.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:53.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:53.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:54.288 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:51:54.762 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:51:54.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:54.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:54.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:54.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:55.235 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:51:55.707 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:51:55.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:51:55.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:51:55.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:51:55.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:51:56.180 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:51:56.653 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:51:57.125 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:51:57.599 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:51:58.072 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:51:58.544 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:51:59.017 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:51:59.490 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:51:59.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:59.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:59.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:59.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:59.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:51:59.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:51:59.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:51:59.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:59.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:51:59.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:51:59.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:51:59.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:51:59.628 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:51:59.632 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:51:59.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:51:59.641 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:51:59.641 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:51:59.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:59.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:51:59.962 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:52:00.440 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:52:00.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:00.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:00.678 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:52:00.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:00.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:00.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:00.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:00.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:00.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:00.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:00.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:52:00.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:52:00.687 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:52:00.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:00.687 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2094 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.687 [WARNING] transceiver.py:257 (TRX1@172.18.205.20:5700/1) RX TRXD message (ver=1 fn=2095 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.687 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2094 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.687 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2094 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2094 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2094 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2094 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2094 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2094 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2095 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2095 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2095 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2095 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2095 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2095 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2095 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:00.688 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2095 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:05.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:52:05.688 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:52:05.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:05.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:05.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:05.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:05.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:05.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:52:05.700 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:05.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:52:05.701 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:52:05.703 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:52:05.703 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:52:05.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:52:05.704 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:05.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:05.704 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:52:05.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:52:05.705 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:52:05.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:05.706 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:52:05.706 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:52:05.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:52:05.707 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:05.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:05.707 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:52:05.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:52:05.707 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:52:05.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:05.708 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:52:05.708 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:52:05.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:52:05.708 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:05.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:05.708 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:52:05.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:52:05.708 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:52:05.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:05.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:52:05.710 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:52:05.710 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:52:05.710 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:05.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:05.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:05.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:05.714 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:52:06.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:52:06.243 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:06.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:06.247 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:06.250 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:52:06.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:06.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:06.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:52:06.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:06.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:06.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:06.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:52:06.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:52:06.282 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:06.284 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:06.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:06.288 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:52:06.288 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:52:06.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:06.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:06.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:52:06.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:06.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:06.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:06.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:06.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:06.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:06.848 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:52:06.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:06.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:06.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:06.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:06.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:06.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:06.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:06.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:06.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:52:06.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:52:06.854 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=248 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (TRX3@172.18.205.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=248 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=248 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=248 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:06.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:11.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:52:11.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:52:11.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:11.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:11.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:11.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:11.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:11.870 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:52:11.870 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:11.870 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:52:11.871 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:52:11.873 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:52:11.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:52:11.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:52:11.873 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:11.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:11.874 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:52:11.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:52:11.874 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:52:11.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:11.875 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:52:11.875 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:52:11.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:52:11.875 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:11.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:11.876 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:52:11.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:52:11.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:52:11.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:11.877 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:52:11.877 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:52:11.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:52:11.878 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:11.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:11.878 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:52:11.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:52:11.878 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:52:11.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:11.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:52:11.881 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:52:11.881 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:52:11.881 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:11.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:11.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:11.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:11.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:11.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:11.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:11.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:11.885 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:52:12.362 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:52:12.408 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:12.410 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:12.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:12.412 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:52:12.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:12.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:12.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:52:12.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:12.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:12.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:12.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:52:12.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:52:12.454 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:12.457 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:12.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:12.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:12.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:12.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:12.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:12.835 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:52:12.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:12.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:12.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:12.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:13.308 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:52:13.781 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:52:13.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:13.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:13.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:13.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:14.253 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:52:14.726 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:52:14.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:14.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:14.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:14.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:15.199 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:52:15.671 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:52:15.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:15.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:15.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:15.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:16.141 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:52:16.613 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:52:16.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:16.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:16.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:16.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:17.086 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:52:17.558 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:52:18.031 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:52:18.504 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:52:18.976 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:52:19.449 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:52:19.922 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:52:20.394 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:52:20.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:20.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:20.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:20.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:20.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:20.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:20.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:52:20.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:20.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:20.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:20.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:52:20.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:52:20.533 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:20.537 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:20.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:20.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:20.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:20.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:20.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:20.866 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:52:21.337 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:52:21.811 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:52:22.283 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:52:22.755 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:52:23.229 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:52:23.701 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:52:24.173 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:52:24.646 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:52:25.118 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:52:25.590 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:52:26.064 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:52:26.536 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:52:27.009 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:52:27.482 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:52:27.955 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:52:28.427 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:52:28.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:28.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:28.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:28.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:28.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:28.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:28.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:52:28.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:28.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:28.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:28.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:52:28.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:52:28.610 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:28.613 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:28.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:28.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:28.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:28.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:28.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:28.898 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:52:29.371 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:52:29.843 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:52:30.315 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:52:30.786 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:52:31.259 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:52:31.732 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:52:32.205 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:52:32.675 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:52:33.146 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:52:33.616 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:52:34.088 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:52:34.558 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:52:35.029 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:52:35.503 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:52:35.975 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:52:36.447 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:52:36.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:36.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:36.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:36.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:36.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:36.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:36.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:52:36.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:36.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:36.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:36.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:52:36.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:52:36.680 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:36.683 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:36.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:36.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:36.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:36.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:36.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:36.918 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:52:37.389 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:52:37.863 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:52:38.335 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:52:38.802 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:52:39.273 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:52:39.746 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:52:40.219 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:52:40.691 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:52:41.165 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:52:41.637 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:52:42.109 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:52:42.583 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:52:43.055 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:52:43.528 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:52:44.001 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:52:44.473 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:52:44.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:44.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:44.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:44.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:44.692 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=7087 tn=2 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:44.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:44.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:44.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:44.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:44.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:44.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:44.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:44.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:44.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:52:44.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:52:44.700 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:52:44.700 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7089 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:44.700 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7089 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:44.700 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7089 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:44.700 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7089 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:44.700 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7089 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:44.700 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7089 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:44.700 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7089 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:49.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:52:49.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:52:49.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:49.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:49.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:49.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:49.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:49.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:52:49.711 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:49.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:52:49.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:52:49.713 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:52:49.713 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:52:49.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:52:49.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:49.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:49.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:52:49.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:52:49.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:52:49.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:49.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:52:49.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:52:49.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:52:49.715 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:49.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:49.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:52:49.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:52:49.716 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:52:49.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:49.717 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:52:49.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:52:49.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:52:49.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:49.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:49.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:52:49.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:52:49.718 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:52:49.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:49.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:52:49.721 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:52:49.721 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:52:49.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:49.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:49.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:49.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:52:50.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:52:50.253 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:50.255 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:50.257 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:52:50.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:50.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:50.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:50.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:52:50.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:50.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:50.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:50.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:52:50.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:52:50.342 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:50.346 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:50.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:50.360 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:52:50.360 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:52:50.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:50.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:50.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:52:50.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:50.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:50.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:50.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:51.150 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:52:51.622 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:52:51.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:51.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:51.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:51.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:51.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:51.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:51.852 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:52:51.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:51.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:51.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:51.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:51.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:51.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:51.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:51.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:51.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:52:51.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:52:51.859 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:52:51.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=461 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:51.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=461 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:51.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:51.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:51.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:51.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:51.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:52:56.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:52:56.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:52:56.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:56.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:56.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:56.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:56.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:56.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:52:56.873 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:56.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:52:56.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:52:56.876 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:52:56.876 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:52:56.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:52:56.876 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:56.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:56.877 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:52:56.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:52:56.877 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:52:56.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:56.878 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:52:56.879 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:52:56.879 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:52:56.879 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:56.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:56.879 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:52:56.879 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:52:56.879 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:52:56.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:56.881 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:52:56.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:52:56.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:52:56.881 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:52:56.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:56.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:52:56.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:52:56.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:52:56.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:56.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:52:56.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:52:56.884 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:52:56.884 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:52:56.884 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:56.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:52:56.889 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:52:57.367 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:52:57.407 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:57.408 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:57.409 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:52:57.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:57.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:57.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:57.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:52:57.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:57.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:52:57.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:52:57.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:52:57.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:52:57.459 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:52:57.463 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:52:57.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:52:57.476 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:52:57.476 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:52:57.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:57.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:52:57.832 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:52:57.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:57.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:57.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:57.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:58.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:52:58.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:52:58.023 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:52:58.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:52:58.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:52:58.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:52:58.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:52:58.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:52:58.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:52:58.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:52:58.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:52:58.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:52:58.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:52:58.031 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:53:03.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:03.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:03.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:03.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:03.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:03.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:03.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:03.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:03.045 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:03.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:03.046 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:53:03.049 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:53:03.049 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:53:03.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:03.049 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:03.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:03.050 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:53:03.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:03.050 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:53:03.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:03.051 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:53:03.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:53:03.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:03.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:03.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:03.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:53:03.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:03.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:53:03.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:03.054 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:53:03.054 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:53:03.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:03.054 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:03.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:03.054 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:53:03.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:03.054 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:53:03.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:03.056 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:53:03.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:53:03.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:53:03.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:53:03.056 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:53:03.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:53:03.057 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:53:03.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:03.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:03.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:03.062 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:53:03.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:53:03.585 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:53:03.586 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:53:03.588 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:53:03.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:53:03.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:53:03.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:53:03.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:53:03.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:03.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:53:03.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:53:03.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:53:03.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:53:03.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:53:03.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:53:03.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:53:03.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:03.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:04.010 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:53:04.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:04.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:04.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:04.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:04.481 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:53:04.954 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:53:05.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:05.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:05.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:05.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:05.427 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:53:05.899 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:53:06.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:06.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:06.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:06.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:06.373 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:53:06.845 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:53:07.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:07.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:07.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:07.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:07.317 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:53:07.791 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:53:08.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:08.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:08.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:08.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:08.264 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:53:08.736 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:53:09.209 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:53:09.682 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:53:10.154 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:53:10.628 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:53:11.101 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:53:11.572 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:53:11.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:53:11.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:11.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:53:11.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:53:11.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:11.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:11.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:11.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:11.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:11.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:11.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:11.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:11.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:11.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:11.671 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:11.672 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:16.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:16.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:16.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:16.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:16.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:16.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:16.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:16.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:16.687 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:16.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:16.687 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:53:16.690 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:53:16.691 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:53:16.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:16.691 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:16.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:16.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:53:16.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:16.692 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:53:16.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:16.693 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:53:16.693 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:53:16.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:16.693 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:16.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:16.694 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:53:16.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:16.694 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:53:16.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:16.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:53:16.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:53:16.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:16.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:16.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:16.696 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:53:16.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:16.696 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:53:16.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:53:16.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:53:16.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:53:16.700 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:53:16.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:16.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:16.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:16.705 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:53:17.183 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:53:17.227 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:53:17.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:53:17.230 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:53:17.232 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:53:17.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:53:17.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:53:17.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:53:17.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:17.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:53:17.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:53:17.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:53:17.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:53:17.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:53:17.287 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:53:17.287 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:53:17.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:17.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:17.655 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:53:17.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:17.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:17.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:17.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:18.128 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:53:18.602 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:53:18.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:18.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:18.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:18.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:19.074 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:53:19.547 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:53:19.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:19.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:19.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:19.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:20.020 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:53:20.492 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:53:20.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:20.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:20.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:20.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:20.965 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:53:21.439 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:53:21.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:21.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:21.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:21.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:21.912 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:53:22.385 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:53:22.858 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:53:23.323 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:53:23.788 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:53:24.252 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:53:24.716 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:53:25.180 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:53:25.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:53:25.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:25.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:53:25.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:53:25.297 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:53:25.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:25.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:25.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:25.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:25.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:25.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:25.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:25.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:25.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:25.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:25.318 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:53:25.319 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1867 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.319 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1867 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.319 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1867 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.319 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1867 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.319 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1867 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.319 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1867 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.319 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1867 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.320 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1867 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.320 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1868 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.320 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1868 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.320 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1868 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.320 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1868 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:25.320 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1868 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:30.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:30.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:30.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:30.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:30.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:30.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:30.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:30.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:30.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:30.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:30.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:53:30.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:53:30.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:53:30.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:30.338 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:30.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:30.339 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:53:30.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:30.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:53:30.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:30.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:53:30.341 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:53:30.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:30.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:30.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:30.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:53:30.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:30.342 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:53:30.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:30.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:53:30.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:53:30.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:30.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:30.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:30.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:53:30.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:30.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:53:30.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:30.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:53:30.351 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:53:30.351 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:53:30.351 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:30.356 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:53:30.833 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:53:30.881 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:53:30.883 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:53:30.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:53:30.886 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:53:30.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:53:30.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:53:30.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:53:30.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:30.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:53:30.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:53:30.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:53:30.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:53:31.305 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:53:31.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:31.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:31.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:31.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:31.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:53:32.249 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:53:32.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:32.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:32.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:32.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:32.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:53:33.188 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:53:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:33.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:33.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:33.662 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:53:34.134 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:53:34.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:34.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:34.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:34.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:34.606 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:53:35.077 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:53:35.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:35.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:35.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:35.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:35.550 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:53:36.023 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:53:36.495 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:53:36.966 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:53:37.439 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:53:37.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:53:37.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:53:37.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:37.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:37.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:37.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:37.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:37.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:37.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:37.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:37.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:37.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:37.570 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:53:37.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:37.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:37.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:37.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:37.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:37.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:37.570 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:42.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:42.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:42.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:42.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:42.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:42.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:42.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:42.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:42.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:42.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:42.589 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:53:42.593 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:53:42.593 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:53:42.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:42.594 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:42.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:42.595 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:53:42.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:42.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:53:42.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:42.597 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:53:42.597 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:53:42.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:42.598 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:42.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:42.598 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:53:42.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:42.599 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:53:42.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:42.600 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:53:42.600 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:53:42.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:42.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:42.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:42.601 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:53:42.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:42.601 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:53:42.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:53:42.605 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:53:42.605 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:53:42.605 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:42.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:42.609 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:53:43.088 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:53:43.134 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:53:43.135 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:53:43.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:53:43.137 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:53:43.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:53:43.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:53:43.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:53:43.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:43.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:53:43.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:53:43.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:53:43.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:53:43.560 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:53:43.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:43.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:43.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:43.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:44.031 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:53:44.504 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:53:44.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:44.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:44.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:44.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:44.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:53:45.448 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:53:45.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:45.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:45.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:45.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:45.920 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:53:46.393 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:53:46.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:46.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:46.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:46.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:46.865 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:53:47.338 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:53:47.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:47.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:47.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:47.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:47.811 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:53:47.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:47.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:47.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:47.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:47.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:47.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:47.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:47.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:47.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:47.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:47.833 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:47.833 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:47.833 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:47.833 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:47.833 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:47.833 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:47.833 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:47.834 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:53:48.290 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:53:48.769 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:53:49.250 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:53:49.731 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:53:50.211 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:53:50.691 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:53:51.171 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:53:51.652 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:53:52.129 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:53:52.606 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:53:52.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:52.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:52.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:52.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:53:52.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:53:52.836 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:53:52.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:52.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:52.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:52.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:52.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:52.846 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:52.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:52.846 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:53:52.848 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:53:52.848 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:53:52.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:52.848 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:52.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:52.848 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:53:52.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:52.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:53:52.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:52.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:53:52.850 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:53:52.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:52.850 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:52.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:52.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:53:52.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:52.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:53:52.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:52.852 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:53:52.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:53:52.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:52.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:52.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:52.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:53:52.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:52.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:53:52.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:52.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:53:52.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:53:52.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:53:52.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:53:52.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:53:52.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:53:52.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:53:52.857 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:53:52.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:52.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:52.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:52.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:52.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:52.858 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:53:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:57.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:53:57.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:53:57.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:57.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:57.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:57.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:57.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:53:57.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:57.875 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:57.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:53:57.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:53:57.878 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:53:57.878 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:53:57.878 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:57.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:57.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:53:57.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:53:57.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:53:57.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:53:57.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:57.881 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:53:57.881 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:53:57.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:57.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:57.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:53:57.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:53:57.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:53:57.882 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:53:57.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:57.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:53:57.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:53:57.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:57.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:53:57.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:53:57.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:53:57.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:53:57.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:53:57.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:53:57.888 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:53:57.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:53:57.889 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:53:57.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:57.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:57.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:57.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:57.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:53:57.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:53:58.371 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:53:58.421 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:53:58.424 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:53:58.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:53:58.426 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:53:58.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:53:58.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:53:58.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:53:58.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:53:58.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:53:58.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:53:58.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:53:58.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:53:58.839 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:53:58.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:58.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:58.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:58.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:53:59.310 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:53:59.784 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:53:59.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:53:59.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:53:59.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:53:59.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:00.256 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:54:00.728 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:54:00.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:00.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:00.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:00.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:01.202 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:54:01.674 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:54:01.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:01.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:01.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:01.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:02.146 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:54:02.617 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:54:02.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:02.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:02.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:02.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:03.090 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:54:03.558 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:54:04.029 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:54:04.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:04.500 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:54:04.973 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:54:05.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:05.446 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:54:05.918 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:54:06.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:06.389 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:54:06.862 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:54:07.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:07.334 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:54:07.814 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:54:08.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:08.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:08.287 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:54:08.761 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:54:09.233 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:54:09.706 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:54:10.179 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:54:10.651 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:54:11.125 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:54:11.597 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:54:12.070 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:54:12.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:12.543 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:54:13.015 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:54:13.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:13.489 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:54:13.961 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:54:14.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:14.434 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:54:14.904 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:54:15.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:15.378 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:54:15.850 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:54:16.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:16.322 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:54:16.793 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:54:17.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:17.266 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:54:17.739 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:54:18.211 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:54:18.682 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:54:19.155 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:54:19.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:54:19.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:54:19.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:19.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:19.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:19.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:19.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:54:19.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:19.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:54:19.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:54:19.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:54:19.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:54:19.286 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:54:19.286 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:19.286 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:19.286 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:19.286 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:19.286 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4621 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:24.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:54:24.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:54:24.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:54:24.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:54:24.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:54:24.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:24.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:24.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:54:24.309 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:24.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:54:24.310 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:54:24.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:54:24.313 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:54:24.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:54:24.314 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:24.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:54:24.315 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:54:24.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:54:24.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:54:24.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:24.316 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:54:24.316 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:54:24.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:54:24.316 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:24.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:54:24.316 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:54:24.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:54:24.317 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:54:24.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:24.318 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:54:24.318 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:54:24.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:54:24.319 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:24.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:54:24.319 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:54:24.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:54:24.319 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:54:24.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:24.321 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:54:24.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:54:24.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:54:24.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:54:24.321 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:54:24.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:54:24.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:54:24.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:54:24.322 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:54:24.322 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:54:24.322 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:24.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:24.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:24.327 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:54:24.804 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:54:24.847 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:54:24.850 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:54:24.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:54:24.852 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:54:24.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:54:24.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:54:24.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:54:24.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:24.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:54:24.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:54:24.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:54:24.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:54:24.896 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:54:24.900 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:54:24.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:54:24.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:54:24.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:54:24.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:24.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:25.269 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:54:25.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:25.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:25.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:25.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:25.733 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:54:26.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:54:26.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:26.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:54:26.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:54:26.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:26.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:26.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:26.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:26.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:54:26.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:26.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:54:26.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:54:26.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:54:26.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:54:26.187 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:54:31.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:54:31.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:54:31.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:54:31.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:54:31.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:54:31.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:31.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:31.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:54:31.197 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:31.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:54:31.197 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:54:31.198 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:54:31.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:54:31.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:54:31.198 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:31.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:54:31.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:54:31.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:54:31.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:54:31.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:31.200 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:54:31.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:54:31.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:54:31.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:31.200 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:54:31.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:54:31.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:54:31.200 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:54:31.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:31.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:54:31.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:54:31.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:54:31.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:31.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:54:31.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:54:31.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:54:31.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:54:31.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:54:31.203 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:54:31.203 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:54:31.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:31.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:31.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:31.208 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:54:31.686 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:54:31.726 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:54:31.728 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:54:31.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:54:31.730 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:54:31.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:54:31.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:54:31.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:54:31.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:31.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:54:31.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:54:31.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:54:31.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:54:31.778 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:54:31.782 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:54:31.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:54:31.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:54:31.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:54:31.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:31.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:32.157 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:54:32.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:32.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:32.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:32.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:32.631 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:54:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 02:54:33.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:33.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:54:33.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:54:33.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:33.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:33.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:33.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:33.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:54:33.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:33.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:54:33.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:54:33.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:54:33.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:54:33.088 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:54:33.088 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:33.088 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:33.088 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:33.088 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:33.088 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:33.088 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:33.088 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:33.088 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:54:38.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:54:38.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:54:38.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:54:38.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:54:38.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:54:38.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:38.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:54:38.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:54:38.119 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:38.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:54:38.119 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:54:38.121 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:54:38.121 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:54:38.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:54:38.121 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:38.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:54:38.122 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:54:38.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:54:38.123 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:54:38.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:38.125 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:54:38.125 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:54:38.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:54:38.125 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:38.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:54:38.126 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:54:38.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:54:38.126 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:54:38.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:38.128 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:54:38.128 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:54:38.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:54:38.128 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:54:38.128 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:54:38.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:54:38.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:54:38.128 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:54:38.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:54:38.132 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:54:38.132 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:54:38.132 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:54:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:54:38.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:54:38.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:54:38.660 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:54:38.663 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:54:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:54:38.666 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:54:38.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:54:38.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:54:38.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:54:38.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:38.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:54:38.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:54:38.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:54:38.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:54:38.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:54:38.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:54:38.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:54:38.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:38.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:39.084 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:54:39.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:39.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:39.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:39.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:39.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:54:40.028 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:54:40.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:40.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:40.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:40.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:40.501 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:54:40.973 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:54:41.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:41.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:41.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:41.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:41.447 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:54:41.920 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:54:42.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:42.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:42.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:42.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:42.392 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:54:42.865 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:54:43.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:54:43.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:54:43.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:54:43.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:54:43.338 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:54:43.810 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:54:44.284 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:54:44.756 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:54:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:54:45.700 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:54:46.173 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:54:46.646 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:54:47.118 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:54:47.589 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:54:48.062 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:54:48.535 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:54:49.007 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:54:49.478 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:54:49.948 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:54:50.414 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:54:50.878 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:54:51.342 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:54:51.808 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:54:52.274 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:54:52.744 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:54:53.215 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:54:53.682 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:54:54.151 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:54:54.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:54:54.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:54.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:54:54.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:54:54.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:54:54.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:54:54.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:54:54.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:54.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:54:54.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:54:54.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:54:54.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:54:54.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:54:54.473 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:54:54.473 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 02:54:54.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:54.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:54:54.619 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:54:55.085 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:54:55.551 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:54:56.021 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:54:56.488 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:54:56.954 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:54:57.424 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:54:57.891 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:54:58.362 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:54:58.832 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:54:59.302 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:54:59.770 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:55:00.236 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:55:00.705 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:55:01.175 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:55:01.644 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:55:02.109 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:55:02.574 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:55:03.037 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:55:03.501 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 02:55:03.964 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 02:55:04.428 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 02:55:04.894 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 02:55:05.362 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 02:55:05.831 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 02:55:06.299 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 02:55:06.769 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 02:55:07.238 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 02:55:07.704 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 02:55:08.172 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 02:55:08.639 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 02:55:09.103 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 02:55:09.568 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 02:55:09.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:55:09.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:09.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:55:09.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:55:09.754 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:55:09.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:55:09.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:55:09.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:55:09.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:09.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:55:09.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:55:09.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:55:09.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:55:09.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:55:09.810 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:55:09.810 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 02:55:09.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:09.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:10.034 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 02:55:10.504 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 02:55:10.971 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 02:55:11.440 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 02:55:11.908 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 02:55:12.372 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 02:55:12.835 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 02:55:13.299 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 02:55:13.762 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 02:55:14.228 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 02:55:14.700 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 02:55:15.171 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 02:55:15.638 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 02:55:16.104 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 02:55:16.570 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 02:55:17.044 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 02:55:17.517 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 02:55:17.989 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 02:55:18.462 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 02:55:18.935 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 02:55:19.407 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 02:55:19.880 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 02:55:20.353 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 02:55:20.825 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 02:55:21.298 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 02:55:21.771 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 02:55:22.243 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 02:55:22.717 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 02:55:23.189 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 02:55:23.662 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 02:55:24.136 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 02:55:24.608 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 02:55:25.082 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 02:55:25.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:55:25.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:25.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:55:25.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:55:25.154 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:55:25.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:55:25.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:55:25.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:55:25.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:25.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:55:25.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:55:25.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:55:25.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:55:25.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:55:25.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:55:25.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:55:25.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:55:25.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:25.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:25.555 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 02:55:26.027 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 02:55:26.498 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 02:55:26.971 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 02:55:27.444 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 02:55:27.916 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 02:55:28.387 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 02:55:28.860 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 02:55:29.333 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 02:55:29.805 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 02:55:30.279 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 02:55:30.751 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 02:55:31.224 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 02:55:31.697 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 02:55:32.170 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 02:55:32.642 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 02:55:33.113 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 02:55:33.584 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 02:55:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 02:55:34.530 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 02:55:35.002 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 02:55:35.475 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 02:55:35.948 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 02:55:36.421 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 02:55:36.894 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 02:55:37.367 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 02:55:37.839 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 02:55:38.310 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 02:55:38.781 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 02:55:39.254 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 02:55:39.726 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 02:55:40.199 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 02:55:40.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:55:40.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:40.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:55:40.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:55:40.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:55:40.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:55:40.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:55:40.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:55:40.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:55:40.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:55:40.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:55:40.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:55:40.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:55:40.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:55:40.646 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.646 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.647 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.647 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:40.647 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:55:45.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:55:45.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:55:45.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:55:45.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:55:45.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:55:45.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:55:45.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:55:45.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:55:45.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:55:45.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:55:45.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:55:45.656 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:55:45.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:55:45.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:55:45.657 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:55:45.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:55:45.657 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:55:45.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:55:45.658 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:55:45.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:55:45.659 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:55:45.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:55:45.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:55:45.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:55:45.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:55:45.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:55:45.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:55:45.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:55:45.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:55:45.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:55:45.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:55:45.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:55:45.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:55:45.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:55:45.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:55:45.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:55:45.662 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:55:45.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:55:45.664 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:55:45.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:55:45.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:55:45.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:55:45.664 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:55:45.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:55:45.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:55:45.665 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:55:45.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:45.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:45.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:55:45.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:45.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:45.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:55:45.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:55:45.666 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:55:45.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:45.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:45.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:50.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:55:50.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:55:50.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:55:50.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:55:50.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:55:50.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:55:50.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:55:50.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:55:50.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:55:50.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:55:50.684 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:55:50.687 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:55:50.687 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:55:50.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:55:50.688 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:55:50.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:55:50.688 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:55:50.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:55:50.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:55:50.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:55:50.690 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:55:50.690 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:55:50.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:55:50.690 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:55:50.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:55:50.690 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:55:50.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:55:50.690 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:55:50.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:55:50.692 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:55:50.692 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:55:50.692 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:55:50.692 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:55:50.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:55:50.692 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:55:50.692 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:55:50.692 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:55:50.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:50.695 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:55:50.695 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:55:50.695 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:55:50.696 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:55:50.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:55:50.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:55:50.700 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:55:51.179 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:55:51.222 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:55:51.224 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:55:51.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:55:51.226 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:55:51.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:55:51.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:55:51.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:55:51.257 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:55:51.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:51.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:55:51.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:55:51.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:55:51.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:55:51.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:55:51.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:55:51.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:55:51.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:51.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:55:51.646 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:55:51.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:55:51.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:55:51.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:55:51.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:55:52.117 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:55:52.588 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:55:52.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:55:52.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:55:52.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:55:52.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:55:53.062 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:55:53.534 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:55:53.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:55:53.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:55:53.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:55:53.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:55:54.006 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:55:54.480 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:55:54.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:55:54.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:55:54.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:55:54.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:55:54.952 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:55:55.425 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:55:55.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:55:55.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:55:55.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:55:55.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:55:55.898 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:55:56.370 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:55:56.842 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:55:57.315 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:55:57.788 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:55:58.261 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:55:58.734 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:55:59.207 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:55:59.679 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:56:00.150 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:56:00.623 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:56:01.096 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:56:01.569 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:56:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:01.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:01.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:56:01.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:56:01.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:01.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:01.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:01.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:01.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:01.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:01.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:01.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:01.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:56:01.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:56:01.673 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:56:01.673 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2370 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.673 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2370 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.673 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2370 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.673 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2370 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.673 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2370 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:01.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:06.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:56:06.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:56:06.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:06.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:06.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:06.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:06.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:06.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:56:06.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:06.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:56:06.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:56:06.692 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:56:06.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:56:06.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:56:06.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:06.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:06.693 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:56:06.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:56:06.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:56:06.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:06.695 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:56:06.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:56:06.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:56:06.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:06.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:06.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:56:06.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:56:06.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:56:06.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:06.698 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:56:06.698 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:56:06.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:56:06.698 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:06.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:06.698 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:56:06.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:56:06.698 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:56:06.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:06.700 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:56:06.701 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:56:06.701 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:56:06.701 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:06.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:06.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:06.706 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:56:07.185 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:56:07.228 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:56:07.230 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:56:07.233 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:56:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:07.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:56:07.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:56:07.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:56:07.279 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:56:07.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:07.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:56:07.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:56:07.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:56:07.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:56:07.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:07.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:56:07.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:56:07.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:07.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:07.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:56:07.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:07.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:07.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:07.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:08.130 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:56:08.603 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:56:08.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:08.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:08.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:08.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:09.076 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:56:09.549 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:56:09.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:09.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:09.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:09.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:10.022 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:56:10.494 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:56:10.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:10.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:10.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:10.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:10.965 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:56:11.438 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:56:11.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:11.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:11.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:11.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:11.911 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:56:12.383 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:56:12.856 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:56:13.329 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:56:13.802 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:56:14.273 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:56:14.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:56:15.219 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:56:15.691 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:56:16.164 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:56:16.637 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:56:17.110 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:56:17.583 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:56:18.056 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:56:18.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:18.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:18.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:56:18.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:56:18.150 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=2470 tn=3 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:18.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:18.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:18.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:18.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:18.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:18.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:18.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:18.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:18.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:56:18.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:56:18.161 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:56:18.161 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:18.161 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:18.161 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:18.161 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:18.161 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:23.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:56:23.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:56:23.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:23.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:23.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:23.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:23.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:23.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:56:23.176 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:23.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:56:23.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:56:23.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:56:23.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:56:23.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:56:23.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:23.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:23.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:56:23.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:56:23.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:56:23.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:23.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:56:23.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:56:23.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:56:23.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:23.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:23.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:56:23.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:56:23.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:56:23.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:23.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:56:23.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:56:23.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:56:23.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:23.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:23.185 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:56:23.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:56:23.185 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:56:23.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:56:23.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:56:23.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:56:23.189 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:56:23.189 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:23.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:23.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:56:23.669 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:56:23.715 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:56:23.715 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:56:23.717 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:56:23.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:23.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:56:23.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:56:23.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:56:23.760 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:56:23.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:23.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:56:23.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:56:23.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:56:23.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:56:23.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:23.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:56:23.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:56:23.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:23.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:24.141 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:56:24.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:24.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:24.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:24.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:24.612 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:56:25.085 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:56:25.107 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:25.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:25.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:25.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:25.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:25.558 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:56:26.030 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:56:26.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:26.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:26.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:26.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:26.504 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:56:26.976 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:56:27.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:27.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:27.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:27.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:27.449 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:56:27.922 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:56:28.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:28.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:28.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:28.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:28.395 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:56:28.867 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:56:29.341 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:56:29.813 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:56:30.286 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:56:30.757 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:56:31.230 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:56:31.702 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:56:32.175 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:56:32.648 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:56:33.120 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:56:33.588 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:56:34.059 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:56:34.532 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:56:35.005 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:56:35.477 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:56:35.948 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:56:36.422 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:56:36.894 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:56:37.367 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:56:37.840 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:56:38.313 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:56:38.785 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:56:39.256 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:56:39.727 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:56:40.200 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:56:40.673 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:56:41.145 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:56:41.616 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:56:42.089 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:56:42.562 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:56:43.034 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:56:43.507 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:56:43.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:43.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:43.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:56:43.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:56:43.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:43.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:43.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:43.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:43.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:43.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:43.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:43.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:43.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:56:43.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:56:43.854 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:56:43.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4462 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4462 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4462 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4462 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4462 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.854 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4462 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.855 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4462 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.855 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4463 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.855 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4463 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.855 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4463 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.855 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4463 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.855 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4463 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.855 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4463 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.855 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4463 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:43.855 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4463 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:48.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:56:48.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:56:48.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:48.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:48.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:48.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:48.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:48.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:56:48.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:48.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:56:48.865 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:56:48.868 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:56:48.868 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:56:48.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:56:48.868 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:48.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:48.869 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:56:48.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:56:48.869 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:56:48.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:48.871 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:56:48.871 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:56:48.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:56:48.871 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:48.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:48.871 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:56:48.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:56:48.871 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:56:48.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:48.873 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:56:48.873 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:56:48.873 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:56:48.873 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:56:48.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:48.873 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:56:48.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:56:48.874 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:56:48.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:48.876 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:56:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:56:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:56:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:56:48.876 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:56:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:56:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:56:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:56:48.877 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:56:48.877 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:56:48.877 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:48.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:56:48.882 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:56:49.361 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:56:49.407 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:56:49.409 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:56:49.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:49.411 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:56:49.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:56:49.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:56:49.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:56:49.439 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:56:49.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:49.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:56:49.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:56:49.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:56:49.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:56:49.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:49.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:56:49.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:56:49.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:49.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:49.828 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:56:49.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:49.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:49.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:49.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:50.299 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:56:50.314 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:50.773 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:56:50.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:50.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:50.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:50.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:51.246 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:56:51.280 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:51.718 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:56:51.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:51.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:51.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:51.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:52.190 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:56:52.240 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:52.662 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:56:52.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:52.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:52.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:52.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:53.135 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:56:53.206 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:53.607 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:56:53.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:53.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:53.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:53.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:54.078 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:56:54.166 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:54.551 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:56:55.024 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:56:55.132 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:55.496 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:56:55.970 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:56:56.092 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:56.442 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:56:56.915 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:56:57.058 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:57.386 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:56:57.859 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:56:58.018 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:58.331 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:56:58.803 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:56:58.984 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:56:59.274 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:56:59.745 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:56:59.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:56:59.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:56:59.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:56:59.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:56:59.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:56:59.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:56:59.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:56:59.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:56:59.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:56:59.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:56:59.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:56:59.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:56:59.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:56:59.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:56:59.858 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:56:59.858 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:59.858 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:59.858 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:59.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:59.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:59.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:56:59.859 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2372 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:04.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:57:04.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:57:04.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:04.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:04.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:04.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:04.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:04.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:04.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:04.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:04.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:57:04.872 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:57:04.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:57:04.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:04.873 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:04.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:04.873 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:57:04.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:04.874 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:57:04.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:04.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:57:04.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:57:04.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:04.877 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:04.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:04.877 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:57:04.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:04.877 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:57:04.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:04.880 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:57:04.880 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:57:04.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:04.880 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:04.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:04.880 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:57:04.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:04.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:57:04.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:57:04.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:57:04.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:57:04.886 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:57:04.886 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:57:04.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:04.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:04.891 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:57:05.370 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:57:05.421 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:57:05.424 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:57:05.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:05.426 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:57:05.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:05.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:05.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:57:05.467 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:57:05.469 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:57:05.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:05.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:05.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:05.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:57:05.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:57:05.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:05.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:05.521 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:57:05.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:05.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:05.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:05.843 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:57:05.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:05.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:05.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:06.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:57:06.787 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:57:06.808 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:57:06.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:06.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:06.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:07.260 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:57:07.732 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:57:07.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:07.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:07.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:07.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:08.206 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:57:08.678 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:57:08.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:08.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:08.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:08.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:09.151 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:57:09.624 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:57:09.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:09.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:09.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:09.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:10.097 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:57:10.569 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:57:11.040 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:57:11.513 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:57:11.986 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:57:12.458 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:57:12.929 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:57:13.402 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:57:13.875 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:57:14.347 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:57:14.820 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:57:15.293 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:57:15.766 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:57:16.239 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:57:16.446 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:57:16.712 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:57:17.184 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:57:17.655 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:57:18.126 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:57:18.596 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:57:19.067 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:57:19.539 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:57:20.009 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:57:20.482 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:57:20.955 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:57:21.427 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:57:21.900 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:57:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:22.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:22.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:22.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:22.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:22.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:22.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:22.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:22.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:22.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:22.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:22.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:22.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:57:22.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:57:22.238 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:57:22.238 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3748 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:22.238 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3748 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:22.238 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3748 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:22.238 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3748 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:22.238 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3748 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:22.238 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3748 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:22.238 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3748 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:22.238 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3748 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:27.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:57:27.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:57:27.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:27.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:27.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:27.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:27.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:27.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:27.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:27.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:27.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:57:27.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:57:27.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:57:27.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:27.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:27.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:27.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:57:27.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:27.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:57:27.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:27.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:57:27.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:57:27.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:27.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:27.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:27.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:57:27.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:27.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:57:27.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:27.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:57:27.261 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:57:27.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:27.261 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:27.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:27.261 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:57:27.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:27.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:57:27.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:27.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:57:27.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:57:27.264 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:57:27.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:27.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:27.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:27.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:27.269 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:57:27.748 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:57:27.793 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:57:27.795 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:57:27.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:27.797 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:57:27.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:27.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:27.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:57:27.839 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:57:27.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:27.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:27.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:27.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:57:27.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:57:27.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:27.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:27.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:27.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:27.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:28.216 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:57:28.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:28.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:28.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:28.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:28.686 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:57:29.157 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:57:29.181 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:57:29.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:29.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:29.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:29.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:29.631 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:57:30.103 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:57:30.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:30.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:30.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:30.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:30.576 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:57:31.049 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:57:31.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:31.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:31.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:31.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:31.522 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:57:31.994 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:57:32.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:32.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:32.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:32.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:32.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:57:32.938 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:57:33.411 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:57:33.883 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:57:34.356 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:57:34.829 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:57:35.301 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:57:35.772 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:57:36.246 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:57:36.718 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:57:37.190 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:57:37.661 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:57:37.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:37.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:37.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:37.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:37.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:37.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:37.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:37.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:37.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:37.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:37.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:37.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:57:37.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:57:37.925 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:57:37.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2302 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2303 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2303 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:37.925 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:42.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:57:42.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:57:42.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:42.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:42.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:42.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:42.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:42.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:42.940 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:42.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:42.940 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:57:42.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:57:42.944 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:57:42.944 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:42.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:42.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:42.945 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:57:42.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:42.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:57:42.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:42.947 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:57:42.947 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:57:42.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:42.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:42.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:42.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:57:42.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:42.948 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:57:42.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:42.950 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:57:42.950 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:57:42.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:42.950 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:42.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:42.950 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:57:42.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:42.950 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:57:42.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:57:42.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:57:42.954 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:57:42.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:42.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:42.959 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:57:43.437 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:57:43.477 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:57:43.477 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:57:43.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:43.479 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:57:43.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:43.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:43.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:57:43.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:43.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:43.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:43.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:57:43.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:57:43.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:43.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:43.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:43.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:43.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:43.909 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:57:43.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:43.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:43.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:43.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:43.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:43.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:43.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:57:43.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:43.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:43.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:43.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:43.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:43.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:43.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:43.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:57:43.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:57:43.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:43.975 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:57:43.975 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:57:43.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:43.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:44.381 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:57:44.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:44.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:44.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:44.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:44.640 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:57:44.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:44.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:44.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:57:44.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:44.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:44.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:44.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:57:44.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:57:44.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:44.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:44.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:44.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:44.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:44.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:44.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:44.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:44.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:44.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:44.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:44.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:57:44.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:44.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:44.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:44.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:57:44.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:57:44.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:44.854 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:57:44.856 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:57:44.856 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:57:44.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:44.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:44.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:44.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:44.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:44.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:45.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:45.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:45.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:45.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:45.252 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:57:45.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:45.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:45.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:45.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:45.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:45.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:45.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:45.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:45.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:57:45.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:57:45.265 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:57:45.266 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.266 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.266 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.266 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.266 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.266 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.266 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.266 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.266 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.267 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.267 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.267 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.267 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.267 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:45.267 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:50.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:57:50.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:57:50.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:50.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:50.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:50.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:50.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:50.278 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:50.278 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:50.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:50.279 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:57:50.282 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:57:50.283 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:57:50.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:50.283 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:50.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:50.284 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:57:50.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:50.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:57:50.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:50.286 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:57:50.286 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:57:50.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:50.286 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:50.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:50.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:57:50.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:50.287 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:57:50.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:50.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:57:50.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:57:50.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:50.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:50.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:50.290 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:57:50.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:50.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:57:50.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:50.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:57:50.294 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:57:50.294 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:57:50.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:50.299 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:57:50.777 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:57:50.821 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:57:50.822 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:57:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:50.824 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:57:50.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:50.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:50.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:57:50.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:50.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:50.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:50.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:57:50.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:57:50.869 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:57:50.873 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 02:57:50.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:50.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:50.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:50.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:50.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:51.245 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:57:51.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:51.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:51.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:51.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:51.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:51.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:51.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:51.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:51.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:51.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:51.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:51.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:51.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:57:51.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:57:51.270 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:57:51.270 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:51.270 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:51.270 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:51.270 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:51.270 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:57:56.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:57:56.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:57:56.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:56.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:56.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:56.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:56.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:57:56.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:56.282 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:56.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:57:56.282 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:57:56.285 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:57:56.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:57:56.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:56.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:56.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:57:56.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:57:56.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:57:56.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:57:56.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:56.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:57:56.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:57:56.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:56.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:56.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:57:56.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:57:56.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:57:56.287 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:57:56.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:56.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:57:56.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:57:56.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:56.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:57:56.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:57:56.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:57:56.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:57:56.289 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:57:56.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:56.291 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:57:56.292 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:57:56.292 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:57:56.292 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:57:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:57:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:57:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:57:56.296 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:57:56.774 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:57:56.817 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:57:56.818 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:57:56.819 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:57:56.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:56.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:57:56.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:57:56.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:57:56.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:56.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:56.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:56.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:57:56.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:57:56.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:56.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:57:56.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:57:56.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:56.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:57:56.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:57:57.242 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:57:57.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:57.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:57.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:57.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:57.716 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:57:58.188 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:57:58.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:58.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:58.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:58.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:58.661 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:57:59.134 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:57:59.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:57:59.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:57:59.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:57:59.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:57:59.607 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:57:59.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:00.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:00.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:00.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:00.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:00.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:00.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:58:00.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:00.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:58:00.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:58:00.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:58:00.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:58:00.079 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:58:00.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:00.090 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:58:00.090 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 02:58:00.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:00.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:00.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:00.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:00.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:00.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:00.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:00.552 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:58:01.025 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:58:01.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:01.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:01.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:01.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:01.497 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:58:01.971 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:58:02.443 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:58:02.915 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:58:03.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:03.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:03.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:03.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:03.251 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:58:03.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:03.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:03.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:58:03.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:03.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:58:03.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:58:03.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:58:03.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:58:03.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:03.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:58:03.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:58:03.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:03.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:03.388 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:58:03.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:03.861 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:58:04.333 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:58:04.804 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:58:05.274 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:58:05.745 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:58:06.219 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:58:06.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:06.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:06.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:06.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:06.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:06.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:06.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:58:06.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:06.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:58:06.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:58:06.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:58:06.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:58:06.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:06.691 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:58:06.696 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:58:06.696 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:58:06.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:06.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:06.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:07.163 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:58:07.635 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:58:08.108 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:58:08.576 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:58:09.041 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:58:09.508 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:58:09.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:09.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:09.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:09.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:09.855 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:58:09.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:09.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:09.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:09.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:09.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:58:09.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:58:09.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:58:09.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:58:09.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:58:09.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:58:09.864 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:58:14.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:58:14.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:58:14.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:58:14.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:58:14.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:58:14.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:58:14.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:58:14.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:58:14.893 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:58:14.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:58:14.894 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:58:14.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:58:14.899 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:58:14.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:58:14.900 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:58:14.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:58:14.901 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:58:14.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:58:14.902 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:58:14.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:14.903 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:58:14.904 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:58:14.904 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:58:14.904 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:58:14.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:58:14.904 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:58:14.904 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:58:14.904 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:58:14.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:14.906 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:58:14.906 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:58:14.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:58:14.907 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:58:14.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:58:14.907 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:58:14.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:58:14.907 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:58:14.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:14.909 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:58:14.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:58:14.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:58:14.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:58:14.909 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:58:14.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:58:14.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:58:14.910 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:58:14.910 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:58:14.910 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:14.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:14.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:14.915 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:58:15.393 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:58:15.429 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:58:15.430 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:58:15.431 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:58:15.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:15.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:15.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:15.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:58:15.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:15.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:58:15.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:58:15.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:58:15.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:58:15.860 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:58:15.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:15.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:15.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:15.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:16.332 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:58:16.802 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:58:16.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:16.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:16.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:16.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:17.273 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:58:17.744 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:58:17.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:17.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:17.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:17.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:18.215 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:58:18.688 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:58:18.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:18.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:18.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:18.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:19.160 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:58:19.632 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:58:19.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:19.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:19.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:19.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:20.104 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:58:20.577 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:58:21.044 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:58:21.516 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:58:21.987 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:58:22.460 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:58:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:58:23.403 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:58:23.871 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:58:24.342 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:58:24.814 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:58:25.287 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:58:25.759 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:58:26.230 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:58:26.700 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:58:27.172 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:58:27.645 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:58:28.117 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:58:28.589 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:58:29.060 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:58:29.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:29.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:29.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:29.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:29.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:29.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:29.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:58:29.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:58:29.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:58:29.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:58:29.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:58:29.357 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:58:29.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:58:29.357 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:29.357 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:29.357 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:29.357 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:29.357 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:29.357 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:29.357 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:29.357 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:34.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:58:34.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:58:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:58:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:58:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:58:34.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:58:34.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:58:34.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:58:34.371 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:58:34.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:58:34.372 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:58:34.375 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:58:34.375 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:58:34.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:58:34.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:58:34.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:58:34.376 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:58:34.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:58:34.376 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:58:34.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:34.378 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:58:34.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:58:34.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:58:34.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:58:34.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:58:34.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:58:34.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:58:34.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:58:34.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:34.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:58:34.381 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:58:34.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:58:34.381 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:58:34.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:58:34.381 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:58:34.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:58:34.382 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:58:34.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:34.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:58:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:58:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:58:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:58:34.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:58:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:58:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:58:34.385 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:58:34.385 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:58:34.385 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:34.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:58:34.390 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:58:34.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:58:34.914 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:58:34.916 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:58:34.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:34.919 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:58:34.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:34.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:34.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:58:34.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:34.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:58:34.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:58:34.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:58:34.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:58:34.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:34.971 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 02:58:34.971 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 02:58:34.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:34.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:35.336 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:58:35.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:35.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:35.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:35.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:35.808 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:58:36.282 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:58:36.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:36.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:36.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:36.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:36.754 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:58:36.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:36.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:36.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:36.973 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 02:58:36.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:58:36.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:58:36.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:58:36.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:58:36.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:58:36.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:58:37.228 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:58:37.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:37.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:37.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:37.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:37.700 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:58:38.172 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:58:38.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:38.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:38.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:38.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:38.643 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:58:39.116 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:58:39.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:39.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:39.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:39.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:39.588 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:58:40.060 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:58:40.533 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:58:41.006 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:58:41.478 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:58:41.949 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:58:42.422 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:58:42.895 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:58:43.367 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:58:43.837 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:58:44.308 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:58:44.782 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:58:45.254 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:58:45.726 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:58:46.197 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:58:46.671 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:58:47.143 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:58:47.615 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:58:48.089 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:58:48.561 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:58:49.033 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:58:49.504 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:58:49.977 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:58:50.449 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:58:50.921 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:58:51.392 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:58:51.866 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:58:52.338 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:58:52.810 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:58:53.284 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:58:53.751 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:58:54.222 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:58:54.696 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:58:55.168 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:58:55.640 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:58:56.114 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:58:56.586 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 02:58:57.058 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 02:58:57.532 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 02:58:58.004 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 02:58:58.477 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 02:58:58.950 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 02:58:59.422 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 02:58:59.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:58:59.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:58:59.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:58:59.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:58:59.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:58:59.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:58:59.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:58:59.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:58:59.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:58:59.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:58:59.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:58:59.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:58:59.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:58:59.714 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:58:59.714 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:59.714 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:59.714 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:59.714 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:59.714 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:59.714 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:58:59.714 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:04.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:59:04.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:59:04.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:59:04.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:59:04.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:59:04.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:59:04.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:59:04.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:59:04.727 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:04.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:59:04.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:59:04.729 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:59:04.730 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:59:04.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:59:04.730 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:04.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:59:04.731 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:59:04.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:59:04.731 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:59:04.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:04.732 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:59:04.732 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:59:04.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:59:04.732 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:04.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:59:04.732 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:59:04.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:59:04.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:59:04.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:04.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:59:04.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:59:04.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:59:04.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:04.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:59:04.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:59:04.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:59:04.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:59:04.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:04.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:59:04.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:59:04.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:59:04.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:59:04.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:59:04.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:59:04.737 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:59:04.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:04.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:04.742 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:59:05.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:59:05.259 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:59:05.261 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:59:05.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:59:05.263 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:59:05.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:59:05.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:59:05.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:59:05.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:59:05.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:59:05.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:59:05.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:59:05.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:59:05.693 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:59:05.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:05.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:05.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:05.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:06.164 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:59:06.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:59:06.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:06.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:06.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:06.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:07.110 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:59:07.582 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:59:07.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:07.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:07.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:07.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:08.052 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:59:08.523 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:59:08.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:08.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:08.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:08.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:08.994 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:59:09.468 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:59:09.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:09.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:09.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:09.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:09.940 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:59:10.412 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:59:10.886 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:59:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:59:11.830 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:59:12.303 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:59:12.776 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:59:13.248 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:59:13.719 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:59:14.192 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:59:14.665 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:59:15.137 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:59:15.610 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:59:16.083 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:59:16.554 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:59:17.025 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:59:17.499 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:59:17.971 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:59:18.443 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:59:18.914 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:59:19.388 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:59:19.860 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:59:20.332 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:59:20.803 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:59:21.276 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:59:21.749 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:59:22.221 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:59:22.692 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:59:23.162 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:59:23.633 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:59:24.104 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:59:24.577 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:59:25.050 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:59:25.522 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:59:25.993 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:59:26.466 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:59:26.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:59:26.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:59:26.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:26.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:26.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:26.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:26.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:59:26.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:59:26.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:59:26.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:59:26.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:59:26.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:59:26.763 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:59:26.763 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.763 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.763 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.764 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.765 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:26.765 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4759 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:31.766 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:59:31.766 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:59:31.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:59:31.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:59:31.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:59:31.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:59:31.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:59:31.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:59:31.775 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:31.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:59:31.776 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:59:31.778 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:59:31.778 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:59:31.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:59:31.779 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:31.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:59:31.779 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:59:31.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:59:31.780 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:59:31.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:31.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:59:31.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:59:31.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:59:31.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:31.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:59:31.781 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:59:31.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:59:31.781 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:59:31.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:31.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:59:31.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:59:31.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:59:31.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:31.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:59:31.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:59:31.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:59:31.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:59:31.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:59:31.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:59:31.786 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:59:31.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:31.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:59:32.266 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:59:32.313 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:59:32.315 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:59:32.317 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:59:32.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:59:32.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:59:32.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:59:32.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:59:32.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:59:32.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:59:32.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:59:32.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:59:32.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:59:32.734 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:59:32.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:32.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:32.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:32.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:33.205 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 02:59:33.678 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 02:59:33.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:33.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:33.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:33.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:34.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 02:59:34.623 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 02:59:34.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:34.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:34.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:34.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:35.094 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 02:59:35.567 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 02:59:35.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:35.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:35.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:35.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:36.040 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 02:59:36.520 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 02:59:36.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:36.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:36.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:36.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:36.992 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 02:59:37.463 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 02:59:37.936 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 02:59:38.408 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 02:59:38.880 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 02:59:39.351 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 02:59:39.825 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 02:59:40.297 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 02:59:40.769 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 02:59:41.240 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 02:59:41.713 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 02:59:42.185 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 02:59:42.657 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 02:59:43.128 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 02:59:43.601 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 02:59:44.072 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 02:59:44.545 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 02:59:45.016 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 02:59:45.487 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 02:59:45.959 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 02:59:46.429 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 02:59:46.900 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 02:59:47.373 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 02:59:47.845 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 02:59:48.317 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 02:59:48.782 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 02:59:49.254 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 02:59:49.726 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 02:59:50.197 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 02:59:50.670 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 02:59:51.143 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 02:59:51.615 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 02:59:52.086 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 02:59:52.559 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 02:59:53.032 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 02:59:53.503 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 02:59:53.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:59:53.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:59:53.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:53.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:53.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:53.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:53.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:59:53.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:59:53.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:59:53.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:59:53.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:59:53.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:59:53.812 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 02:59:53.812 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4761 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:53.812 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:53.813 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:53.813 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:53.813 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:53.813 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:53.813 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 02:59:58.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 02:59:58.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 02:59:58.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:59:58.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:59:58.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:59:58.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:59:58.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 02:59:58.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:59:58.826 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:58.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 02:59:58.826 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 02:59:58.829 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 02:59:58.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 02:59:58.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:59:58.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:58.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 02:59:58.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 02:59:58.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 02:59:58.830 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 02:59:58.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:58.832 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 02:59:58.832 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 02:59:58.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:59:58.832 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:58.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 02:59:58.832 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 02:59:58.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 02:59:58.832 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 02:59:58.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:58.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 02:59:58.834 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 02:59:58.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:59:58.835 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 02:59:58.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 02:59:58.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 02:59:58.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 02:59:58.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 02:59:58.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 02:59:58.837 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 02:59:58.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 02:59:58.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 02:59:58.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 02:59:58.837 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 02:59:58.838 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 02:59:58.838 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 02:59:58.838 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:58.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:58.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 02:59:58.843 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 02:59:59.321 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 02:59:59.360 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 02:59:59.360 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 02:59:59.361 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 02:59:59.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 02:59:59.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 02:59:59.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 02:59:59.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 02:59:59.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 02:59:59.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 02:59:59.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 02:59:59.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 02:59:59.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 02:59:59.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 02:59:59.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 02:59:59.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 02:59:59.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 02:59:59.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:00.265 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:00:00.738 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:00:00.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:00.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:00.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:00.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:01.211 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:00:01.681 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:00:01.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:01.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:01.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:01.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:02.148 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:00:02.619 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:00:02.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:02.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:02.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:02.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:03.089 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:00:03.557 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:00:03.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:03.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:04.028 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:00:04.498 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:00:04.972 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:00:05.440 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:00:05.911 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:00:06.384 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:00:06.856 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:00:07.329 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:00:07.802 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:00:08.275 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:00:08.746 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:00:09.218 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:00:09.691 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:00:10.163 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:00:10.635 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:00:11.109 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:00:11.582 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:00:12.053 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:00:12.525 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:00:12.998 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:00:13.470 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:00:13.943 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:00:14.416 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:00:14.888 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:00:15.361 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:00:15.834 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:00:16.307 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:00:16.779 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:00:17.252 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:00:17.725 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:00:18.197 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:00:18.670 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:00:19.143 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:00:19.615 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:00:20.088 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:00:20.561 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:00:21.032 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:00:21.504 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:00:21.977 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:00:22.449 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:00:22.921 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:00:23.391 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:00:23.862 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:00:24.333 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:00:24.803 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:00:25.275 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:00:25.748 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:00:26.221 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:00:26.693 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:00:27.163 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:00:27.637 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:00:28.109 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:00:28.581 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:00:29.054 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:00:29.527 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:00:29.998 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 03:00:30.470 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 03:00:30.943 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 03:00:31.415 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 03:00:31.887 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 03:00:32.358 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 03:00:32.831 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 03:00:32.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:00:32.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:00:32.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:32.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:32.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:32.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:32.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:00:32.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:00:32.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:00:32.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:00:32.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:00:32.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:00:32.865 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:00:32.865 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7354 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:00:32.865 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:00:32.865 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:00:32.866 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:00:32.866 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:00:32.866 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:00:32.866 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:00:37.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:00:37.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:00:37.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:00:37.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:00:37.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:00:37.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:00:37.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:00:37.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:00:37.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:00:37.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:00:37.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:00:37.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:00:37.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:00:37.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:00:37.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:00:37.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:00:37.884 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:00:37.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:00:37.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:00:37.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:37.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:00:37.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:00:37.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:00:37.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:00:37.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:00:37.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:00:37.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:00:37.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:00:37.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:37.888 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:00:37.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:00:37.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:00:37.888 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:00:37.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:00:37.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:00:37.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:00:37.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:00:37.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:00:37.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:00:37.892 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:00:37.892 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:00:37.892 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:00:37.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:00:37.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:00:37.896 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:00:38.373 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:00:38.406 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:00:38.406 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:00:38.407 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:00:38.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:00:38.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:00:38.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:00:38.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:00:38.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:00:38.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:00:38.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:00:38.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:00:38.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:00:38.841 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:00:38.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:38.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:38.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:38.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:39.312 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:00:39.785 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:00:39.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:39.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:39.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:39.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:40.257 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:00:40.729 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:00:40.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:40.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:40.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:40.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:41.200 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:00:41.673 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:00:41.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:41.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:41.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:41.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:42.146 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:00:42.618 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:00:42.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:00:42.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:00:42.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:00:42.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:00:43.089 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:00:43.562 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:00:44.030 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:00:44.501 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:00:44.974 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:00:45.447 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:00:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:00:46.390 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:00:46.863 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:00:47.336 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:00:47.808 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:00:48.279 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:00:48.752 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:00:49.224 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:00:49.696 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:00:50.167 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:00:50.640 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:00:51.113 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:00:51.584 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:00:52.055 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:00:52.528 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:00:53.001 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:00:53.473 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:00:53.944 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:00:54.414 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:00:54.886 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:00:55.359 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:00:55.831 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:00:56.303 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:00:56.774 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:00:57.248 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:00:57.720 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:00:58.192 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:00:58.663 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:00:59.136 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:00:59.609 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:01:00.081 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:01:00.552 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:01:01.023 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:01:01.496 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:01:01.968 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:01:02.440 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:01:02.914 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:01:03.386 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:01:03.858 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:01:04.329 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:01:04.802 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:01:05.275 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:01:05.747 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:01:05.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:01:05.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:01:05.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:05.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:05.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:05.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:05.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:05.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:05.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:05.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:05.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:05.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:05.913 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:01:05.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:05.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:05.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:05.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:05.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:05.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:05.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=6056 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:10.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:10.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:10.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:10.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:10.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:10.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:10.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:10.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:10.926 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:10.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:10.926 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:01:10.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:01:10.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:01:10.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:10.930 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:10.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:10.930 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:01:10.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:10.931 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:01:10.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:10.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:01:10.932 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:01:10.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:10.932 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:10.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:10.932 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:01:10.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:10.932 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:01:10.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:10.934 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:01:10.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:01:10.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:10.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:10.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:10.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:01:10.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:10.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:01:10.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:10.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:01:10.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:01:10.937 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:01:10.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:10.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:10.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:01:11.421 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:01:11.463 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:01:11.464 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:01:11.465 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:01:11.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:01:11.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:11.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:11.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:11.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:11.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:11.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:11.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:11.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:11.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:11.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:11.478 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:11.478 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:16.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:16.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:16.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:16.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:16.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:16.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:16.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:16.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:16.492 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:16.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:16.492 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:01:16.495 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:01:16.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:01:16.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:16.496 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:16.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:16.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:01:16.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:16.497 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:01:16.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:16.499 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:01:16.499 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:01:16.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:16.499 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:16.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:16.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:01:16.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:16.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:01:16.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:16.502 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:01:16.502 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:01:16.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:16.502 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:16.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:16.502 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:01:16.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:16.503 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:01:16.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:16.505 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:01:16.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:01:16.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:01:16.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:01:16.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:01:16.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:01:16.506 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:01:16.506 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:01:16.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:01:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:16.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:16.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:16.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:01:16.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:01:17.036 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:01:17.039 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:01:17.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:01:17.041 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:01:17.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:17.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:17.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:17.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:17.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:17.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:17.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:17.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:17.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:17.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:17.057 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:17.057 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:22.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:22.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:22.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:22.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:22.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:22.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:22.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:22.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:22.069 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:22.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:22.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:01:22.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:01:22.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:01:22.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:22.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:22.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:22.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:01:22.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:22.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:01:22.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:22.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:01:22.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:01:22.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:22.076 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:22.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:22.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:01:22.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:22.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:01:22.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:22.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:01:22.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:01:22.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:22.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:22.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:22.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:01:22.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:22.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:01:22.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:22.082 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:01:22.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:01:22.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:01:22.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:01:22.082 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:22.084 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:01:22.084 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:01:22.084 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:01:22.084 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:01:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:22.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:01:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:22.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:22.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:22.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:22.089 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:01:22.566 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:01:22.612 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:01:22.612 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:01:22.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:01:22.614 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:01:22.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:22.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:22.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:22.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:22.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:22.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:22.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:22.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:22.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:22.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:22.630 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:01:22.630 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:22.630 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:22.630 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:01:27.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:27.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:27.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:27.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:27.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:27.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:27.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:27.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:27.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:27.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:27.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:01:27.647 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:01:27.647 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:01:27.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:27.648 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:27.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:27.649 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:01:27.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:27.649 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:01:27.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:27.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:01:27.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:01:27.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:27.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:27.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:27.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:01:27.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:27.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:01:27.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:27.653 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:01:27.653 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:01:27.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:27.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:27.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:27.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:01:27.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:27.654 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:01:27.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:27.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:01:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:01:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:01:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:01:27.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:01:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:01:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:01:27.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:01:27.657 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:01:27.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:27.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:27.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:27.662 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:01:28.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:01:28.186 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:01:28.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:01:28.189 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:01:28.192 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:01:28.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:01:28.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:01:28.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:01:28.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:01:28.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:01:28.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:01:28.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:01:28.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:01:28.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:01:28.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:28.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:28.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:28.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:29.083 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:01:29.557 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:01:29.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:29.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:29.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:29.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:30.030 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:01:30.501 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:01:30.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:30.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:30.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:30.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:30.972 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:01:31.446 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:01:31.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:31.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:31.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:31.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:31.918 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:01:32.390 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:01:32.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:32.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:32.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:32.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:32.861 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:01:33.334 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:01:33.806 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:01:34.278 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:01:34.751 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:01:35.223 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:01:35.695 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:01:36.166 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:01:36.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:01:36.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:01:36.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:36.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:36.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:36.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:36.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:36.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:36.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:36.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:36.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:36.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:36.243 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:01:41.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:41.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:41.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:41.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:41.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:41.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:41.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:41.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:41.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:41.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:41.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:01:41.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:01:41.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:01:41.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:41.256 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:41.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:41.256 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:01:41.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:41.256 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:01:41.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:41.258 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:01:41.258 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:01:41.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:41.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:41.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:41.258 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:01:41.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:41.258 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:01:41.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:41.260 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:01:41.260 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:01:41.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:41.260 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:41.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:41.260 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:01:41.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:41.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:01:41.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:41.263 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:01:41.263 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:01:41.264 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:01:41.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:41.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:41.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:41.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:41.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:41.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:41.268 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:01:41.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:01:41.793 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:01:41.795 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:01:41.796 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:01:41.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:01:41.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:01:41.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:01:41.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:01:41.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:01:41.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:01:41.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:01:41.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:01:41.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:01:42.214 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:01:42.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:42.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:42.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:42.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:42.685 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:01:43.156 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:01:43.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:43.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:43.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:43.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:43.629 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:01:44.102 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:01:44.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:44.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:44.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:44.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:44.574 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:01:45.044 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:01:45.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:45.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:45.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:45.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:45.516 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:01:45.987 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:01:46.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:46.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:46.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:46.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:46.460 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:01:46.932 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:01:47.404 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:01:47.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:01:48.351 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:01:48.822 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:01:49.294 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:01:49.767 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:01:49.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:01:49.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:01:49.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:49.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:49.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:49.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:49.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:49.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:49.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:49.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:49.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:49.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:49.850 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:01:54.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:01:54.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:01:54.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:54.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:54.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:54.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:54.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:01:54.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:54.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:54.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:01:54.864 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:01:54.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:01:54.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:01:54.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:54.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:54.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:01:54.868 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:01:54.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:01:54.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:01:54.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:54.869 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:01:54.869 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:01:54.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:54.869 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:54.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:01:54.869 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:01:54.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:01:54.870 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:01:54.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:54.871 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:01:54.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:01:54.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:54.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:01:54.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:01:54.872 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:01:54.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:01:54.872 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:01:54.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:54.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:01:54.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:01:54.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:01:54.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:01:54.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:01:54.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:01:54.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:01:54.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:01:54.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:01:54.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:01:54.875 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:01:54.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:01:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:01:54.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:01:55.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:01:55.402 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:01:55.403 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:01:55.405 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:01:55.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:01:55.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:01:55.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:01:55.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:01:55.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:01:55.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:01:55.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:01:55.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:01:55.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:01:55.826 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:01:55.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:55.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:55.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:55.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:56.297 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:01:56.768 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:01:56.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:56.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:56.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:56.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:57.241 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:01:57.713 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:01:57.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:57.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:57.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:57.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:58.185 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:01:58.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:01:58.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:58.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:58.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:58.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:01:59.130 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:01:59.602 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:01:59.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:01:59.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:01:59.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:01:59.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:00.073 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:02:00.544 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:02:01.018 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:02:01.490 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:02:01.962 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:02:02.433 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:02:02.906 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:02:03.379 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:02:03.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:02:03.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:02:03.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:03.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:03.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:03.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:03.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:03.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:03.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:03.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:03.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:02:03.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:02:03.456 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:02:08.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:02:08.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:02:08.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:08.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:08.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:08.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:08.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:08.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:02:08.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:08.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:02:08.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:02:08.487 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:02:08.488 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:02:08.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:02:08.488 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:08.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:08.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:02:08.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:02:08.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:02:08.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:08.490 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:02:08.490 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:02:08.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:02:08.490 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:08.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:08.490 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:02:08.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:02:08.490 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:02:08.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:08.492 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:02:08.492 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:02:08.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:02:08.492 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:08.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:08.492 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:02:08.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:02:08.492 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:02:08.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:08.495 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:02:08.495 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:02:08.495 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:02:08.495 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:08.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:08.500 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:02:08.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:02:09.027 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:02:09.030 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:02:09.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:02:09.032 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:02:09.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:02:09.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:02:09.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:02:09.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:02:09.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:02:09.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:02:09.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:02:09.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:02:09.446 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:02:09.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:09.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:09.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:09.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:09.917 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:02:10.388 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:02:10.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:10.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:10.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:10.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:10.861 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:02:11.334 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:02:11.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:11.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:11.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:11.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:11.806 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:02:12.279 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:02:12.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:12.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:12.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:12.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:12.751 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:02:13.223 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:02:13.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:13.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:13.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:13.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:13.694 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:02:14.167 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:02:14.637 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:02:15.106 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:02:15.577 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:02:16.050 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:02:16.523 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:02:16.995 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:02:17.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:02:17.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:02:17.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:17.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:17.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:17.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:17.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:17.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:17.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:17.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:17.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:02:17.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:02:17.089 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:02:17.089 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.089 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.089 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.090 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:17.091 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:22.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:02:22.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:02:22.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:22.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:22.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:22.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:22.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:22.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:02:22.102 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:22.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:02:22.103 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:02:22.106 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:02:22.107 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:02:22.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:02:22.107 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:22.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:22.108 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:02:22.109 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:02:22.109 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:02:22.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:22.111 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:02:22.111 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:02:22.112 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:02:22.112 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:22.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:22.113 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:02:22.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:02:22.113 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:02:22.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:22.115 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:02:22.115 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:02:22.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:02:22.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:22.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:22.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:02:22.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:02:22.116 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:02:22.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:22.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:02:22.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:02:22.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:02:22.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:02:22.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:22.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:02:22.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:02:22.120 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:02:22.121 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:22.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:22.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:22.125 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:02:22.603 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:02:22.654 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:02:22.656 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:02:22.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:02:22.658 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:02:22.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:02:22.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:02:22.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:02:22.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:02:22.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:02:22.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:02:22.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:02:22.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:02:23.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:02:23.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:23.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:23.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:23.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:23.542 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:02:24.013 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:02:24.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:24.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:24.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:24.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:24.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:02:24.956 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:02:25.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:25.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:25.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:25.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:25.425 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:02:25.895 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:02:26.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:26.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:26.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:26.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:26.367 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:02:26.840 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:02:27.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:27.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:27.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:27.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:27.313 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:02:27.785 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:02:28.255 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:02:28.726 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:02:29.200 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:02:29.672 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:02:30.144 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:02:30.615 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:02:30.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:02:30.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:02:30.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:30.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:30.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:30.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:30.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:30.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:30.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:30.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:30.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:02:30.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:02:30.707 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:30.707 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:35.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:02:35.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:02:35.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:35.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:35.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:35.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:35.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:35.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:02:35.716 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:35.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:02:35.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:02:35.717 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:02:35.718 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:02:35.718 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:02:35.718 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:35.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:35.718 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:02:35.718 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:02:35.718 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:02:35.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:35.719 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:02:35.719 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:02:35.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:02:35.719 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:35.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:35.719 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:02:35.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:02:35.719 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:02:35.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:35.720 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:02:35.720 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:02:35.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:02:35.721 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:35.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:35.721 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:02:35.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:02:35.721 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:02:35.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:02:35.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:02:35.723 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:02:35.723 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:35.727 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:02:36.205 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:02:36.248 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:02:36.250 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:02:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:02:36.253 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:02:36.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:02:36.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:02:36.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:02:36.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:02:36.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:02:36.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:02:36.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:02:36.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:02:36.678 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:02:36.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:36.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:36.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:36.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:37.149 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:02:37.619 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:02:37.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:37.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:37.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:37.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:38.093 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:02:38.565 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:02:38.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:38.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:38.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:38.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:39.037 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:02:39.508 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:02:39.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:39.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:39.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:39.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:39.981 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:02:40.454 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:02:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:40.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:40.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:40.926 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:02:41.397 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:02:41.870 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:02:42.342 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:02:42.814 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:02:43.285 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:02:43.758 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:02:44.230 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:02:44.702 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:02:45.175 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:02:45.648 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:02:46.119 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:02:46.590 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:02:47.064 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:02:47.536 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:02:48.008 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:02:48.481 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:02:48.954 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:02:49.426 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:02:49.897 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:02:50.371 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:02:50.842 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:02:51.314 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:02:51.785 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:02:52.259 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:02:52.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:02:52.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:02:52.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:52.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:52.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:52.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:52.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:52.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:52.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:52.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:52.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:02:52.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:02:52.314 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:02:52.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3584 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:52.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3584 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:52.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3584 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:52.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3584 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:52.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3584 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:52.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3584 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:52.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3584 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:52.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3584 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:02:57.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:02:57.316 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:02:57.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:57.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:57.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:57.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:57.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:02:57.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:02:57.328 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:57.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:02:57.328 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:02:57.331 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:02:57.331 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:02:57.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:02:57.332 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:57.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:02:57.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:02:57.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:02:57.333 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:02:57.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:57.334 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:02:57.334 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:02:57.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:02:57.334 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:57.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:02:57.334 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:02:57.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:02:57.334 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:02:57.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:57.336 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:02:57.336 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:02:57.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:02:57.336 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:02:57.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:02:57.337 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:02:57.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:02:57.337 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:02:57.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:57.339 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:02:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:02:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:02:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:02:57.339 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:02:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:02:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:02:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:02:57.340 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:02:57.340 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:02:57.340 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:02:57.345 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:02:57.822 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:02:57.872 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:02:57.875 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:02:57.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:02:57.877 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:02:57.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:02:57.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:02:57.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:02:57.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:02:57.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:02:57.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:02:57.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:02:57.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:02:58.294 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:02:58.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:58.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:58.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:58.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:58.765 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:02:59.236 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:02:59.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:02:59.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:02:59.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:02:59.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:02:59.709 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:03:00.182 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:03:00.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:00.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:00.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:00.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:00.654 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:03:01.125 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:03:01.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:01.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:01.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:01.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:01.598 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:03:02.070 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:03:02.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:02.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:02.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:02.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:02.542 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:03:03.013 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:03:03.486 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:03:03.959 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:03:04.421 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:03:04.883 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:03:05.346 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:03:05.810 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:03:05.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:03:05.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:03:05.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:05.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:05.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:05.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:05.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:05.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:05.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:05.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:05.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:05.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:05.917 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:03:10.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:10.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:10.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:10.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:10.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:10.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:10.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:10.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:10.938 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:10.939 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:10.939 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:03:10.942 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:03:10.942 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:03:10.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:10.942 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:10.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:10.943 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:03:10.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:10.943 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:03:10.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:10.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:03:10.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:03:10.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:10.945 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:10.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:10.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:03:10.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:10.945 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:03:10.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:10.947 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:03:10.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:03:10.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:10.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:10.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:10.947 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:03:10.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:10.947 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:03:10.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:10.949 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:03:10.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:03:10.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:03:10.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:03:10.949 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:03:10.950 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:03:10.950 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:03:10.950 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:10.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:10.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:10.955 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:03:11.433 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:03:11.476 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:03:11.479 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:03:11.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:03:11.481 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:03:11.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:03:11.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:03:11.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:03:11.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:03:11.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:03:11.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:03:11.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:03:11.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:03:11.905 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:03:11.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:11.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:11.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:11.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:12.376 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:03:12.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:03:12.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:12.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:12.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:12.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:13.322 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:03:13.793 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:03:13.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:13.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:13.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:13.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:14.265 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:03:14.738 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:03:14.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:14.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:14.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:14.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:15.210 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:03:15.682 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:03:15.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:15.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:15.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:15.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:16.156 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:03:16.628 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:03:17.100 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:03:17.571 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:03:18.044 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:03:18.517 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:03:18.989 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:03:19.462 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:03:19.934 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:03:20.406 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:03:20.877 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:03:21.351 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:03:21.823 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:03:22.295 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:03:22.766 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:03:23.237 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:03:23.709 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:03:24.182 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:03:24.654 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:03:25.125 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:03:25.598 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:03:26.070 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:03:26.542 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:03:27.015 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:03:27.488 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:03:27.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:03:27.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:03:27.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:27.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:27.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:27.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:27.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:27.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:27.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:27.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:27.547 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:27.547 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:27.547 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:03:32.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:32.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:32.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:32.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:32.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:32.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:32.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:32.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:32.560 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:32.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:32.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:03:32.562 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:03:32.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:03:32.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:32.563 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:32.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:32.564 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:03:32.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:32.564 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:03:32.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:32.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:03:32.566 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:03:32.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:32.566 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:32.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:32.566 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:03:32.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:32.567 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:03:32.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:32.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:03:32.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:03:32.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:32.569 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:32.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:32.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:03:32.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:32.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:03:32.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:32.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:03:32.573 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:03:32.573 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:03:32.573 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:32.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:32.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:32.577 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:03:33.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:03:33.101 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:03:33.103 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:03:33.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:03:33.106 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:03:33.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:03:33.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:03:33.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:03:33.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:33.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:33.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:33.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:33.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:33.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:33.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:33.140 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:33.140 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:33.140 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:03:33.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:33.140 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:38.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:38.140 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:38.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:38.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:38.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:38.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:38.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:38.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:38.152 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:38.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:38.152 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:03:38.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:03:38.155 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:03:38.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:38.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:38.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:38.156 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:03:38.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:38.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:03:38.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:38.157 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:03:38.157 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:03:38.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:38.157 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:38.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:38.157 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:03:38.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:38.157 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:03:38.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:38.159 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:03:38.159 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:03:38.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:38.159 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:38.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:38.159 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:03:38.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:38.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:03:38.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:03:38.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:03:38.162 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:03:38.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:38.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:38.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:38.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:03:38.643 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:03:38.690 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:03:38.692 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:03:38.694 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:03:38.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:03:38.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:03:38.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:03:38.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:03:38.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:38.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:38.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:38.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:38.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:38.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:38.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:38.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:38.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:38.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:38.734 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:03:43.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:43.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:43.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:43.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:43.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:43.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:43.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:43.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:43.742 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:43.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:43.742 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:03:43.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:03:43.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:03:43.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:43.746 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:43.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:43.746 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:03:43.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:43.747 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:03:43.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:43.748 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:03:43.748 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:03:43.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:43.748 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:43.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:43.748 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:03:43.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:43.748 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:03:43.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:43.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:03:43.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:03:43.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:43.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:43.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:43.750 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:03:43.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:43.750 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:03:43.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:43.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:03:43.754 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:03:43.754 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:03:43.754 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:43.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:43.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:43.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:43.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:43.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:43.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:43.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:43.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:43.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:43.758 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:03:44.231 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:03:44.279 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:03:44.280 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:03:44.281 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:03:44.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:03:44.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:03:44.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:03:44.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:03:44.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:44.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:44.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:44.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:44.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:44.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:44.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:44.313 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:03:44.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:44.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:44.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:44.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:44.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:44.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:44.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:44.314 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:49.316 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:49.316 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:49.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:49.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:49.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:49.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:49.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:49.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:49.332 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:49.332 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:49.332 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:03:49.334 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:03:49.334 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:03:49.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:49.334 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:49.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:49.335 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:03:49.335 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:49.335 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:03:49.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:49.336 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:03:49.336 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:03:49.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:49.336 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:49.336 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:03:49.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:49.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:49.336 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:03:49.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:49.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:03:49.338 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:03:49.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:49.338 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:49.338 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:03:49.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:49.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:49.338 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:03:49.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:03:49.340 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:03:49.340 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:03:49.340 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:49.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:49.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:49.345 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:03:49.823 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:03:49.868 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:03:49.870 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:03:49.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:03:49.872 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:03:49.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:03:49.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:03:49.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:03:49.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:49.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:49.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:49.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:49.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:49.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:49.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:49.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:49.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:49.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:49.919 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:03:54.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:54.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:54.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:54.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:54.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:54.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:54.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:54.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:54.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:54.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:03:54.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:03:54.941 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:03:54.941 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:03:54.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:54.942 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:54.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:54.943 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:03:54.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:03:54.943 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:03:54.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:54.946 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:03:54.946 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:03:54.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:54.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:54.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:54.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:03:54.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:03:54.948 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:03:54.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:54.950 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:03:54.950 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:03:54.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:54.950 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:03:54.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:54.951 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:03:54.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:03:54.951 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:03:54.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:54.954 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:03:54.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:03:54.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:03:54.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:03:54.954 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:54.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:03:54.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:03:54.955 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:03:54.955 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:54.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:54.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:03:54.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:03:54.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:03:54.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:54.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:54.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:54.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:54.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:03:54.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:03:55.436 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:03:55.487 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:03:55.489 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:03:55.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:03:55.492 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:03:55.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:03:55.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:03:55.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:03:55.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:03:55.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:03:55.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:03:55.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:03:55.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:03:55.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:03:55.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:03:55.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:03:55.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:03:55.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:03:55.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:03:55.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:03:55.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:03:55.535 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:03:55.535 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:55.535 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:55.535 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:55.535 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:55.535 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:55.536 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:03:55.536 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:00.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:04:00.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:04:00.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:00.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:00.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:00.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:00.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:00.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:04:00.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:00.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:04:00.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:04:00.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:04:00.555 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:04:00.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:04:00.555 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:00.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:00.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:04:00.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:04:00.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:04:00.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:00.558 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:04:00.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:04:00.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:04:00.558 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:00.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:00.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:04:00.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:04:00.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:04:00.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:00.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:04:00.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:04:00.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:04:00.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:00.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:00.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:04:00.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:04:00.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:04:00.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:00.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:04:00.566 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:04:00.566 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:04:00.566 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:00.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:00.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:00.571 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:04:01.049 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:04:01.100 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:04:01.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:04:01.102 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:04:01.103 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:04:01.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:04:01.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:04:01.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:04:01.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:04:01.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:04:01.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:04:01.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:01.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:01.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:01.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:01.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:01.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:01.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:01.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:01.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:04:01.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:04:01.146 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:04:06.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:04:06.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:04:06.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:06.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:06.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:06.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:06.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:06.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:04:06.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:06.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:04:06.161 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:04:06.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:04:06.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:04:06.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:04:06.165 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:06.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:06.165 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:04:06.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:04:06.165 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:04:06.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:06.167 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:04:06.167 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:04:06.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:04:06.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:06.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:06.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:04:06.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:04:06.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:04:06.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:06.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:04:06.170 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:04:06.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:04:06.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:06.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:06.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:04:06.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:04:06.170 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:04:06.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:06.173 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:04:06.173 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:04:06.173 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:04:06.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:06.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:06.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:06.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:06.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:06.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:06.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:06.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:06.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:04:06.657 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:04:06.702 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:04:06.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:04:06.706 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:04:06.709 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:04:06.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:04:06.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:04:06.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:04:06.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:04:06.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:04:06.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:04:06.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:04:06.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:04:07.128 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:04:07.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:07.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:07.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:07.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:07.600 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:04:08.073 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:04:08.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:08.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:08.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:08.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:08.545 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:04:09.017 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:04:09.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:09.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:09.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:09.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:09.488 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:04:09.961 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:04:10.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:10.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:10.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:10.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:10.434 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:04:10.906 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:04:11.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:11.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:11.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:11.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:11.377 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:04:11.850 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:04:12.323 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:04:12.795 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:04:13.266 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:04:13.739 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:04:14.211 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:04:14.683 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:04:15.154 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:04:15.628 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:04:16.100 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:04:16.572 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:04:17.046 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:04:17.518 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:04:17.990 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:04:18.461 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:04:18.934 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:04:19.407 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:04:19.879 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:04:20.353 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:04:20.825 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:04:21.297 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:04:21.768 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:04:22.241 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:04:22.714 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:04:23.186 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:04:23.659 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:04:24.131 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:04:24.603 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:04:25.074 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:04:25.545 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:04:26.018 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:04:26.491 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:04:26.962 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:04:27.433 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:04:27.907 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:04:28.379 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:04:28.851 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:04:29.322 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:04:29.795 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:04:30.268 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:04:30.739 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:04:31.210 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:04:31.684 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:04:32.157 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:04:32.629 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:04:33.099 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:04:33.573 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:04:34.045 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:04:34.517 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:04:34.990 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:04:35.463 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:04:35.935 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:04:36.408 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:04:36.880 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:04:37.352 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 03:04:37.826 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 03:04:38.298 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 03:04:38.765 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 03:04:39.236 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 03:04:39.710 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 03:04:40.182 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 03:04:40.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:04:40.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:04:40.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:40.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:40.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:40.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:40.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:40.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:40.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:40.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:40.202 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:04:40.202 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:04:40.202 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7349 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7350 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7350 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:40.203 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=7350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:45.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:04:45.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:04:45.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:45.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:45.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:45.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:45.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:45.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:04:45.216 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:45.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:04:45.216 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:04:45.219 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:04:45.220 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:04:45.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:04:45.220 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:45.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:45.220 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:04:45.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:04:45.220 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:04:45.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:45.223 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:04:45.223 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:04:45.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:04:45.223 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:45.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:45.224 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:04:45.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:04:45.224 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:04:45.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:45.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:04:45.226 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:04:45.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:04:45.227 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:45.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:45.227 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:04:45.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:04:45.227 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:04:45.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:45.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:04:45.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:04:45.231 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:04:45.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:45.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:45.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:45.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:04:45.713 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:04:45.765 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:04:45.766 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:04:45.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:04:45.768 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:04:46.180 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:04:46.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:46.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:46.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:46.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:46.653 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:04:47.126 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:04:47.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:47.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:47.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:47.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:47.598 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:04:48.073 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:04:48.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:48.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:48.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:48.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:48.545 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:04:48.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:04:48.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:48.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:48.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:48.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:48.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:48.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:48.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:48.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:48.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:04:48.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:04:48.795 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:04:48.795 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:48.795 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:48.795 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:48.795 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:48.795 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:48.795 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:48.795 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:04:53.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:04:53.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:04:53.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:53.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:53.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:53.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:53.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:04:53.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:04:53.815 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:53.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:04:53.815 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:04:53.818 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:04:53.819 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:04:53.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:04:53.819 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:53.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:04:53.819 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:04:53.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:04:53.819 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:04:53.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:53.822 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:04:53.822 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:04:53.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:04:53.822 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:53.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:04:53.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:04:53.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:04:53.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:04:53.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:53.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:04:53.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:04:53.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:04:53.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:04:53.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:04:53.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:04:53.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:04:53.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:04:53.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:53.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:04:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:04:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:53.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:04:53.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:04:53.828 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:04:53.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:53.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:53.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:53.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:04:53.833 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:04:54.311 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:04:54.352 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:04:54.353 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:04:54.354 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:04:54.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:04:54.783 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:04:54.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:54.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:54.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:54.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:55.249 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:04:55.713 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:04:55.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:55.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:55.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:55.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:56.176 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:04:56.639 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:04:56.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:56.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:56.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:56.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:57.103 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:04:57.566 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:04:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:57.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:58.029 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:04:58.492 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:04:58.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:04:58.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:04:58.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:04:58.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:04:58.956 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:04:59.419 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:04:59.882 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:05:00.346 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:05:00.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:00.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:00.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:00.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:00.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:00.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:00.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:00.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:00.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:00.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:00.367 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1434 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1434 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1434 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1434 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1434 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1434 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1434 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1434 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1435 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1435 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1435 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1435 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1435 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1435 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:00.367 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1435 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:05.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:05.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:05.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:05.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:05.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:05.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:05.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:05.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:05.381 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:05.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:05.382 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:05:05.385 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:05:05.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:05:05.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:05.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:05.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:05.387 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:05:05.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:05.387 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:05:05.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:05.389 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:05:05.389 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:05:05.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:05.389 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:05.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:05.389 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:05:05.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:05.389 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:05:05.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:05.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:05:05.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:05:05.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:05.392 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:05.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:05.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:05:05.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:05.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:05:05.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:05.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:05:05.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:05:05.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:05:05.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:05:05.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:05:05.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:05:05.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:05:05.395 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:05:05.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:05.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:05.400 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:05:05.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:05:05.928 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:05:05.930 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:05:05.931 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:05:05.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:05:06.347 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:05:06.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:06.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:06.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:06.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:06.820 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:05:07.293 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:05:07.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:07.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:07.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:07.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:07.765 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:05:08.238 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:05:08.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:08.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:08.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:08.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:08.711 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:05:09.183 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:05:09.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:09.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:09.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:09.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:09.653 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:05:10.127 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:05:10.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:10.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:10.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:10.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:10.600 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:05:11.071 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:05:11.545 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:05:11.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:11.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:11.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:11.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:11.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:11.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:11.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:11.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:11.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:11.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:11.943 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:05:11.943 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:11.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:11.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:11.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:11.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:11.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:11.944 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:16.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:16.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:16.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:16.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:16.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:16.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:16.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:16.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:16.958 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:16.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:16.959 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:05:16.961 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:05:16.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:05:16.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:16.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:16.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:16.963 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:05:16.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:16.963 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:05:16.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:16.964 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:05:16.964 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:05:16.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:16.964 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:16.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:16.964 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:05:16.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:16.965 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:05:16.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:16.966 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:05:16.966 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:05:16.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:16.966 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:16.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:16.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:05:16.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:16.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:05:16.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:05:16.970 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:05:16.970 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:05:16.970 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:16.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:16.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:16.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:16.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:16.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:05:17.452 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:05:17.487 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:05:17.488 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:05:17.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:05:17.489 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:05:17.924 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:05:17.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:17.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:17.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:17.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:18.397 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:05:18.870 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:05:18.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:18.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:18.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:18.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:19.342 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:05:19.814 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:05:19.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:19.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:19.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:19.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:20.288 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:05:20.759 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:05:20.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:20.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:20.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:20.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:21.232 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:05:21.705 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:05:21.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:21.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:21.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:21.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:22.177 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:05:22.651 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:05:23.123 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:05:23.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:23.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:23.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:23.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:23.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:23.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:23.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:23.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:23.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:23.501 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:05:23.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:23.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:23.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:23.501 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:28.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:28.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:28.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:28.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:28.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:28.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:28.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:28.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:28.515 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:28.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:28.515 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:05:28.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:05:28.517 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:05:28.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:28.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:28.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:28.518 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:05:28.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:28.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:05:28.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:28.520 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:05:28.520 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:05:28.520 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:28.520 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:28.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:28.520 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:05:28.520 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:28.520 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:05:28.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:28.522 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:05:28.522 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:05:28.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:28.522 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:28.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:28.522 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:05:28.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:28.522 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:05:28.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:28.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:05:28.525 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:05:28.525 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:05:28.525 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:28.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:28.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:28.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:28.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:28.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:28.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:28.529 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:05:29.008 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:05:29.052 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:05:29.054 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:05:29.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:05:29.056 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:05:29.480 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:05:29.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:29.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:29.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:29.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:29.954 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:05:30.426 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:05:30.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:30.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:30.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:30.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:30.898 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:05:31.373 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:05:31.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:31.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:31.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:31.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:31.845 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:05:32.318 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:05:32.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:32.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:32.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:32.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:32.791 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:05:33.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:05:33.263 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:05:33.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:33.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:33.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:33.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:33.733 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:05:34.204 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:05:34.675 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:05:35.142 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:05:35.606 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:05:36.069 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:05:36.532 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:05:36.996 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:05:37.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:37.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:37.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:37.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:37.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:37.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:37.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:37.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:37.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:37.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:37.082 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:05:37.082 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:37.082 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:37.082 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:37.082 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:37.082 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:37.082 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:42.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:42.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:42.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:42.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:42.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:42.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:42.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:42.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:42.091 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:42.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:42.092 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:05:42.093 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:05:42.093 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:05:42.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:42.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:42.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:42.094 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:05:42.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:42.095 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:05:42.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:42.095 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:05:42.095 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:05:42.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:42.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:42.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:42.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:05:42.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:42.096 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:05:42.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:42.097 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:05:42.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:05:42.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:42.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:42.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:42.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:05:42.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:42.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:05:42.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:42.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:05:42.101 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:05:42.101 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:05:42.101 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:42.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:42.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:42.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:42.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:42.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:42.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:42.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:42.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:42.105 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:05:42.583 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:05:42.628 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:05:42.630 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:05:42.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:05:42.632 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:05:43.055 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:05:43.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:43.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:43.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:43.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:43.528 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:05:44.001 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:05:44.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:44.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:44.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:44.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:44.472 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:05:44.941 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:05:45.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:45.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:45.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:45.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:45.405 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:05:45.868 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:05:46.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:46.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:46.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:46.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:46.332 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:05:46.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:46.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:46.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:46.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:46.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:46.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:46.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:46.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:46.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:46.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:46.649 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:05:46.649 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=988 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:46.649 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=988 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:46.649 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=988 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:46.649 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=988 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:46.649 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=988 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:46.649 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=988 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:46.649 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=988 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:51.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:51.652 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:51.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:51.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:51.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:51.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:51.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:51.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:51.663 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:51.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:51.663 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:05:51.665 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:05:51.665 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:05:51.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:51.666 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:51.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:51.666 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:05:51.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:51.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:05:51.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:51.668 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:05:51.668 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:05:51.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:51.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:51.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:51.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:05:51.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:51.668 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:05:51.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:51.670 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:05:51.670 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:05:51.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:51.670 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:51.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:51.670 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:05:51.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:51.670 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:05:51.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:51.672 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:05:51.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:05:51.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:05:51.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:05:51.672 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:05:51.673 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:05:51.673 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:05:51.673 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:51.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:51.678 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:05:52.156 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:05:52.201 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:05:52.203 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:05:52.204 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:05:52.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:05:52.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:52.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:52.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:52.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:52.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:52.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:52.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:52.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:52.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:52.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:52.220 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:05:52.220 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:52.220 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:52.221 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:52.221 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:52.221 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:52.221 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:52.221 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:05:57.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:57.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:57.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:57.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:57.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:57.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:57.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:57.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:57.220 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:57.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:05:57.220 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:05:57.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:05:57.221 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:05:57.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:57.221 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:57.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:57.221 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:05:57.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:05:57.221 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:05:57.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:57.222 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:05:57.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:05:57.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:57.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:57.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:57.222 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:05:57.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:05:57.222 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:05:57.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:57.223 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:05:57.223 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:05:57.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:57.223 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:05:57.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:57.223 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:05:57.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:05:57.223 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:05:57.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:57.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:05:57.225 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:05:57.225 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:05:57.225 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:05:57.229 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:05:57.696 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:05:57.736 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:05:57.737 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:05:57.737 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:05:57.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:05:57.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:05:57.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:05:57.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:05:57.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:05:57.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:05:57.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:05:57.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:05:57.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:05:57.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:05:57.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:05:57.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:05:57.741 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:06:02.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:02.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:02.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:02.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:02.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:02.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:02.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:02.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:02.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:02.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:02.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:06:02.752 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:06:02.752 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:06:02.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:02.752 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:02.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:02.752 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:06:02.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:02.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:06:02.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:02.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:06:02.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:06:02.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:02.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:02.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:02.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:06:02.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:02.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:06:02.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:02.756 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:06:02.756 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:06:02.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:02.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:02.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:02.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:06:02.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:02.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:06:02.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:06:02.759 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:06:02.759 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:06:02.759 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:02.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:02.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:02.764 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:06:03.228 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:06:03.272 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:06:03.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:03.272 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:06:03.273 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:06:03.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:03.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:03.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:03.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:03.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:03.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:03.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:03.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:03.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:03.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:03.278 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:06:08.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:08.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:08.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:08.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:08.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:08.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:08.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:08.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:08.286 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:08.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:08.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:06:08.287 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:06:08.287 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:06:08.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:08.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:08.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:08.287 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:06:08.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:08.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:06:08.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:08.289 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:06:08.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:06:08.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:08.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:08.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:08.289 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:06:08.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:08.289 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:06:08.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:08.291 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:06:08.291 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:06:08.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:08.291 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:08.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:08.291 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:06:08.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:08.291 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:06:08.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:08.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:06:08.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:06:08.294 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:06:08.294 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:06:08.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:08.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:08.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:08.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:08.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:08.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:08.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:08.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:08.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:08.299 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:06:08.762 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:06:08.807 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:06:08.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:08.808 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:06:08.808 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:06:08.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:06:08.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:06:08.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:06:08.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:08.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:06:08.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:06:08.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:06:08.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:06:09.225 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:06:09.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:09.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:09.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:09.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:09.689 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:06:10.153 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:06:10.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:10.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:10.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:10.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:10.616 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:06:11.080 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:06:11.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:11.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:11.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:11.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:11.543 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:06:11.860 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:06:11.860 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-22 03:06:11.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:11.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:11.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:06:11.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:06:11.910 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:06:11.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:11.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:11.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:11.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:11.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:11.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:11.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:11.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:11.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:11.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:11.913 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:06:11.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:16.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:16.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:16.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:16.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:16.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:16.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:16.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:16.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:16.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:16.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:16.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:06:16.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:06:16.919 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:06:16.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:16.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:16.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:06:16.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:16.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:06:16.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:16.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:16.920 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:06:16.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:06:16.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:16.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:16.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:16.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:06:16.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:16.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:06:16.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:16.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:06:16.921 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:06:16.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:16.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:16.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:16.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:06:16.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:16.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:06:16.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:06:16.923 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:06:16.923 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:06:16.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:16.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:16.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:16.928 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:06:17.396 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:06:17.441 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:06:17.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:17.443 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:06:17.444 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:06:17.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:06:17.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:06:17.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:06:17.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:17.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:06:17.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:06:17.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:06:17.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:06:17.861 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:06:17.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:17.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:17.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:17.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:18.327 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:06:18.791 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:06:18.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:18.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:18.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:18.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:19.258 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:06:19.722 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:06:19.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:19.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:19.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:19.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:20.188 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:06:20.546 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:06:20.546 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-22 03:06:20.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:20.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:20.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:06:20.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:20.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:20.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:20.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:21.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:06:21.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:06:21.136 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:06:21.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:21.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:21.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:21.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:21.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:21.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:21.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:21.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:21.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:21.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:21.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:21.146 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=923 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=923 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=923 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=923 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=923 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=923 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.146 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:21.147 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:26.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:26.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:26.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:26.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:26.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:26.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:26.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:26.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:26.199 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:26.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:26.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:06:26.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:06:26.201 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:06:26.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:26.202 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:26.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:26.202 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:06:26.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:26.202 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:06:26.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:26.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:06:26.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:06:26.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:26.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:26.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:06:26.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:26.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:26.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:06:26.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:26.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:06:26.204 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:06:26.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:26.204 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:26.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:26.204 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:06:26.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:26.204 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:06:26.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:26.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:06:26.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:06:26.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:06:26.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:06:26.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:06:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:06:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:06:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:06:26.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:06:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:06:26.294 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:06:26.294 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:06:26.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:26.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:26.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:26.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:26.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:26.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:26.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:26.295 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:06:31.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:31.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:31.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:31.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:31.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:31.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:31.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:31.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:31.303 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:31.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:31.303 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:06:31.305 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:06:31.305 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:06:31.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:31.306 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:31.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:31.306 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:06:31.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:31.306 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:06:31.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:31.308 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:06:31.308 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:06:31.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:31.308 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:31.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:31.308 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:06:31.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:31.308 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:06:31.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:31.312 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:06:31.312 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:06:31.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:31.312 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:31.312 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:06:31.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:31.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:31.312 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:06:31.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:31.314 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:06:31.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:06:31.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:06:31.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:06:31.314 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:06:31.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:06:31.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:06:31.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:06:31.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:06:31.315 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:06:31.315 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:06:31.315 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:31.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:31.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:31.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:06:31.782 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:06:31.828 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:06:31.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:31.829 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:06:31.830 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:06:31.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:06:31.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:06:31.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:06:31.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:31.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:06:31.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:06:31.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:06:31.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:06:32.245 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:06:32.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:32.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:32.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:32.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:32.707 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:06:33.169 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:06:33.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:33.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:33.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:33.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:33.632 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:06:34.095 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:06:34.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:34.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:34.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:34.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:34.557 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:06:34.875 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:06:34.875 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-22 03:06:34.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:34.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:35.020 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:06:35.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:35.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:35.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:35.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:35.483 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:06:35.947 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:06:36.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:36.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:36.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:36.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:36.412 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:06:36.879 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:06:37.344 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:06:37.809 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:06:38.274 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:06:38.738 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:06:39.203 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:06:39.669 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:06:39.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:06:39.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:06:39.876 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:06:39.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:39.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:39.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:39.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:39.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:39.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:39.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:39.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:39.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:39.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:39.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:39.881 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:06:44.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:44.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:44.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:44.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:44.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:44.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:44.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:44.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:44.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:44.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:44.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:06:44.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:06:44.905 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:06:44.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:44.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:44.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:44.906 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:06:44.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:44.906 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:06:44.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:44.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:06:44.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:06:44.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:44.907 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:44.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:44.907 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:06:44.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:44.907 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:06:44.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:44.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:06:44.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:06:44.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:44.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:44.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:44.910 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:06:44.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:44.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:06:44.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:06:44.914 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:06:44.914 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:06:44.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:44.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:44.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:44.919 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:06:45.385 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:06:45.442 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:06:45.443 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:06:45.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:45.444 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:06:45.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:06:45.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:06:45.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:06:45.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:45.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:06:45.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:06:45.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:06:45.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:06:45.852 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:06:45.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:45.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:45.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:45.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:46.318 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:06:46.784 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:06:46.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:46.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:46.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:46.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:47.250 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:06:47.717 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:06:47.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:47.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:47.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:47.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:48.183 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:06:48.484 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:06:48.484 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-22 03:06:48.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:48.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:48.654 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:06:48.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:48.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:48.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:48.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:49.120 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:06:49.585 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:06:49.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:49.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:49.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:49.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:50.051 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:06:50.517 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:06:50.981 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:06:51.446 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:06:51.911 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:06:52.375 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:06:52.840 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:06:53.305 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:06:53.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:06:53.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:06:53.488 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:06:53.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:53.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:53.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:53.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:53.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:53.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:53.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:53.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:53.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:53.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:53.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:53.507 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:06:53.507 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1882 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:53.507 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1882 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:53.507 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1882 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:53.507 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1882 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:53.507 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1882 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:53.508 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1882 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:53.508 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1882 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:06:58.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:06:58.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:06:58.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:58.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:58.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:58.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:58.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:06:58.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:58.531 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:58.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:06:58.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:06:58.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:06:58.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:06:58.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:58.535 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:58.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:06:58.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:06:58.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:06:58.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:06:58.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:58.538 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:06:58.538 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:06:58.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:58.538 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:58.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:06:58.539 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:06:58.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:06:58.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:06:58.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:58.541 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:06:58.541 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:06:58.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:58.541 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:06:58.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:06:58.541 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:06:58.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:06:58.541 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:06:58.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:58.543 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:06:58.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:06:58.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:06:58.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:06:58.543 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:06:58.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:06:58.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:06:58.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:06:58.544 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:06:58.544 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:06:58.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:58.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:58.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:06:58.549 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:06:59.019 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:06:59.073 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:06:59.074 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:06:59.075 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:06:59.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:06:59.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:06:59.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:06:59.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:06:59.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:06:59.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:06:59.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:06:59.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:06:59.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:06:59.487 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:06:59.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:06:59.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:06:59.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:06:59.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:06:59.953 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:07:00.419 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:07:00.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:00.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:00.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:00.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:00.888 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:07:01.354 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:07:01.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:01.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:01.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:01.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:01.821 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:07:02.119 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:07:02.119 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-22 03:07:02.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:02.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:02.286 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:07:02.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:02.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:02.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:02.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:02.751 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:07:03.216 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:07:03.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:03.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:03.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:03.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:03.682 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:07:04.146 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:07:04.611 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:07:05.077 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:07:05.542 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:07:06.006 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:07:06.471 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:07:06.940 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:07:07.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:07.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:07.122 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:07:07.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:07.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:07.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:07.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:07.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:07.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:07.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:07.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:07.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:07.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:07.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:07.142 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:07:07.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1881 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:07.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1881 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:07.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1881 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:07.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1881 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:07.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1881 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:07.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1881 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:12.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:12.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:12.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:12.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:12.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:12.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:12.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:12.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:12.161 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:12.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:12.162 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:07:12.163 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:07:12.163 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:07:12.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:12.163 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:12.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:12.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:07:12.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:12.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:07:12.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:12.165 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:07:12.165 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:07:12.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:12.165 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:12.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:12.165 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:07:12.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:12.165 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:07:12.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:12.166 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:07:12.166 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:07:12.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:12.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:12.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:12.166 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:07:12.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:12.166 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:07:12.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:07:12.168 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:07:12.168 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:07:12.168 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:12.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:12.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:12.173 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:07:12.642 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:07:12.695 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:07:12.697 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:07:12.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:12.699 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:07:12.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:12.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:12.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:07:12.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:12.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:07:12.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:07:12.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:07:12.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:07:12.732 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:07:12.732 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-22 03:07:12.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:12.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:13.106 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:07:13.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:13.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:13.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:13.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:13.571 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:07:14.035 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:07:14.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:14.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:14.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:14.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:14.502 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:07:14.966 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:07:15.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:15.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:15.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:15.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:15.431 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:07:15.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:07:16.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:16.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:16.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:16.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:16.360 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:07:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:07:17.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:17.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:17.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:17.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:17.289 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:07:17.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:17.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:17.734 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:07:17.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:17.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:17.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:17.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:17.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:17.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:17.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:17.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:17.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:17.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:17.750 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:07:17.750 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1223 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.750 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1223 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.750 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1223 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.750 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1224 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.751 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1224 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.751 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1224 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.751 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1224 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.751 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1224 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.751 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1224 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.751 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1224 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:17.751 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1224 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:22.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:22.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:22.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:22.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:22.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:22.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:22.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:22.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:22.771 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:22.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:22.771 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:07:22.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:07:22.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:07:22.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:22.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:22.772 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:07:22.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:22.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:22.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:07:22.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:22.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:07:22.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:07:22.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:22.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:22.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:07:22.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:22.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:22.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:07:22.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:22.775 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:07:22.775 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:07:22.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:22.775 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:22.775 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:07:22.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:22.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:22.776 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:07:22.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:07:22.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:07:22.778 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:07:22.778 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:07:22.778 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:22.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:22.782 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:07:23.248 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:07:23.303 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:07:23.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:23.305 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:07:23.305 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:07:23.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:23.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:23.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:07:23.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:23.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:07:23.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:07:23.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:07:23.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:07:23.714 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:07:23.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:23.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:23.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:23.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:24.179 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:07:24.644 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:07:24.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:24.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:24.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:24.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:25.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:07:25.576 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:07:25.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:25.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:25.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:25.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:26.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:07:26.342 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:07:26.342 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-22 03:07:26.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:26.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:26.510 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:07:26.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:26.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:26.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:26.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:26.978 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:07:27.442 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:07:27.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:27.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:27.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:27.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:27.906 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:07:28.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:28.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:28.344 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:07:28.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:28.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:28.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:28.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:28.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:28.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:28.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:28.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:28.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:28.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:28.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:28.363 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:07:28.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1223 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:28.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1223 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:28.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1223 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:28.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1223 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:28.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1223 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:28.364 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1223 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:33.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:33.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:33.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:33.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:33.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:33.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:33.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:33.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:33.371 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:33.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:33.371 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:07:33.372 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:07:33.372 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:07:33.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:33.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:33.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:33.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:07:33.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:33.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:07:33.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:33.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:07:33.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:07:33.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:33.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:33.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:33.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:07:33.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:33.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:07:33.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:33.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:07:33.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:07:33.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:33.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:33.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:33.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:07:33.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:33.374 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:07:33.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:07:33.376 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:07:33.376 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:07:33.376 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:33.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:33.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:33.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:33.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:33.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:33.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:33.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:33.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:33.381 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:07:33.848 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:07:33.888 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:07:33.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:33.889 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:07:33.889 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:07:33.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:33.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:33.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:07:33.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:33.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:07:33.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:07:33.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:07:33.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:07:34.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:07:34.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:34.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:34.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:34.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:34.777 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:07:35.241 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:07:35.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:35.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:35.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:35.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:35.709 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:07:36.173 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:07:36.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:36.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:36.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:36.636 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:07:37.102 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:07:37.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:37.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:37.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:37.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:37.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:37.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:37.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:37.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:37.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:37.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:37.142 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:07:37.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=827 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:37.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:37.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:37.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:37.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:37.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:37.142 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:42.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:42.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:42.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:42.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:42.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:42.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:42.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:42.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:42.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:42.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:42.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:07:42.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:07:42.145 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:07:42.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:42.145 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:42.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:42.145 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:07:42.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:42.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:07:42.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:42.146 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:07:42.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:07:42.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:42.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:42.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:42.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:07:42.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:42.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:07:42.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:42.147 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:07:42.147 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:07:42.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:42.147 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:42.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:42.147 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:07:42.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:42.147 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:07:42.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:42.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:07:42.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:07:42.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:07:42.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:07:42.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:07:42.149 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:42.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:42.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:42.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:42.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:42.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:42.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:42.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:42.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:42.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:42.154 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:07:42.619 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:07:42.695 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:07:42.695 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:07:42.697 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:07:42.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:42.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:42.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:42.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:07:42.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:42.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:07:42.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:07:42.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:07:42.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:07:43.084 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:07:43.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:43.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:43.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:43.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:43.548 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:07:44.014 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:07:44.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:44.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:44.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:44.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:44.479 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:07:44.945 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:07:45.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:45.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:45.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:45.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:45.410 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:07:45.873 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:07:46.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:46.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:46.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:46.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:46.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:46.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:46.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:46.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:46.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:46.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:46.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:46.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:46.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:46.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:46.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:46.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:46.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:46.186 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:07:51.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:51.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:51.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:51.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:51.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:51.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:51.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:51.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:51.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:51.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:51.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:07:51.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:07:51.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:07:51.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:51.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:51.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:51.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:07:51.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:51.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:07:51.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:51.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:07:51.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:07:51.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:51.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:51.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:51.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:07:51.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:51.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:07:51.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:51.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:07:51.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:07:51.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:51.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:51.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:51.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:07:51.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:51.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:07:51.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:51.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:07:51.224 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:07:51.224 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:07:51.224 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:51.229 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:07:51.696 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:07:51.741 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:07:51.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:51.741 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:07:51.742 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:07:51.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:51.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:51.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:07:51.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:51.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:07:51.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:07:51.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:07:51.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:07:52.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:52.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:52.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:52.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:52.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:52.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:52.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:52.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:52.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:52.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:52.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:52.022 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:07:52.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:52.023 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=174 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:52.023 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:52.023 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:52.023 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:52.023 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:52.023 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:52.023 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:52.023 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:07:57.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:57.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:57.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:57.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:57.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:57.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:57.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:57.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:57.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:57.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:07:57.022 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:07:57.023 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:07:57.023 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:07:57.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:57.023 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:57.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:57.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:07:57.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:07:57.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:07:57.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:57.024 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:07:57.024 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:07:57.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:57.024 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:57.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:57.024 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:07:57.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:07:57.024 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:07:57.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:57.025 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:07:57.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:07:57.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:57.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:07:57.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:57.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:07:57.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:07:57.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:07:57.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:57.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:07:57.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:07:57.027 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:07:57.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:07:57.031 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:07:57.497 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:07:57.544 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:07:57.545 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:07:57.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:07:57.546 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:07:57.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:57.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:57.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:07:57.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:07:57.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:07:57.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:07:57.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:07:57.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:07:57.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:07:57.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:07:57.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:07:57.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:07:57.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:07:57.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:07:57.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:07:57.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:07:57.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:07:57.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:07:57.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:07:57.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:07:57.768 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:08:02.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:02.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:02.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:02.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:02.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:02.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:02.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:02.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:02.777 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:02.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:02.777 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:08:02.777 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:08:02.777 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:08:02.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:02.777 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:02.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:02.778 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:08:02.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:02.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:08:02.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:02.778 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:08:02.778 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:08:02.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:02.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:02.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:02.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:08:02.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:02.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:08:02.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:02.779 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:08:02.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:08:02.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:02.779 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:02.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:02.779 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:08:02.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:02.780 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:08:02.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:08:02.781 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:08:02.781 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:08:02.781 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:02.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:02.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:02.786 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:08:03.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:08:03.298 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:08:03.300 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:08:03.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:08:03.301 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:08:03.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:08:03.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:08:03.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:08:03.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:08:03.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:08:03.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:08:03.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:08:03.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:08:03.718 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:08:03.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:03.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:03.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:03.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:04.181 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:08:04.645 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:08:04.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:04.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:04.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:04.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:05.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:08:05.575 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:08:05.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:05.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:05.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:05.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:06.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:08:06.504 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:08:06.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:06.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:06.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:06.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:06.971 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:08:07.434 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:08:07.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:07.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:07.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:07.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:07.898 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:08:08.361 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:08:08.824 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:08:09.289 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:08:09.752 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:08:10.215 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:08:10.679 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:08:11.142 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:08:11.606 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:08:12.069 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:08:12.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:08:12.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:08:12.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:12.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:12.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:12.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:12.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:12.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:12.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:12.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:12.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:12.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:12.377 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:08:17.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:17.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:17.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:17.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:17.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:17.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:17.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:17.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:17.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:17.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:17.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:08:17.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:08:17.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:08:17.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:17.384 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:17.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:17.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:08:17.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:17.384 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:08:17.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:17.385 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:08:17.385 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:08:17.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:17.385 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:17.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:17.385 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:08:17.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:17.385 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:08:17.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:17.386 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:08:17.386 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:08:17.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:17.386 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:17.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:17.386 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:08:17.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:17.386 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:08:17.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:17.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:08:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:08:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:08:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:08:17.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:08:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:08:17.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:08:17.388 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:08:17.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:17.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:08:17.859 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:08:17.922 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:08:17.924 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:08:17.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:08:17.926 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:08:17.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:08:17.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:08:17.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:08:17.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:08:17.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:08:17.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:08:17.934 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:08:17.934 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:08:18.324 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:08:18.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:18.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:18.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:18.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:18.790 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:08:19.256 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:08:19.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:19.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:19.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:19.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:19.721 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:08:20.186 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:08:20.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:20.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:20.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:20.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:20.656 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:08:21.127 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:08:21.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:21.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:21.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:21.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:21.594 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:08:22.060 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:08:22.524 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:08:22.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:22.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:22.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:22.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:22.987 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:08:23.451 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:08:23.914 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:08:24.377 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:08:24.840 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:08:25.304 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:08:25.767 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:08:26.231 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:08:26.696 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:08:27.161 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:08:27.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:08:27.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:08:27.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:27.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:27.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:27.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:27.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:27.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:27.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:27.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:27.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:27.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:27.257 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:08:27.257 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.257 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.257 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.257 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.257 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.257 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.258 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2165 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.258 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2165 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.258 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2165 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.258 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2165 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.258 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2165 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.258 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2165 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.258 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2165 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:27.258 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2165 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:32.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:32.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:32.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:32.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:32.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:32.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:32.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:32.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:32.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:32.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:32.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:08:32.259 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:08:32.259 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:08:32.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:32.259 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:32.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:32.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:08:32.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:32.260 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:08:32.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:32.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:08:32.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:08:32.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:32.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:32.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:08:32.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:32.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:32.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:08:32.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:32.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:08:32.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:08:32.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:32.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:32.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:08:32.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:32.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:32.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:08:32.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:08:32.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:08:32.264 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:08:32.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:32.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:32.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:32.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:32.269 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:08:32.738 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:08:32.794 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:08:32.795 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:08:32.797 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:08:32.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:08:32.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:08:32.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:08:32.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:08:32.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:08:32.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:08:32.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:08:32.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:08:32.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:08:33.205 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:08:33.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:33.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:33.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:33.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:33.670 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:08:34.135 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:08:34.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:34.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:34.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:34.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:34.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:08:35.065 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:08:35.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:35.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:35.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:35.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:35.531 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:08:35.832 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:08:35.832 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-22 03:08:35.833 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:08:35.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:08:35.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:08:35.995 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:08:36.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:36.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:36.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:36.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:36.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:08:36.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:08:36.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:08:36.865 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:08:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:08:36.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:36.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:36.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:36.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:36.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:36.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:36.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:36.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:36.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:36.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:36.867 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:08:41.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:41.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:41.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:41.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:41.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:41.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:41.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:41.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:41.872 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:41.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:41.872 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:08:41.873 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:08:41.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:08:41.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:41.873 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:41.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:41.873 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:08:41.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:41.873 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:08:41.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:41.874 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:08:41.874 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:08:41.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:41.874 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:41.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:41.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:08:41.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:41.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:08:41.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:41.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:08:41.875 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:08:41.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:41.875 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:41.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:41.875 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:08:41.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:41.875 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:08:41.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:08:41.877 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:08:41.877 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:08:41.877 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:41.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:41.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:41.882 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:08:42.345 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:08:42.393 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:08:42.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:08:42.394 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:08:42.395 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:08:42.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:42.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:42.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:42.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:42.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:42.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:42.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:42.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:42.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:42.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:42.448 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:08:42.448 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:42.448 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:42.448 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:42.448 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:42.448 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:08:47.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:47.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:47.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:47.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:47.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:47.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:47.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:47.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:47.454 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:47.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:08:47.454 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:08:47.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:08:47.455 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:08:47.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:47.455 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:47.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:47.455 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:08:47.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:08:47.455 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:08:47.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:47.456 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:08:47.456 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:08:47.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:47.456 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:47.456 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:08:47.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:47.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:08:47.456 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:08:47.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:47.458 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:08:47.458 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:08:47.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:47.458 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:08:47.458 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:08:47.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:47.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:08:47.458 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:08:47.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:47.460 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:08:47.460 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:08:47.460 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:08:47.460 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:08:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:08:47.465 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:08:47.931 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:08:47.977 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:08:47.977 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:08:47.977 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:08:47.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:08:48.395 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:08:48.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:48.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:48.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:48.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:48.858 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:08:49.322 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:08:49.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:49.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:49.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:49.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:49.787 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:08:50.252 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:08:50.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:50.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:50.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:50.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:50.717 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:08:51.183 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:08:51.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:51.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:51.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:51.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:51.647 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:08:52.111 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:08:52.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:52.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:52.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:52.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:52.574 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:08:53.038 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:08:53.501 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:08:53.965 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:08:54.428 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:08:54.891 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:08:55.354 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:08:55.818 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:08:56.280 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:08:56.743 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:08:56.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:08:56.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:08:56.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:08:56.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:08:56.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:08:56.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:08:56.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:08:56.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:08:57.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:08:57.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:08:57.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:08:57.000 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:09:02.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:02.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:02.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:02.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:02.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:02.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:02.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:02.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:02.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:02.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:02.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:09:02.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:09:02.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:09:02.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:02.010 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:02.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:02.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:09:02.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:02.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:09:02.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:02.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:09:02.012 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:09:02.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:02.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:02.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:02.012 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:09:02.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:02.012 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:09:02.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:02.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:09:02.014 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:09:02.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:02.014 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:02.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:02.014 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:09:02.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:02.014 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:09:02.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:02.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:09:02.017 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:09:02.017 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:09:02.018 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:02.022 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:09:02.488 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:09:02.541 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:09:02.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:02.542 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:09:02.543 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:09:02.953 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:09:03.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:03.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:03.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:03.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:03.418 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:09:03.882 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:09:04.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:04.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:04.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:04.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:04.347 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:09:04.813 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:09:05.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:05.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:05.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:05.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:05.279 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:09:05.743 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:09:06.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:06.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:06.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:06.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:06.208 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:09:06.673 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:09:07.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:07.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:07.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:07.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:07.139 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:09:07.604 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:09:08.070 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:09:08.538 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:09:09.000 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:09:09.463 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:09:09.927 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:09:10.390 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:09:10.852 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:09:11.315 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:09:11.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:11.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:11.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:11.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:11.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:11.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:11.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:11.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:11.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:11.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:11.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:11.626 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:09:11.626 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2110 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:11.626 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2110 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:11.626 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2110 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:11.627 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2110 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:11.627 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2110 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:11.627 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2110 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:11.627 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2110 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:11.627 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2110 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:16.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:16.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:16.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:16.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:16.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:16.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:16.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:16.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:16.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:16.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:16.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:09:16.642 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:09:16.642 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:09:16.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:16.643 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:16.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:16.643 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:09:16.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:16.643 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:09:16.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:16.644 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:09:16.644 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:09:16.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:16.644 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:16.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:16.644 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:09:16.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:16.645 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:09:16.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:16.646 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:09:16.646 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:09:16.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:16.646 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:16.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:16.646 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:09:16.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:16.646 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:09:16.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:16.648 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:09:16.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:09:16.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:09:16.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:09:16.648 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:09:16.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:09:16.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:09:16.649 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:09:16.649 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:09:16.649 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:16.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:16.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:16.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:16.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:16.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:16.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:16.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:16.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:16.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:16.654 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:09:17.117 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:09:17.168 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:09:17.168 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:09:17.169 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:09:17.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:17.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:09:17.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:17.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:17.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:17.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:18.042 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:09:18.506 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:09:18.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:18.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:18.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:18.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:18.969 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:09:19.432 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:09:19.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:19.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:19.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:19.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:19.894 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:09:20.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:20.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:20.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:20.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:20.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:20.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:20.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:20.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:20.182 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:09:20.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=779 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:20.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=779 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:20.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=779 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:20.182 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=779 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:25.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:25.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:25.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:25.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:25.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:25.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:25.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:25.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:25.197 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:25.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:25.197 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:09:25.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:09:25.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:09:25.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:25.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:25.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:25.200 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:09:25.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:25.200 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:09:25.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:25.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:09:25.202 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:09:25.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:25.202 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:25.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:25.202 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:09:25.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:25.202 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:09:25.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:25.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:09:25.204 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:09:25.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:25.204 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:25.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:25.204 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:09:25.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:25.204 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:09:25.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:09:25.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:09:25.207 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:09:25.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:09:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:25.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:09:25.675 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:09:25.722 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:09:25.723 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:09:25.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:25.723 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:09:25.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:09:25.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:09:25.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:09:25.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:09:25.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:09:25.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:09:25.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:09:25.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:09:25.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:25.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:09:25.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:09:25.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:09:25.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:09:26.139 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:09:26.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:26.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:09:26.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:09:26.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:09:26.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:26.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:26.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:26.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:26.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:26.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:26.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:26.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:26.147 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:26.147 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:26.147 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:09:26.147 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:26.147 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:26.147 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:26.147 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:26.147 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:31.147 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:31.147 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:31.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:31.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:31.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:31.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:31.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:31.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:31.151 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:31.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:31.151 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:09:31.153 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:09:31.153 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:09:31.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:31.153 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:31.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:31.153 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:09:31.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:31.153 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:09:31.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:31.154 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:09:31.154 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:09:31.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:31.154 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:31.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:31.154 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:09:31.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:31.154 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:09:31.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:31.155 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:09:31.155 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:09:31.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:31.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:31.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:31.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:09:31.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:31.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:09:31.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:31.156 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:09:31.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:09:31.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:09:31.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:09:31.156 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:09:31.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:09:31.157 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:09:31.157 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:09:31.157 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:31.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:31.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:31.161 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:09:31.631 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:09:31.669 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:09:31.669 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:09:31.670 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:09:31.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:31.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:31.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:31.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:31.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:31.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:31.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:31.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:31.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:31.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:31.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:31.674 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:09:31.674 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:31.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:31.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:31.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:31.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:31.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:31.675 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:36.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:36.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:36.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:36.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:36.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:36.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:36.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:36.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:36.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:36.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:36.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:09:36.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:09:36.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:09:36.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:36.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:36.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:36.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:09:36.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:36.680 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:09:36.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:36.681 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:09:36.681 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:09:36.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:36.681 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:36.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:36.681 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:09:36.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:36.681 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:09:36.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:36.682 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:09:36.682 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:09:36.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:36.682 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:36.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:36.682 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:09:36.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:36.682 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:09:36.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:09:36.684 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:09:36.684 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:09:36.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:09:36.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:36.689 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:09:37.151 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:09:37.197 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:09:37.197 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:09:37.198 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:09:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:37.614 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:09:37.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:37.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:37.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:37.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:38.076 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:09:38.538 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:09:38.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:38.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:38.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:38.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:39.000 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:09:39.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:39.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:39.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:39.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:39.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:39.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:39.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:39.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:39.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:39.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:39.205 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:09:44.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:44.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:44.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:44.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:44.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:44.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:44.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:44.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:44.228 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:44.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:44.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:09:44.229 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:09:44.229 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:09:44.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:44.229 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:44.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:44.230 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:09:44.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:44.230 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:09:44.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:44.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:09:44.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:09:44.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:44.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:44.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:44.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:09:44.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:44.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:09:44.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:44.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:09:44.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:09:44.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:44.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:44.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:44.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:09:44.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:44.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:09:44.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:09:44.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:09:44.234 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:09:44.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:44.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:44.239 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:09:44.708 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:09:44.757 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:09:44.759 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:09:44.762 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:09:44.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:44.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:09:44.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:09:44.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:09:44.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:09:44.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:09:44.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:09:44.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:09:44.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:09:45.174 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:09:45.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:45.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:45.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:45.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:45.638 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:09:46.107 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:09:46.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:46.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:46.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:46.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:46.575 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:09:47.039 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:09:47.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:47.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:47.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:47.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:47.504 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:09:47.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:09:47.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:09:47.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:47.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:47.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:47.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:47.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:47.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:47.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:47.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:47.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:47.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:47.522 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:09:47.522 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=720 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:47.522 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=720 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:47.522 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=720 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:47.522 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:47.522 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:47.522 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:47.522 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:47.522 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:52.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:52.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:52.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:52.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:52.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:52.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:52.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:52.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:52.524 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:52.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:09:52.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:09:52.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:09:52.526 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:09:52.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:52.526 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:52.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:52.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:09:52.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:09:52.526 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:09:52.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:52.527 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:09:52.527 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:09:52.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:52.527 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:52.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:52.527 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:09:52.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:09:52.527 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:09:52.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:52.528 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:09:52.528 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:09:52.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:52.528 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:09:52.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:52.528 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:09:52.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:09:52.528 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:09:52.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:09:52.530 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:09:52.530 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:09:52.530 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:09:52.534 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:09:53.001 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:09:53.058 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:09:53.060 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:09:53.061 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:09:53.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:09:53.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:09:53.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:09:53.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:09:53.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:09:53.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:09:53.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:09:53.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:09:53.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:09:53.468 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:09:53.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:53.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:53.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:53.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:53.932 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:09:54.395 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:09:54.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:54.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:54.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:54.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:54.860 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:09:55.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:09:55.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:09:55.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:09:55.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:09:55.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:09:55.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:09:55.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:09:55.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:09:55.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:09:55.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:09:55.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:09:55.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:09:55.119 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:09:55.119 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:55.119 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:55.119 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:09:55.119 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:00.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:00.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:00.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:00.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:00.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:00.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:00.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:00.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:00.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:00.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:00.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:10:00.122 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:10:00.122 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:10:00.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:00.122 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:00.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:00.122 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:10:00.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:00.122 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:10:00.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:00.123 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:10:00.123 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:10:00.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:00.123 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:00.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:00.123 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:10:00.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:00.123 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:10:00.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:00.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:10:00.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:10:00.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:00.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:00.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:00.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:10:00.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:00.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:10:00.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:00.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:10:00.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:10:00.126 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:10:00.127 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:00.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:10:00.600 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:10:00.654 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:10:00.657 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:10:00.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:00.660 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:10:00.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:00.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:10:00.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:10:00.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:10:00.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:10:00.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:10:00.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:10:01.066 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:10:01.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:01.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:01.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:01.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:01.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:10:01.995 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:10:02.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:02.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:02.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:02.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:02.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:10:02.926 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:10:03.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:03.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:03.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:03.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:03.391 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:10:03.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:03.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:03.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:03.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:03.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:03.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:03.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:03.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:03.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:03.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:03.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:03.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:03.406 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:10:08.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:08.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:08.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:08.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:08.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:08.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:08.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:08.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:08.411 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:08.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:08.411 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:10:08.411 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:10:08.411 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:10:08.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:08.411 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:08.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:08.411 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:10:08.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:08.412 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:10:08.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:08.412 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:10:08.412 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:10:08.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:08.412 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:08.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:08.412 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:10:08.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:08.412 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:10:08.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:08.413 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:10:08.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:10:08.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:08.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:08.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:08.413 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:10:08.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:08.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:10:08.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:10:08.415 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:10:08.415 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:10:08.415 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:08.420 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:10:08.885 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:10:08.939 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:10:08.941 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:10:08.942 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:10:08.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:08.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:08.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:08.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:10:08.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:10:08.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:10:08.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:10:08.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:10:08.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:10:09.350 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:10:09.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:09.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:09.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:09.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:09.815 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:10:10.280 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:10:10.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:10.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:10.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:10.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:10.743 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:10:10.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:10.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:10.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:10.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:10.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:10.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:10.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:10.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:10.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:10.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:10.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:10.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:10.994 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:10:15.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:15.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:15.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:16.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:16.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:16.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:16.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:16.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:16.012 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:16.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:16.012 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:10:16.014 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:10:16.014 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:10:16.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:16.014 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:16.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:16.014 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:10:16.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:16.014 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:10:16.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:16.016 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:10:16.016 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:10:16.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:16.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:16.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:16.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:10:16.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:16.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:10:16.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:16.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:10:16.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:10:16.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:16.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:16.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:16.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:10:16.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:16.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:10:16.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:16.019 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:10:16.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:10:16.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:10:16.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:10:16.019 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:10:16.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:10:16.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:10:16.020 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:10:16.020 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:10:16.020 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:16.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:16.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:16.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:16.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:16.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:16.025 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:10:16.492 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:10:16.542 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:10:16.543 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:10:16.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:16.543 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:10:16.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:16.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:16.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:10:16.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:10:16.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:10:16.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:10:16.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:10:16.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:10:16.955 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:10:17.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:17.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:17.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:17.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:17.418 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:10:17.882 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:10:18.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:18.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:18.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:18.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:18.346 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:10:18.809 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:10:19.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:19.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:19.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:19.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:19.274 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:10:19.739 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:10:20.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:20.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:20.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:20.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:20.202 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:10:20.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:20.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:20.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:20.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:20.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:20.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:20.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:20.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:20.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:20.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:20.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:20.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:20.216 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:10:25.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:25.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:25.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:25.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:25.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:25.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:25.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:25.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:25.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:25.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:25.230 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:10:25.233 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:10:25.233 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:10:25.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:25.233 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:25.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:25.234 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:10:25.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:25.234 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:10:25.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:25.237 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:10:25.238 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:10:25.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:25.238 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:25.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:25.238 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:10:25.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:25.238 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:10:25.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:25.241 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:10:25.241 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:10:25.241 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:25.241 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:25.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:25.241 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:10:25.241 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:25.241 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:10:25.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:25.245 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:10:25.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:10:25.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:10:25.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:10:25.245 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:10:25.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:10:25.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:10:25.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:10:25.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:10:25.246 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:10:25.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:25.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:25.251 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:10:25.716 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:10:25.766 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:10:25.767 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:10:25.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:25.767 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:10:25.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:25.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:25.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:10:25.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:10:25.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:10:25.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:10:25.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:10:25.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:10:26.179 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:10:26.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:26.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:26.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:26.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:26.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:10:27.107 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:10:27.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:27.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:27.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:27.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:27.571 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:10:28.034 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:10:28.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:28.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:28.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:28.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:28.497 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:10:28.960 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:10:29.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:29.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:29.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:29.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:29.424 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:10:29.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:29.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:29.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:29.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:29.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:29.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:29.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:29.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:29.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:29.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:29.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:29.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:29.675 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:10:34.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:34.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:34.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:34.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:34.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:34.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:34.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:34.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:34.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:34.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:34.684 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:10:34.685 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:10:34.685 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:10:34.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:34.685 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:34.686 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:10:34.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:34.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:34.686 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:10:34.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:34.687 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:10:34.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:10:34.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:34.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:34.687 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:10:34.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:34.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:34.687 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:10:34.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:34.688 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:10:34.688 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:10:34.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:34.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:34.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:34.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:10:34.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:34.689 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:10:34.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:10:34.691 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:10:34.691 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:10:34.691 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:34.696 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:10:35.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:10:35.207 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:10:35.207 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:10:35.208 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:10:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:35.622 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:10:35.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:35.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:35.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:35.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:36.086 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:10:36.550 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:10:36.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:36.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:36.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:36.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:37.013 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:10:37.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:37.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:37.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:37.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:37.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:37.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:37.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:37.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:37.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:37.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:37.212 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:10:42.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:42.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:42.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:42.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:42.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:42.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:42.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:42.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:42.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:42.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:42.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:10:42.222 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:10:42.223 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:10:42.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:42.223 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:42.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:42.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:10:42.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:42.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:10:42.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:42.224 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:10:42.225 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:10:42.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:42.225 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:42.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:42.225 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:10:42.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:42.225 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:10:42.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:42.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:10:42.226 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:10:42.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:42.227 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:42.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:42.227 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:10:42.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:42.227 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:10:42.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:10:42.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:10:42.230 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:10:42.230 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:10:42.230 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:42.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:42.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:42.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:42.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:42.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:42.234 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:10:42.699 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:10:42.751 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:10:42.752 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:10:42.752 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:10:42.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:42.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:42.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:42.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:10:42.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:42.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:43.164 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:10:43.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:43.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:43.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:43.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:43.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:10:44.091 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:10:44.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:44.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:44.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:44.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:44.554 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:10:45.017 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:10:45.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:45.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:45.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:45.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:45.479 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:10:45.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:45.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:45.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:45.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:45.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:45.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:45.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:45.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:45.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:45.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:45.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:45.773 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:10:45.773 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=780 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:45.773 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=780 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:45.773 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=780 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:45.773 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=780 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:45.773 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=780 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:45.773 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=780 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:45.773 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=780 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:45.773 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=780 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:50.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:50.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:50.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:50.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:50.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:50.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:50.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:50.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:50.782 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:50.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:50.782 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:10:50.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:10:50.783 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:10:50.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:50.783 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:50.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:50.783 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:10:50.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:50.783 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:10:50.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:50.784 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:10:50.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:10:50.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:50.785 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:50.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:50.785 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:10:50.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:50.785 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:10:50.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:50.786 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:10:50.786 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:10:50.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:50.787 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:50.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:50.787 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:10:50.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:50.787 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:10:50.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:50.789 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:10:50.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:10:50.790 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:10:50.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:50.794 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:10:51.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:10:51.317 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:10:51.321 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:10:51.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:51.322 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:10:51.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:51.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:51.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:10:51.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:51.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:51.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:51.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:51.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:51.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:51.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:51.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:51.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:51.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:51.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:51.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:51.343 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:10:51.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:51.343 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:51.344 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:51.344 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:51.344 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:51.344 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:51.344 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:51.344 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:56.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:56.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:56.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:56.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:56.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:56.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:56.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:56.350 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:56.350 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:56.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:10:56.351 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:10:56.352 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:10:56.352 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:10:56.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:56.352 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:56.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:56.352 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:10:56.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:10:56.352 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:10:56.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:56.353 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:10:56.353 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:10:56.353 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:56.353 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:56.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:56.354 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:10:56.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:10:56.354 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:10:56.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:56.355 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:10:56.355 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:10:56.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:56.355 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:10:56.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:56.355 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:10:56.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:10:56.355 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:10:56.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:56.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:10:56.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:10:56.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:10:56.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:10:56.357 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:10:56.357 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:10:56.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:10:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:56.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:10:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:10:56.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:56.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:56.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:56.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:56.362 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:10:56.833 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:10:56.878 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:10:56.880 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:10:56.882 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:10:56.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:56.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:10:56.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:10:56.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:10:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:56.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:57.297 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:10:57.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:57.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:57.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:57.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:57.764 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:10:58.234 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:10:58.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:58.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:58.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:58.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:58.698 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:10:59.161 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:10:59.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:59.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:59.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:59.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:59.628 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:10:59.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:10:59.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:10:59.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:10:59.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:10:59.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:10:59.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:10:59.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:10:59.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:10:59.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:10:59.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:10:59.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:10:59.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:10:59.942 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:10:59.942 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:59.942 [WARNING] transceiver.py:257 (TRX1@172.18.205.20:5700/1) RX TRXD message (ver=1 fn=784 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:59.942 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:59.942 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:59.942 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:59.942 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:59.942 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:10:59.942 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=784 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:04.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:04.941 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:04.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:04.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:04.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:04.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:04.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:04.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:04.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:04.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:04.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:11:04.967 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:11:04.967 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:11:04.967 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:04.967 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:04.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:04.968 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:11:04.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:04.968 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:11:04.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:04.969 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:11:04.969 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:11:04.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:04.969 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:04.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:04.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:11:04.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:04.969 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:11:04.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:04.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:11:04.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:11:04.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:04.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:04.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:04.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:11:04.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:04.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:11:04.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:04.972 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:11:04.972 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:11:04.973 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:11:04.973 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:04.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:04.977 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:11:05.447 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:11:05.489 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:11:05.490 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:11:05.490 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:11:05.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:05.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:11:05.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:11:05.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:11:05.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:05.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:05.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:05.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:05.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:05.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:05.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:05.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:05.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:05.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:05.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:05.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:05.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:05.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:05.506 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:11:10.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:10.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:10.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:10.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:10.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:10.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:10.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:10.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:10.521 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:10.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:10.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:11:10.523 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:11:10.523 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:11:10.523 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:10.523 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:10.523 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:11:10.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:10.523 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:10.523 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:11:10.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:10.525 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:11:10.525 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:11:10.525 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:10.525 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:10.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:10.525 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:11:10.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:10.526 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:11:10.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:10.527 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:11:10.527 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:11:10.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:10.527 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:10.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:10.527 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:11:10.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:10.527 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:11:10.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:11:10.529 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:11:10.529 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:11:10.529 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:11:10.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:10.534 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:11:11.001 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:11:11.051 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:11:11.054 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:11:11.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:11.056 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:11:11.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:11.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:11.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:11.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:11.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:11.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:11.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:11.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:11.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:11.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:11.071 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:11:11.072 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.072 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.072 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.072 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.072 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.072 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.072 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.073 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.073 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.073 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.073 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:11.073 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:16.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:16.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:16.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:16.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:16.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:16.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:16.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:16.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:16.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:16.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:16.856 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:11:16.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:11:16.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:11:16.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:16.856 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:16.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:16.857 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:11:16.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:16.857 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:11:16.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:16.860 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:11:16.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:11:16.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:16.861 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:16.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:16.861 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:11:16.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:16.862 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:11:16.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:16.865 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:11:16.865 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:11:16.866 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:16.866 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:16.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:16.866 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:11:16.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:16.867 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:11:16.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:16.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:16.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:16.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:16.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:16.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:16.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:16.873 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:11:16.873 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:11:16.873 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:11:16.873 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:11:16.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:16.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:16.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:16.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:11:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:16.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:16.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:16.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:16.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:16.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:16.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:16.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:16.878 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:11:17.342 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:11:17.405 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:11:17.408 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:11:17.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:17.409 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:11:17.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:17.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:17.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:17.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:17.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:17.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:17.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:17.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:17.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:17.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:17.419 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:11:22.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:22.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:22.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:22.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:22.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:22.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:22.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:22.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:22.427 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:22.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:22.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:11:22.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:11:22.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:11:22.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:22.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:22.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:22.429 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:11:22.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:22.429 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:11:22.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:22.431 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:11:22.431 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:11:22.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:22.431 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:22.431 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:11:22.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:22.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:22.431 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:11:22.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:22.432 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:11:22.432 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:11:22.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:22.432 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:22.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:22.432 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:11:22.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:22.432 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:11:22.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:22.434 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:11:22.435 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:11:22.435 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:11:22.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:22.440 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:11:22.904 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:11:22.953 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:11:22.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:22.953 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:11:22.954 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:11:22.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:22.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:22.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:22.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:22.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:22.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:22.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:22.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:22.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:22.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:22.959 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:11:22.959 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:22.959 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:27.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:27.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:27.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:27.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:27.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:27.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:27.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:27.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:27.967 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:27.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:27.967 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:11:27.968 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:11:27.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:11:27.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:27.968 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:27.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:27.968 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:11:27.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:27.968 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:11:27.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:27.969 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:11:27.969 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:11:27.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:27.969 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:27.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:27.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:11:27.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:27.969 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:11:27.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:27.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:11:27.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:11:27.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:27.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:27.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:27.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:11:27.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:27.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:11:27.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:11:27.972 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:11:27.972 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:11:27.972 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:27.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:27.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:27.977 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:11:28.440 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:11:28.486 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:11:28.487 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:11:28.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:28.488 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:11:28.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:28.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:28.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:28.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:28.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:28.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:28.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:28.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:28.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:28.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:28.491 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:11:28.491 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:28.491 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:28.491 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:28.491 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:28.491 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:28.491 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:28.491 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:28.491 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:33.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:33.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:33.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:33.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:33.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:33.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:33.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:33.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:33.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:33.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:33.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:11:33.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:11:33.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:11:33.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:33.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:33.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:33.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:11:33.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:33.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:11:33.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:33.501 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:11:33.501 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:11:33.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:33.501 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:33.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:33.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:11:33.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:33.501 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:11:33.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:33.502 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:11:33.502 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:11:33.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:33.502 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:33.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:33.502 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:11:33.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:33.502 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:11:33.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:11:33.504 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:11:33.504 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:11:33.504 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:33.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:33.509 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:11:33.974 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:11:34.023 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:11:34.024 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:11:34.025 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:11:34.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:34.438 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:11:34.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:34.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:34.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:34.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:34.903 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:11:35.366 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:11:35.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:35.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:35.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:35.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:35.829 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:11:36.292 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:11:36.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:36.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:36.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:36.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:36.756 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:11:37.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:11:37.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:11:37.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:11:37.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:11:37.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:11:37.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:11:37.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:11:37.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:11:37.219 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:11:37.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:37.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:37.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:37.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:37.683 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:11:38.146 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:11:38.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:38.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:38.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:38.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:38.609 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:11:39.072 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:11:39.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:11:39.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:11:39.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:39.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:39.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:39.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:39.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:39.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:39.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:39.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:39.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:39.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:39.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:39.187 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:11:39.187 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1251 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:39.187 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1251 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:39.187 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1251 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:39.187 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1251 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:39.187 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1251 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:39.187 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1251 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:39.187 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1251 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:11:44.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:44.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:44.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:44.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:44.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:44.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:44.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:44.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:44.192 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:44.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:44.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:11:44.192 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:11:44.192 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:11:44.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:44.192 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:44.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:44.193 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:11:44.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:44.193 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:11:44.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:44.193 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:11:44.193 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:11:44.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:44.193 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:44.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:44.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:11:44.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:44.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:11:44.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:44.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:11:44.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:11:44.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:44.194 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:44.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:44.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:11:44.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:44.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:11:44.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:44.196 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:11:44.196 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:11:44.196 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:11:44.196 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:44.201 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:11:44.664 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:11:44.709 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:11:44.710 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:11:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:44.710 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:11:44.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:11:44.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:11:44.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:11:44.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:44.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:44.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:44.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:44.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:44.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:44.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:44.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:44.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:44.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:44.724 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:11:49.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:49.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:49.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:49.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:49.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:49.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:49.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:49.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:49.730 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:49.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:49.730 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:11:49.730 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:11:49.730 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:49.731 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:49.731 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:49.731 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:49.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:11:49.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:49.732 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:11:49.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:49.732 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:11:49.732 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:11:49.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:49.732 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:49.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:49.733 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:11:49.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:49.733 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:11:49.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:11:49.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:11:49.734 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:11:49.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:49.739 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:11:50.202 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:11:50.245 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:11:50.246 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:11:50.246 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:11:50.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:50.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:11:50.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:11:50.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:11:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:50.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:50.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:50.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:50.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:50.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:50.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:50.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:50.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:50.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:50.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:50.260 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:11:55.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:55.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:55.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:55.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:55.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:55.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:55.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:55.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:55.265 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:55.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:11:55.265 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:11:55.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:11:55.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:11:55.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:55.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:55.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:55.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:11:55.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:11:55.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:11:55.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:55.267 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:11:55.267 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:11:55.267 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:55.267 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:55.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:55.267 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:11:55.267 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:11:55.268 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:11:55.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:55.268 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:11:55.268 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:11:55.268 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:55.268 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:11:55.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:55.268 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:11:55.269 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:11:55.269 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:11:55.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:11:55.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:11:55.270 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:11:55.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:11:55.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:55.275 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:11:55.738 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:11:55.785 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:11:55.785 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:11:55.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:55.786 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:11:55.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:11:55.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:11:55.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:11:55.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:11:55.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:55.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:11:55.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:11:55.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:11:55.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:11:55.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:11:55.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:11:55.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:11:55.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:11:55.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:11:55.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:11:55.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:11:55.800 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:12:00.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:00.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:00.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:00.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:00.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:00.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:00.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:00.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:00.806 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:00.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:00.806 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:12:00.807 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:12:00.807 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:12:00.807 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:00.807 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:00.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:00.807 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:12:00.807 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:00.807 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:12:00.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:00.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:12:00.808 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:12:00.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:00.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:00.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:00.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:12:00.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:00.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:12:00.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:00.809 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:12:00.809 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:12:00.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:00.809 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:00.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:00.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:12:00.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:00.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:12:00.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:00.810 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:12:00.811 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:12:00.811 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:12:00.811 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:00.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:00.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:00.816 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:12:01.281 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:12:01.323 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:12:01.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:01.324 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:12:01.324 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:12:01.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:01.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:01.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:01.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:01.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:01.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:01.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:01.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:01.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:01.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:01.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:01.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:01.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:01.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:01.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:01.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:01.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:01.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:01.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:01.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:01.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:01.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:01.342 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:12:06.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:06.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:06.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:06.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:06.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:06.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:06.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:06.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:06.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:06.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:06.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:12:06.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:12:06.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:12:06.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:06.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:06.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:06.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:12:06.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:06.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:12:06.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:06.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:12:06.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:12:06.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:06.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:06.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:06.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:12:06.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:06.360 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:12:06.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:06.361 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:12:06.361 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:12:06.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:06.361 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:06.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:06.361 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:12:06.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:06.361 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:12:06.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:12:06.363 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:12:06.363 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:12:06.363 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:06.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:06.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:06.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:06.364 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:12:11.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:11.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:11.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:11.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:11.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:11.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:11.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:11.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:11.370 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:11.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:11.370 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:12:11.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:12:11.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:12:11.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:11.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:11.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:11.371 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:12:11.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:11.371 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:12:11.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:11.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:12:11.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:12:11.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:11.372 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:11.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:11.372 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:12:11.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:11.372 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:12:11.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:11.373 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:12:11.373 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:12:11.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:11.373 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:11.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:11.373 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:12:11.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:11.373 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:12:11.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:11.374 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:12:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:12:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:12:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:12:11.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:12:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:12:11.375 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:12:11.375 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:12:11.375 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:11.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:11.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:11.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:11.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:11.379 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:12:11.844 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:12:11.890 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:12:11.890 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:12:11.891 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:12:11.891 [DEBUG] fake_trx.py:382 (BTS@172.18.205.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-22 03:12:11.891 [INFO] fake_trx.py:385 (BTS@172.18.205.20:5700) Artificial TRXC delay set to 200
2026-04-22 03:12:11.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-22 03:12:12.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:12.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:12.307 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:12:12.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:12.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:12.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:12.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:12.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:12.770 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:12:12.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:13.232 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:12:13.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:13.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:13.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:13.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:13.694 [DEBUG] fake_trx.py:382 (BTS@172.18.205.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-22 03:12:13.694 [INFO] fake_trx.py:385 (BTS@172.18.205.20:5700) Artificial TRXC delay set to 0
2026-04-22 03:12:13.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-22 03:12:13.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:13.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:13.695 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:12:13.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:13.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:13.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:13.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:13.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:13.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:13.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:13.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:13.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:13.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:13.697 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:12:18.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:18.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:18.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:18.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:18.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:18.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:18.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:18.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:18.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:18.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:18.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:12:18.703 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:12:18.703 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:12:18.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:18.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:18.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:18.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:12:18.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:18.703 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:12:18.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:18.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:12:18.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:12:18.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:18.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:18.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:18.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:12:18.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:18.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:12:18.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:18.705 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:12:18.705 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:12:18.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:18.705 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:18.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:18.705 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:12:18.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:18.705 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:12:18.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:18.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:12:18.707 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:12:18.707 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:12:18.707 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:18.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:18.711 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:12:19.174 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:12:19.220 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:12:19.221 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:12:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:19.222 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:12:19.223 [DEBUG] fake_trx.py:382 (BTS@172.18.205.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-22 03:12:19.223 [INFO] fake_trx.py:385 (BTS@172.18.205.20:5700) Artificial TRXC delay set to 200
2026-04-22 03:12:19.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-22 03:12:19.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:19.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:12:19.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:19.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:19.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:19.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:19.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.103 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:12:20.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.566 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:12:20.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:20.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:20.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] fake_trx.py:382 (BTS@172.18.205.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-22 03:12:20.952 [INFO] fake_trx.py:385 (BTS@172.18.205.20:5700) Artificial TRXC delay set to 0
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:20.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:20.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:20.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:20.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:20.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:20.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:20.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:20.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:20.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:20.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:20.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:20.955 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:12:25.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:25.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:25.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:25.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:25.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:25.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:25.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:25.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:25.961 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:25.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:25.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:12:25.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:12:25.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:12:25.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:25.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:25.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:25.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:12:25.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:25.962 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:12:25.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:25.963 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:12:25.963 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:12:25.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:25.963 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:25.964 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:12:25.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:25.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:25.964 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:12:25.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:25.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:12:25.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:12:25.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:25.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:25.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:25.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:12:25.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:25.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:12:25.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:25.967 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:12:25.967 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:12:25.967 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:12:25.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:25.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:25.972 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:12:26.437 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:12:26.483 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:12:26.484 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:12:26.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:26.485 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:12:26.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:26.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:26.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:26.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:26.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:26.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:26.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:26.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:26.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:26.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:26.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:26.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:26.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:26.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:26.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:26.499 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:12:31.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:31.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:31.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:31.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:31.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:31.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:31.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:31.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:31.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:31.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:31.505 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:12:31.505 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:12:31.505 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:12:31.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:31.505 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:31.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:31.505 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:12:31.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:31.505 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:12:31.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:31.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:12:31.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:12:31.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:31.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:31.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:31.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:12:31.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:31.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:12:31.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:31.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:12:31.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:12:31.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:31.507 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:31.507 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:12:31.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:31.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:31.507 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:12:31.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:31.509 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:12:31.509 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:12:31.509 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:12:31.510 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:31.514 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:12:31.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:12:32.021 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:12:32.021 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:12:32.022 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:12:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:32.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:32.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:32.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:32.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:32.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:32.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:32.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:32.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:32.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:32.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:32.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:32.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:32.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:32.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:32.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:32.037 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:12:37.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:12:37.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:12:37.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:37.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:37.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:37.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:37.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:12:37.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:37.045 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:37.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:12:37.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:12:37.046 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:12:37.046 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:12:37.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:37.046 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:37.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:12:37.046 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:12:37.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:12:37.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:12:37.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:37.048 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:12:37.048 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:12:37.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:37.048 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:37.048 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:12:37.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:12:37.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:12:37.048 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:12:37.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:37.049 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:12:37.049 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:12:37.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:37.049 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:12:37.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:12:37.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:12:37.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:12:37.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:12:37.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:37.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:12:37.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:12:37.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:12:37.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:12:37.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:12:37.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:12:37.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:12:37.051 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:12:37.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:37.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:12:37.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:37.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:37.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:37.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:12:37.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:12:37.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:12:37.565 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:12:37.565 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:12:37.566 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:12:37.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:37.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:37.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:37.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:37.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:37.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:37.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:37.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:37.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:37.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:37.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:37.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:37.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:37.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:37.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:37.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:37.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:37.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:37.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:37.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:37.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:37.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:37.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:37.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:37.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:37.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:37.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:37.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:37.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:37.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:37.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:37.983 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:12:38.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:38.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:38.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:38.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:38.446 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:12:38.908 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:12:39.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:39.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:39.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:39.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:39.371 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:12:39.834 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:12:40.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:40.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:40.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:40.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:40.297 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:12:40.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:40.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:40.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:40.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:40.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:40.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:40.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:40.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:40.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:40.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:40.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:40.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:40.760 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:12:40.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:40.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:40.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:40.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:40.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:40.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:40.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:40.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:40.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:40.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:40.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:40.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:40.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:40.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:40.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:40.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:40.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:40.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:40.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:40.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:40.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:40.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:41.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:41.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:41.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:41.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:41.223 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:12:41.687 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:12:42.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:12:42.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:12:42.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:12:42.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:12:42.151 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:12:42.614 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:12:43.077 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:12:43.541 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:12:43.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:43.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:43.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:43.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:43.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:43.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:43.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:43.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:43.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:43.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:43.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:43.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:43.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:43.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:43.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:43.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:43.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:44.004 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:12:44.468 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:12:44.931 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:12:45.394 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:12:45.858 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:12:46.321 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:12:46.784 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:12:46.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:46.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:46.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:46.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:46.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:46.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:46.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:46.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:46.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:46.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:46.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:46.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:46.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:46.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:46.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:46.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:46.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:47.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:47.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:47.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:47.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:47.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:47.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:47.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:47.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:47.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:47.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:47.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:47.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:47.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:47.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:47.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:47.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:47.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:47.247 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:12:47.711 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:12:47.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:47.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:47.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:47.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:47.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:47.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:47.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:47.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:47.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:47.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:47.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:47.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:47.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:47.945 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:12:47.945 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:12:47.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:47.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:48.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:48.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:48.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:48.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:48.009 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:12:48.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:48.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:48.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:48.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:48.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:48.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:48.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:48.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:48.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:48.038 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:12:48.038 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:12:48.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:48.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:48.174 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:12:48.637 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:12:49.100 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:12:49.562 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:12:50.026 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:12:50.489 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:12:50.953 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:12:51.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:51.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:51.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:51.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:51.040 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:12:51.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:51.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:51.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:51.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:51.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:51.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:51.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:51.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:51.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:51.089 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:12:51.089 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:12:51.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:51.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:51.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:51.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:51.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:51.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:51.151 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:12:51.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:51.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:51.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:51.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:51.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:51.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:51.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:51.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:51.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:51.186 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:12:51.186 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:12:51.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:51.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:51.416 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:12:51.879 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:12:52.341 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:12:52.804 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:12:53.267 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:12:53.730 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:12:54.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:54.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:54.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:54.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:54.187 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:12:54.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:54.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:54.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:54.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:54.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:54.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:54.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:54.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:54.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:54.245 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:12:54.245 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:12:54.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:54.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:54.288 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:12:54.750 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:12:55.213 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:12:55.676 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:12:56.139 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:12:56.602 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:12:57.066 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:12:57.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:57.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:57.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:57.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:57.247 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:12:57.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:57.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:57.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:57.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:57.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:57.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:57.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:57.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:57.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:57.297 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:12:57.297 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:12:57.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:57.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:57.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:57.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:57.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:57.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:57.384 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:12:57.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:57.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:57.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:57.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:57.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:57.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:57.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:57.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:57.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:57.435 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:12:57.435 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:12:57.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:57.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:57.529 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:12:57.993 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:12:58.457 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:12:58.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:58.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:58.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:58.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:58.629 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:12:58.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:58.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:58.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:58.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:58.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:58.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:58.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:58.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:58.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:58.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:58.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:58.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:58.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:58.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:58.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:58.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:58.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:58.920 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:12:58.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:12:58.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:12:58.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:12:58.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:58.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:58.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:58.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:12:58.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:12:58.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:12:58.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:12:58.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:12:58.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:58.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:12:59.384 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:12:59.847 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:13:00.310 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:13:00.774 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:13:01.237 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:13:01.702 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:13:01.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:01.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:01.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:01.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:01.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:01.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:01.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:01.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:01.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:01.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:01.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:01.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:02.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:02.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:02.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:02.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:02.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:02.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:02.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:02.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:02.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:02.167 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:13:02.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:02.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:02.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:02.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:02.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:02.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:02.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:02.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:02.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:02.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:02.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:02.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:02.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:02.632 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:13:03.098 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:13:03.563 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:13:04.029 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:13:04.494 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:13:04.960 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:13:05.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:05.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:05.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:05.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:05.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:05.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:05.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:05.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:05.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:05.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:05.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:05.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:05.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:05.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:05.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:05.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:05.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:05.425 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:13:05.891 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:13:06.356 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:13:06.821 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:13:07.287 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:13:07.752 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 03:13:08.217 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 03:13:08.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:08.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:08.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:08.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:08.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:08.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:08.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:08.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:08.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:08.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:08.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:08.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:08.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:08.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:08.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:08.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:08.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:08.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:08.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:08.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:08.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:08.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:08.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:08.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:08.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:08.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:08.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:08.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:08.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:08.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:08.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:08.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:08.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:08.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:08.683 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 03:13:09.148 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 03:13:09.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:09.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:09.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:09.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:09.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:09.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:09.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:09.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:09.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:09.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:09.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:09.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:09.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:09.241 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:09.241 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:09.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:09.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:09.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:09.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:09.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:09.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:09.298 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:09.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:09.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:09.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:09.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:09.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:09.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:09.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:09.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:09.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:09.333 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:09.333 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:09.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:09.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:09.614 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 03:13:10.079 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 03:13:10.545 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 03:13:11.010 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 03:13:11.476 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 03:13:11.942 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 03:13:12.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:12.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:12.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:12.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:12.338 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:12.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:12.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:12.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:12.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:12.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:12.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:12.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:12.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:12.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:12.361 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:12.361 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:12.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:12.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:12.407 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 03:13:12.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:12.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:12.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:12.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:12.792 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:12.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:12.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:12.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:12.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:12.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:12.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:12.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:12.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:12.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:12.827 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:12.827 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:12.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:12.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:12.872 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 03:13:13.338 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 03:13:13.803 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 03:13:14.268 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 03:13:14.734 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 03:13:15.200 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 03:13:15.665 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 03:13:15.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:15.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:15.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:15.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:15.831 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:15.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:15.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:15.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:15.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:15.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:15.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:15.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:15.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:15.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:15.899 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:15.899 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:15.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:15.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:16.131 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 03:13:16.597 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 03:13:17.062 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 03:13:17.527 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 03:13:17.993 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 03:13:18.458 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 03:13:18.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:18.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:18.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:18.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:18.903 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:18.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:18.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:18.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:18.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:18.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:18.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:18.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:18.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:18.923 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 03:13:18.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:18.928 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:18.928 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:18.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:18.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:19.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:19.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:19.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:19.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:19.298 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:19.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:19.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:19.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:19.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:19.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:19.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:19.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:19.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:19.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:19.341 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:19.341 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:19.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:19.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:19.387 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 03:13:19.852 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 03:13:20.316 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 03:13:20.779 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 03:13:21.244 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 03:13:21.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:21.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:21.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:21.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:21.695 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:21.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:21.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:21.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:21.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:21.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:21.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:21.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:21.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:21.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:21.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:21.703 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:13:26.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:26.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:26.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:26.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:26.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:26.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:26.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:26.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:26.712 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:26.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:26.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:13:26.714 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:13:26.714 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:13:26.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:26.715 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:26.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:26.715 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:13:26.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:26.715 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:13:26.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:26.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:13:26.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:13:26.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:26.717 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:26.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:26.717 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:13:26.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:26.717 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:13:26.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:26.719 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:13:26.719 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:13:26.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:26.719 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:26.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:26.719 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:13:26.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:26.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:13:26.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:26.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:13:26.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:13:26.723 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:13:26.724 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:26.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:26.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:26.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:26.725 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:13:31.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:31.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:31.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:31.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:31.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:31.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:31.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:31.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:31.737 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:31.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:31.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:13:31.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:13:31.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:13:31.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:31.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:31.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:31.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:13:31.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:31.739 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:13:31.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:31.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:13:31.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:13:31.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:31.741 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:31.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:31.741 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:13:31.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:31.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:13:31.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:31.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:13:31.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:13:31.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:31.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:31.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:31.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:13:31.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:31.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:13:31.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:31.748 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:13:31.748 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:13:31.748 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:13:31.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:31.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:31.753 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:13:32.219 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:13:32.274 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:13:32.275 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:13:32.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:32.276 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:13:32.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:32.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:32.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:32.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:32.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:32.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:32.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:32.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:32.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:32.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:32.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:32.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:32.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:32.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:32.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:32.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:32.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:32.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:32.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:32.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:32.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:32.409 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:32.409 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:13:32.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:32.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:32.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:32.497 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:32.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:32.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:32.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:32.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:32.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:32.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:32.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:32.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:32.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:32.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:32.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:32.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:32.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:32.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:32.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:32.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:32.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:32.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:32.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:32.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:32.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:32.643 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:32.643 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:32.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:13:32.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:32.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:32.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:32.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:32.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:32.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:32.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:32.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:32.765 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:32.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:32.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:32.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:32.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:32.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:32.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:32.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:32.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:32.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:32.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:32.770 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:13:32.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=225 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:32.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=225 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:32.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=225 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:32.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=225 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:32.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=225 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:32.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=225 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:32.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=225 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:37.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:37.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:37.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:37.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:37.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:37.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:37.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:37.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:37.779 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:37.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:37.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:13:37.781 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:13:37.781 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:13:37.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:37.781 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:37.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:37.781 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:13:37.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:37.781 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:13:37.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:37.783 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:13:37.783 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:13:37.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:37.783 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:37.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:37.783 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:13:37.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:37.783 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:13:37.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:37.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:13:37.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:13:37.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:37.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:37.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:37.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:13:37.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:37.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:13:37.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:37.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:13:37.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:13:37.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:13:37.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:13:37.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:13:37.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:13:37.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:13:37.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:13:37.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:13:37.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:13:37.790 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:13:37.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:37.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:37.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:37.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:37.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:37.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:37.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:37.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:37.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:37.795 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:13:38.260 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:13:38.312 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:13:38.313 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:13:38.314 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:13:38.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:38.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:38.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:38.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:38.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:38.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:38.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:38.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:38.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:38.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:38.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:38.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:38.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:38.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:38.725 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:13:38.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:38.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:38.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:38.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:38.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:38.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:38.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:38.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:38.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:38.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:38.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:38.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:38.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:38.770 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:38.771 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:13:38.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:38.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:38.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:38.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:38.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:38.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:39.190 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:13:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:39.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:39.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:39.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:39.446 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:39.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:39.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:39.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:39.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:39.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:39.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:39.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:39.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:39.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:39.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:39.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:39.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:39.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:39.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:39.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:39.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:39.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:39.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:39.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:39.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:39.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:39.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:39.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:39.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:39.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:39.655 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:13:39.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:39.661 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:39.661 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:39.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:39.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:39.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:39.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:39.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:39.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:40.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:40.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:40.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:40.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:40.045 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:40.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:40.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:40.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:40.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:40.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:40.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:40.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:40.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:40.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:40.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:40.051 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:13:45.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:45.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:45.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:45.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:45.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:45.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:45.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:45.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:45.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:45.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:45.056 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:13:45.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:13:45.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:13:45.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:45.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:45.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:13:45.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:45.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:45.057 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:13:45.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:45.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:13:45.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:13:45.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:45.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:45.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:13:45.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:45.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:45.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:13:45.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:45.060 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:13:45.060 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:13:45.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:45.060 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:45.060 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:13:45.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:45.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:45.061 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:13:45.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:45.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:13:45.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:13:45.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:13:45.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:13:45.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:13:45.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:13:45.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:13:45.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:13:45.063 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:13:45.063 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:13:45.063 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:45.067 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:13:45.532 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:13:45.577 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:13:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:45.578 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:13:45.579 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:13:45.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:45.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:45.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:45.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:45.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:45.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:45.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:45.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:45.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:45.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:45.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:45.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:45.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:45.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:45.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:45.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:45.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:45.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:45.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:45.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:45.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:45.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:45.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:45.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:45.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:45.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:45.812 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:45.812 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:13:45.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:45.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:45.994 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:13:46.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:46.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:46.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:46.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:46.056 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:46.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:46.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:46.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:46.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:46.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:46.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:46.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:46.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:46.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:46.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:46.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:46.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:46.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:46.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:46.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:46.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:46.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:46.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:46.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:46.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:46.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:46.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:13:46.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:46.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:46.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:46.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:46.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:46.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:46.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:46.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:46.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:46.501 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:46.501 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:46.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:46.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:46.920 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:13:47.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:47.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:47.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:47.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:47.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:47.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:47.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:47.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:47.304 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:47.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:47.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:47.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:47.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:47.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:47.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:47.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:47.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:47.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:47.309 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:13:47.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:47.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=495 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:52.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:52.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:52.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:52.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:52.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:52.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:52.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:52.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:52.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:52.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:52.317 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:13:52.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:13:52.318 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:13:52.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:52.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:52.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:52.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:13:52.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:52.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:13:52.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:52.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:13:52.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:13:52.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:52.320 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:52.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:52.320 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:13:52.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:52.320 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:13:52.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:52.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:13:52.322 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:13:52.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:52.322 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:52.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:52.322 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:13:52.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:52.322 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:13:52.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:52.326 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:13:52.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:13:52.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:13:52.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:13:52.326 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:13:52.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:13:52.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:13:52.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:13:52.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:13:52.327 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:13:52.327 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:13:52.327 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:52.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:52.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:52.332 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:13:52.798 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:13:52.856 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:13:52.857 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:13:52.858 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:13:52.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:52.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:52.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:52.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:52.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:52.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:52.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:52.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:52.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:52.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:52.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:52.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:52.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:52.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:53.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:53.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:53.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:53.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:53.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:53.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:53.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:53.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:53.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:53.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:53.130 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:53.131 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:13:53.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.264 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:13:53.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:53.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:53.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:53.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:53.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:53.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:53.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:53.408 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:53.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:53.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:53.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:53.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:53.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:53.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:53.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:53.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:53.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:53.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:53.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:53.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:53.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:53.731 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:13:53.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:53.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:53.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:13:53.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:13:53.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:13:53.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:13:53.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:13:53.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:53.780 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:13:53.780 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:13:53.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:53.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:54.195 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:13:54.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:54.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:54.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:54.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:54.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:13:54.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:13:54.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:13:54.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:13:54.580 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:13:54.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:54.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:54.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:54.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:54.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:54.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:54.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:54.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:54.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:54.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:54.586 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:13:54.586 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:54.586 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:54.586 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:54.586 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:54.586 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:54.586 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:54.586 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:13:59.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:13:59.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:13:59.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:59.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:59.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:59.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:59.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:13:59.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:59.597 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:59.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:13:59.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:13:59.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:13:59.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:13:59.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:59.599 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:59.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:13:59.599 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:13:59.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:13:59.599 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:13:59.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:13:59.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:13:59.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:13:59.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:59.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:59.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:13:59.601 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:13:59.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:13:59.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:13:59.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:13:59.603 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:13:59.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:13:59.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:59.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:13:59.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:13:59.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:13:59.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:13:59.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:13:59.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:13:59.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:13:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:13:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:13:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:13:59.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:13:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:13:59.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:13:59.608 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:13:59.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:13:59.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:14:00.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:14:00.135 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:14:00.136 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:14:00.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:00.137 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:14:00.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:00.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:00.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:14:00.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:00.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:00.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:00.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:14:00.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:14:00.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:00.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:00.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:00.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:00.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:00.544 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:14:00.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:00.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:00.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:00.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:01.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:14:01.476 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:14:01.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:01.943 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:14:01.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:01.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:01.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:01.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:01.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:01.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:01.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:02.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:02.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:02.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:14:02.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:02.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:02.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:02.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:14:02.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:14:02.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:02.126 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:14:02.127 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:14:02.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:02.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:02.425 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:14:02.892 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:14:02.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:02.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:02.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:02.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:03.358 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:14:03.823 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:14:03.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:03.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:03.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:03.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:04.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:04.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:04.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:04.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:04.147 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:14:04.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:04.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:04.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:14:04.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:04.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:04.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:04.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:14:04.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:14:04.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:04.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:04.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:04.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:04.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:04.288 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:14:04.754 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:14:04.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:04.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:04.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:04.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:05.221 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:14:05.687 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:14:05.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:05.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:05.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:05.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:05.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:05.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:05.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:14:05.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:05.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:05.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:05.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:14:05.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:14:05.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:05.780 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:14:05.780 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:14:05.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:05.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:06.152 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:14:06.618 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:14:07.083 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:14:07.548 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:14:08.014 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:14:08.479 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:14:08.944 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:14:09.410 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:14:09.875 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:14:10.340 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:14:10.806 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:14:11.271 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:14:11.737 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:14:12.203 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:14:12.669 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:14:13.134 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:14:13.601 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:14:14.066 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:14:14.531 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:14:14.997 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:14:15.463 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:14:15.928 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:14:16.393 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:14:16.859 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:14:17.324 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:14:17.790 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:14:18.255 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:14:18.721 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:14:19.187 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:14:19.653 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:14:20.118 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:14:20.583 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:14:21.048 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:14:21.514 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:14:21.979 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:14:22.444 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:14:22.909 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:14:23.375 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:14:23.841 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:14:24.306 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:14:24.773 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:14:25.240 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:14:25.706 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:14:25.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:25.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:25.738 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:14:25.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:25.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:25.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:25.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:25.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:14:25.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:14:25.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:14:25.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:14:25.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:14:25.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:14:25.740 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:14:30.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:14:30.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:14:30.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:14:30.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:14:30.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:14:30.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:14:30.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:14:30.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:14:30.748 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:14:30.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:14:30.748 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:14:30.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:14:30.749 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:14:30.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:14:30.749 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:14:30.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:14:30.750 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:14:30.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:14:30.750 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:14:30.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:30.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:14:30.751 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:14:30.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:14:30.751 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:14:30.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:14:30.751 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:14:30.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:14:30.751 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:14:30.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:30.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:14:30.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:14:30.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:14:30.753 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:14:30.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:14:30.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:14:30.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:14:30.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:14:30.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:14:30.756 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:14:30.756 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:14:30.756 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:14:30.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:14:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:14:30.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:14:30.761 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:14:31.226 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:14:31.292 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:14:31.293 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:14:31.293 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:14:31.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:31.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:31.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:31.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:14:31.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:31.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:31.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:31.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:14:31.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:14:31.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:31.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:31.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:31.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:31.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:31.692 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:14:31.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:31.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:31.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:31.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:32.157 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:14:32.623 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:14:32.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:32.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:32.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:32.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:33.088 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:14:33.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:33.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:33.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:33.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:33.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:33.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:33.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:14:33.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:33.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:33.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:33.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:14:33.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:14:33.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:33.230 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:14:33.230 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:14:33.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:33.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:33.553 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:14:33.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:33.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:33.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:33.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:34.018 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:14:34.483 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:14:34.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:34.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:34.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:34.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:34.948 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:14:35.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:35.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:35.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:35.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:35.274 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:14:35.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:35.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:35.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:14:35.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:35.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:35.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:35.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:14:35.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:14:35.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:35.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:35.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:35.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:35.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:35.413 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:14:35.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:35.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:35.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:35.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:35.878 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:14:36.344 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:14:36.810 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:14:36.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:36.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:36.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:36.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:36.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:36.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:36.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:14:36.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:36.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:14:36.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:14:36.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:14:36.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:14:36.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:14:36.902 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:14:36.902 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:14:36.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:36.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:14:37.277 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:14:37.743 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:14:38.209 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:14:38.674 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:14:39.140 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:14:39.605 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:14:40.072 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:14:40.539 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:14:41.005 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:14:41.470 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:14:41.937 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:14:42.404 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:14:42.870 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:14:43.335 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:14:43.802 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:14:44.269 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:14:44.734 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:14:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:14:45.665 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:14:46.130 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:14:46.595 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:14:47.062 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:14:47.527 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:14:47.993 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:14:48.459 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:14:48.926 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:14:49.393 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:14:49.858 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:14:50.324 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:14:50.789 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:14:51.254 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:14:51.719 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:14:52.185 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:14:52.651 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:14:53.116 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:14:53.581 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:14:54.046 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:14:54.511 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:14:54.977 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:14:55.442 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:14:55.908 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:14:56.373 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:14:56.838 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:14:56.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:14:56.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:14:56.861 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:14:56.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:14:56.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:14:56.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:14:56.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:14:56.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:14:56.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:14:56.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:14:56.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:14:56.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:14:56.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:14:56.863 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:14:56.863 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5719 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:14:56.863 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5719 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:14:56.863 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5719 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:14:56.863 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5719 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:14:56.863 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5719 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:14:56.863 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5719 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:14:56.863 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5719 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:14:56.863 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=5719 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:15:01.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:15:01.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:15:01.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:01.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:01.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:01.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:01.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:01.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:15:01.872 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:01.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:15:01.872 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:15:01.874 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:15:01.874 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:15:01.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:15:01.874 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:01.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:01.874 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:15:01.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:15:01.874 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:15:01.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:01.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:15:01.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:15:01.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:15:01.876 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:01.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:01.877 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:15:01.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:15:01.877 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:15:01.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:01.879 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:15:01.879 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:15:01.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:15:01.879 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:01.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:01.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:15:01.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:15:01.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:15:01.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:01.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:15:01.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:15:01.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:15:01.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:15:01.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:15:01.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:15:01.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:15:01.884 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:15:01.884 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:15:01.884 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:01.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:01.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:01.889 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:15:02.355 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:15:02.415 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:15:02.417 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:15:02.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:02.418 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:15:02.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:02.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:02.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:02.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:02.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:02.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:02.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:02.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:02.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:02.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:02.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:02.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:02.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:02.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:02.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:02.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:02.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:02.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:02.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:02.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:02.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:02.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:02.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:02.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:02.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:02.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:02.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:02.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:02.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:02.821 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:15:02.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:02.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:02.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:02.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:03.287 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:15:03.753 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:15:03.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:03.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:03.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:03.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:04.219 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:15:04.686 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:15:04.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:04.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:04.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:04.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:04.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:04.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:04.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:04.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:04.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:04.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:04.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:04.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:04.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:04.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:04.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:04.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:04.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:04.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:04.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:04.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:04.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:04.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:04.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:04.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:04.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:04.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:04.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:04.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:04.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:04.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:04.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:04.967 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:04.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:05.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:05.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:05.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:05.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:05.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:05.153 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:15:05.618 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:15:05.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:05.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:05.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:05.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:06.084 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:15:06.550 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:15:06.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:06.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:06.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:07.015 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:15:07.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:07.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:07.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:07.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:07.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:07.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:07.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:07.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:07.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:07.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:07.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:07.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:07.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:07.155 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:07.155 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:07.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:07.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:07.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:07.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:07.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:07.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:07.422 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:07.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:07.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:07.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:07.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:07.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:07.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:07.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:07.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:07.480 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:15:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:07.486 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:07.487 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:07.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:07.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:07.945 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:15:08.410 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:15:08.875 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:15:09.340 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:15:09.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:09.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:09.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:09.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:09.789 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:09.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:09.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:09.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:09.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:09.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:09.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:09.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:09.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:09.804 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:15:09.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:09.808 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:09.808 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:09.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:09.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:10.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:10.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:10.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:10.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:10.067 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:10.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:10.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:10.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:10.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:10.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:10.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:10.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:10.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:10.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:10.135 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:10.135 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:10.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:10.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:10.269 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:15:10.734 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:15:11.199 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:15:11.664 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:15:12.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:12.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:12.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:12.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:12.089 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:12.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:12.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:12.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:12.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:12.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:12.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:12.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:12.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:12.130 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:15:12.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:12.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:12.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:12.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:12.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:12.595 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:15:12.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:12.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:12.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:12.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:12.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:12.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:12.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:12.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:12.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:12.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:12.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:12.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:12.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:12.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:12.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:12.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:12.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:13.061 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:15:13.526 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:15:13.992 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:15:14.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:14.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:14.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:14.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:14.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:14.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:14.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:14.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:14.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:14.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:14.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:14.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:14.457 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:15:14.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:14.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:14.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:14.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:14.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:14.921 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:15:15.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:15.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:15.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:15.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:15.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:15.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:15.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:15.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:15.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:15.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:15.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:15.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:15.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:15.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:15.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:15.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:15.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:15.386 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:15:15.851 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:15:16.316 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:15:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:16.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:16.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:16.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:16.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:16.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:16.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:16.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:16.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:16.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:16.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:16.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:16.782 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:15:16.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:16.790 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:16.790 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:15:16.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:16.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:17.247 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:15:17.712 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:15:18.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:18.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:18.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:18.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:18.029 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:18.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:18.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:18.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:18.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:18.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:18.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:18.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:18.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:18.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:18.088 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:18.088 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:15:18.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:18.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:18.177 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:15:18.642 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:15:19.107 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:15:19.572 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:15:20.038 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:15:20.503 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:15:20.967 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:15:21.433 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:15:21.898 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:15:22.362 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:15:22.827 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:15:23.291 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:15:23.756 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:15:24.220 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:15:24.684 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:15:25.149 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:15:25.613 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:15:26.078 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:15:26.542 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:15:27.007 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:15:27.471 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:15:27.935 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:15:28.399 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:15:28.864 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:15:29.328 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:15:29.792 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:15:30.258 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:15:30.722 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:15:31.186 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:15:31.651 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:15:32.115 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:15:32.579 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 03:15:33.043 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 03:15:33.508 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 03:15:33.973 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 03:15:34.437 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 03:15:34.903 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 03:15:35.372 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 03:15:35.838 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 03:15:36.302 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 03:15:36.765 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 03:15:37.230 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 03:15:37.695 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 03:15:38.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:38.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:38.047 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:38.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:38.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:38.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:38.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:38.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:38.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:38.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:38.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:38.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:15:38.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:15:38.050 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:15:43.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:15:43.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:15:43.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:43.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:43.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:43.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:43.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:43.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:15:43.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:43.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:15:43.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:15:43.058 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:15:43.058 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:15:43.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:15:43.059 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:43.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:43.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:15:43.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:15:43.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:15:43.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:43.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:15:43.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:15:43.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:15:43.061 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:43.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:43.061 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:15:43.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:15:43.061 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:15:43.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:43.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:15:43.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:15:43.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:15:43.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:43.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:43.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:15:43.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:15:43.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:15:43.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:43.067 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:15:43.067 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:15:43.067 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:15:43.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:43.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:43.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:43.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:43.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:43.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:43.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:43.072 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:15:43.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:15:43.592 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:15:43.593 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:15:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:43.594 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:15:43.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:43.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:43.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:43.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:43.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:43.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:43.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:43.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:43.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:43.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:43.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:43.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:43.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:43.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:43.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:43.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:43.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:43.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:43.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:43.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:43.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:43.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:43.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:43.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:43.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:43.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:43.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:43.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:43.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:43.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:43.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:43.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:43.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:43.822 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:43.822 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:43.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:43.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:43.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:43.892 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:43.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:43.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:43.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:43.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:43.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:43.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:43.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:43.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:43.912 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:43.912 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:43.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:43.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.002 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:15:44.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:44.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:44.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:44.006 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:44.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:44.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:44.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:44.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:44.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:44.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:44.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:44.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:44.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:44.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:44.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:44.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:44.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:44.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:44.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:44.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:44.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:44.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:44.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:44.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:44.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:44.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:44.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:44.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:44.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:44.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:44.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:44.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:44.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:44.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:44.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:44.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:44.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:44.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:44.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:44.407 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:44.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:44.420 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:44.420 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:15:44.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.467 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:15:44.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:44.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:44.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:44.548 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:44.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:44.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:44.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:44.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:44.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:44.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:44.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:44.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:44.605 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:44.605 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:15:44.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:44.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:44.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:44.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:44.783 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:44.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:44.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:44.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:44.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:44.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:44.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:44.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:44.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:44.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:15:44.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:15:44.787 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:15:49.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:15:49.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:15:49.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:49.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:49.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:49.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:49.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:49.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:15:49.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:49.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:15:49.794 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:15:49.795 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:15:49.795 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:15:49.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:15:49.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:49.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:49.795 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:15:49.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:15:49.795 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:15:49.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:49.796 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:15:49.796 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:15:49.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:15:49.797 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:49.797 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:15:49.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:49.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:15:49.797 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:15:49.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:49.798 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:15:49.798 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:15:49.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:15:49.798 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:49.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:49.798 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:15:49.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:15:49.798 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:15:49.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:15:49.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:15:49.801 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:15:49.801 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:15:49.801 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:49.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:49.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:49.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:49.805 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:15:50.269 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:15:50.316 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:15:50.316 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:15:50.317 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:15:50.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:50.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:50.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:50.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:50.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:50.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:50.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:50.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:50.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:50.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:50.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:50.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:50.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:50.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:50.733 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:15:50.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:50.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:50.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:50.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:50.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:50.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:50.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:50.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:50.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:50.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:50.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:50.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:50.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:50.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:50.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:50.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:50.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:50.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:50.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:50.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:50.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:51.197 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:15:51.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:51.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:51.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:51.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:51.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:51.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:51.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:51.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:51.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:51.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:51.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:51.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:51.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:51.239 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:51.239 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:51.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:51.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:51.661 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:15:51.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:51.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:51.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:51.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:51.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:51.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:51.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:51.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:51.925 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:51.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:51.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:51.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:51.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:51.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:51.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:51.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:51.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:51.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:51.941 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:51.941 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:51.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:51.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:52.124 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:15:52.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:52.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:52.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:52.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:52.395 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:52.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:52.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:52.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:52.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:52.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:52.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:52.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:52.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:52.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:52.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:52.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:52.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:52.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:52.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:52.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:52.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:52.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:52.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:52.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:52.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:52.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:52.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:52.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:52.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:52.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:52.588 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:15:52.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:52.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:52.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:52.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:52.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:52.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:52.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:52.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:52.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:53.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:53.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:53.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:53.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:53.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:53.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:53.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:53.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:53.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:53.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:53.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:53.051 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:15:53.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:53.055 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:53.055 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:15:53.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:53.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:53.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:53.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:53.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:53.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:53.439 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:53.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:53.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:53.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:53.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:53.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:53.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:53.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:53.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:53.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:53.469 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:53.469 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:15:53.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:53.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:53.514 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:15:53.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:53.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:53.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:53.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:53.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:53.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:53.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:53.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:53.905 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:53.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:53.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:53.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:53.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:53.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:53.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:53.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:53.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:53.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:15:53.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:15:53.909 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:15:58.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:15:58.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:15:58.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:58.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:58.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:58.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:58.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:15:58.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:15:58.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:58.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:15:58.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:15:58.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:15:58.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:15:58.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:15:58.916 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:58.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:15:58.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:15:58.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:15:58.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:15:58.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:58.918 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:15:58.918 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:15:58.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:15:58.918 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:58.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:15:58.918 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:15:58.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:15:58.918 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:15:58.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:58.920 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:15:58.920 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:15:58.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:15:58.920 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:15:58.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:15:58.920 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:15:58.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:15:58.920 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:15:58.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:15:58.923 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:15:58.923 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:15:58.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:58.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:15:58.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:15:58.928 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:15:59.392 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:15:59.441 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:15:59.442 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:15:59.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.442 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:15:59.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:59.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:59.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:59.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:59.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:59.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:59.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:59.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:59.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:59.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:59.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:59.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:59.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:59.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:59.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:59.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:59.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:59.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:59.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:59.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:59.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:59.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:59.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:59.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:59.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:59.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:59.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:59.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:59.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:59.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.673 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:59.673 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:59.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:59.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:59.728 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:59.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:59.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:59.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:59.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:59.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:59.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:59.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:59.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.767 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:15:59.767 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:15:59.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:59.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:59.848 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:15:59.855 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:15:59.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:15:59.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:15:59.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:15:59.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:59.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:59.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:15:59.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:15:59.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:15:59.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:15:59.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:15:59.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:15:59.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:15:59.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:15:59.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:15:59.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:00.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:00.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:00.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:00.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:00.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:00.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:00.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:00.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:00.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:00.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:00.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:00.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:00.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:00.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:00.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:00.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:00.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:00.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:00.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:00.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:00.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:00.319 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:16:00.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:00.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:00.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:00.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:00.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:00.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:00.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:00.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:00.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:00.363 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:00.364 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:16:00.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:00.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:00.783 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:16:00.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:00.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:00.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:00.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:00.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:00.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:00.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:00.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:00.991 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:01.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:01.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:01.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:01.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:01.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:01.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:01.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:01.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:01.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:01.062 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:01.062 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:16:01.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:01.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:01.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:01.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:01.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:01.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:01.168 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:01.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:01.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:01.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:01.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:01.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:01.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:01.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:01.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:01.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:01.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:01.173 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:16:06.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:06.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:06.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:06.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:06.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:06.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:06.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:06.178 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:06.178 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:06.178 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:06.178 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:16:06.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:16:06.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:16:06.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:06.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:06.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:06.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:16:06.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:06.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:16:06.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:06.180 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:16:06.180 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:16:06.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:06.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:06.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:06.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:16:06.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:06.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:16:06.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:06.182 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:16:06.182 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:16:06.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:06.182 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:06.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:06.182 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:16:06.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:06.182 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:16:06.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:16:06.184 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:16:06.184 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:16:06.184 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:16:06.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:06.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:06.189 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:16:06.652 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:16:06.700 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:16:06.700 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:16:06.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:06.701 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:16:06.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:06.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:06.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:06.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:06.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:06.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:06.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:06.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:06.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:06.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:06.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:06.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:06.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:07.114 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:16:07.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:07.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:07.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:07.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:07.578 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:16:07.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:07.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:07.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:07.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:07.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:07.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:07.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:07.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:07.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:07.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:07.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:07.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:07.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:07.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:07.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:07.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:07.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:08.042 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:16:08.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:08.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:08.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:08.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:08.505 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:16:08.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:08.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:08.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:08.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:08.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:08.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:08.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:08.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:08.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:08.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:08.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:08.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:08.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:08.595 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:08.595 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:16:08.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:08.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:08.969 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:16:09.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:09.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:09.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:09.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:09.433 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:16:09.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:09.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:09.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:09.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:09.725 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:09.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:09.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:09.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:09.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:09.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:09.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:09.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:09.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:09.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:09.757 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:09.757 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:16:09.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:09.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:09.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:16:10.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:10.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:10.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:10.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:10.359 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:16:10.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:10.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:10.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:10.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:10.670 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:10.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:10.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:10.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:10.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:10.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:10.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:10.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:10.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:10.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:10.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:10.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:10.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:10.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:10.822 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:16:11.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:11.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:11.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:11.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:11.285 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:16:11.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:11.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:11.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:11.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:11.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:11.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:11.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:11.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:11.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:11.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:11.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:11.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:11.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:11.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:11.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:11.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:11.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:11.748 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:16:12.212 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:16:12.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:12.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:12.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:12.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:12.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:12.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:12.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:12.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:12.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:12.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:12.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:12.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:12.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:12.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:12.303 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:16:12.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:12.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:12.675 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:16:13.139 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:16:13.603 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:16:14.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:14.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:14.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:14.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:14.053 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:14.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:14.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:14.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:14.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:14.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:14.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:14.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:14.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:14.066 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:16:14.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:14.070 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:14.070 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:16:14.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:14.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:14.530 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:16:14.993 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:16:15.456 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:16:15.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:15.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:15.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:15.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:15.906 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:15.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:15.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:15.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:15.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:15.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:15.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:15.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:15.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:15.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:15.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:15.911 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:16:15.911 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:15.911 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:15.911 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:15.911 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:15.911 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:15.911 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:15.911 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:20.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:20.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:20.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:20.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:20.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:20.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:20.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:20.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:20.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:20.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:20.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:16:20.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:16:20.919 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:16:20.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:20.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:20.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:20.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:16:20.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:20.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:16:20.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:20.920 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:16:20.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:16:20.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:20.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:20.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:20.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:16:20.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:20.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:16:20.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:20.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:16:20.921 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:16:20.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:20.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:20.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:20.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:16:20.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:20.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:16:20.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:20.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:16:20.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:16:20.925 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:20.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:20.929 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:16:21.394 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:16:21.438 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:16:21.439 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:16:21.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:21.439 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:16:21.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:21.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:21.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:21.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:21.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:21.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:21.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:21.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:21.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:21.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:21.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:21.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:21.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:21.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:21.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:21.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:21.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:21.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:21.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:21.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:21.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:21.629 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:21.629 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:16:21.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:21.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:21.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:21.770 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:21.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:21.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:21.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:21.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:21.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:21.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:21.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:21.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:21.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:21.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:21.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:21.857 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:16:21.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:21.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:21.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:21.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:22.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:22.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:22.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:22.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:22.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:22.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:22.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:22.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:22.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:22.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:22.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:22.136 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:22.136 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:16:22.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:22.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:22.320 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:16:22.783 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:16:22.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:22.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:22.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:22.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:22.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:22.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:22.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:22.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:22.933 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:22.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:22.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:22.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:22.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:22.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:22.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:22.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:22.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:22.937 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:22.937 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:16:22.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:22.937 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:22.937 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:22.937 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:22.937 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:22.937 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:22.937 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:22.937 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:22.937 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:27.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:27.937 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:27.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:27.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:27.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:27.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:27.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:27.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:27.942 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:27.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:27.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:16:27.943 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:16:27.943 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:16:27.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:27.943 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:27.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:27.943 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:16:27.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:27.943 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:16:27.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:27.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:16:27.945 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:16:27.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:27.945 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:27.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:27.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:16:27.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:27.945 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:16:27.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:27.946 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:16:27.946 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:16:27.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:27.946 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:27.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:27.946 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:16:27.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:27.946 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:16:27.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:27.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:16:27.949 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:16:27.949 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:16:27.949 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:27.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:27.953 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:16:28.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:16:28.641 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:16:28.642 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:16:28.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:28.643 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:16:28.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:28.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:28.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:28.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:28.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:28.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:28.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:28.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:28.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:28.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:28.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:28.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:28.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:28.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:28.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:28.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:28.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:28.880 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:16:28.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:28.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:28.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:28.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:29.344 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:16:29.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:29.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:29.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:29.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:29.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:29.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:29.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:29.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:29.431 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:29.431 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:16:29.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:29.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:29.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:29.572 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:29.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:29.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:29.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:29.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:29.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:29.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:29.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:29.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:29.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:29.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:29.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:29.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:29.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:29.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:29.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:29.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:29.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:29.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:29.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:29.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:29.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:29.856 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:29.856 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:16:29.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:29.863 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:16:29.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:29.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:29.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:29.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:30.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:30.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:30.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:30.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:30.013 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:30.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:30.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:30.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:30.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:30.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:30.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:30.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:30.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:30.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:30.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:30.016 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:16:30.016 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:30.016 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:30.016 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:30.016 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:30.016 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:30.016 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:30.016 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=443 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:35.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:35.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:35.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:35.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:35.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:35.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:35.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:35.069 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:35.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:35.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:35.069 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:35.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:35.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:35.069 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:35.069 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:35.069 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:16:35.069 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:16:35.069 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:16:35.069 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:35.074 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:16:35.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:16:36.001 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:16:36.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:36.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:36.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:36.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:36.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:16:36.926 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:16:37.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:37.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:37.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:37.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:37.388 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:16:37.851 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:16:38.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:38.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:38.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:38.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:38.315 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:16:38.414 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:16:38.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:38.415 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:16:38.416 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:16:38.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:38.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:38.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:38.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:38.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:38.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:38.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:38.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:38.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:38.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:38.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:38.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:38.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:38.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:38.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:38.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:38.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:38.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:38.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:38.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:38.592 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:38.592 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:16:38.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:38.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:38.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:38.745 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:38.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:38.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:38.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:38.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:38.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:38.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:38.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:38.778 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:16:38.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:38.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:38.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:38.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:38.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:39.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:39.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:39.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:39.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:39.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:39.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:39.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:39.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:39.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:39.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:39.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:39.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:39.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:39.059 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:39.059 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:16:39.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:39.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:39.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:39.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:39.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:39.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:39.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:39.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:39.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:39.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:39.162 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:39.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:39.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:39.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:39.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:39.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:39.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:39.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:39.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:39.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:39.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:39.165 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:16:39.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=902 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:39.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=902 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:39.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=902 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:39.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=902 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:39.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=902 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:39.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=902 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:39.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=902 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:16:44.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:44.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:44.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:44.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:44.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:44.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:44.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:44.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:44.172 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:44.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:44.172 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:16:44.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:16:44.173 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:16:44.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:44.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:44.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:44.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:16:44.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:44.173 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:16:44.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:44.174 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:16:44.174 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:16:44.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:44.174 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:44.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:44.174 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:16:44.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:44.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:16:44.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:44.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:16:44.175 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:16:44.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:44.175 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:44.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:44.175 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:16:44.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:44.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:16:44.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:16:44.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:16:44.177 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:16:44.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:44.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:44.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:16:44.647 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:16:44.689 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:16:44.689 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:16:44.690 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:16:44.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:44.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:44.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:44.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:44.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:44.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:44.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:44.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:44.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:44.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:44.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:44.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:44.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:44.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:44.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:44.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:44.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:44.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:44.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:44.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:44.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:44.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:44.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:44.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:44.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:44.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:44.881 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:44.881 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:16:44.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:44.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:45.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:45.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:45.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:45.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:45.024 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:45.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:45.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:45.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:45.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:45.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:45.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:45.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:45.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:45.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:45.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:45.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:45.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:45.109 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:16:45.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:45.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:45.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:45.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:45.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:45.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:45.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:45.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:45.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:45.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:45.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:45.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:45.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:45.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:45.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:45.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:45.392 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:45.392 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:45.573 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:16:46.036 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:16:46.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:46.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:46.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:46.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:46.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:46.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:46.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:46.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:46.183 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:46.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:46.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:46.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:46.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:46.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:46.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:46.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:46.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:46.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:46.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:46.186 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:16:51.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:51.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:51.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:51.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:51.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:51.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:51.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:51.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:51.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:51.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:16:51.196 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:16:51.197 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:16:51.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:16:51.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:51.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:51.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:51.197 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:16:51.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:16:51.197 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:16:51.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:51.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:16:51.199 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:16:51.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:51.199 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:51.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:51.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:16:51.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:16:51.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:16:51.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:51.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:16:51.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:16:51.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:51.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:16:51.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:51.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:16:51.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:16:51.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:16:51.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:51.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:16:51.203 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:16:51.203 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:16:51.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:16:51.207 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:16:51.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:16:51.718 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:16:51.719 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:16:51.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:51.719 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:16:51.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:51.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:51.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:51.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:51.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:51.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:51.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:51.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:51.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:51.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:51.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:51.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:51.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:52.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:52.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:52.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:52.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:52.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:52.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:52.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:52.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:52.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:52.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:52.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:52.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:52.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:52.091 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:52.091 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:16:52.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:52.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:52.136 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:16:52.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:52.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:52.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:52.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:52.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:52.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:52.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:52.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:52.579 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:52.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:52.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:52.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:52.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:52.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:52.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:52.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:52.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:52.599 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:16:52.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:52.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:52.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:52.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:52.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:53.062 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:16:53.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:53.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:53.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:53.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:53.526 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:16:53.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:53.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:53.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:53.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:53.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:53.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:53.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:16:53.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:53.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:16:53.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:16:53.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:16:53.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:16:53.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:53.709 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:16:53.710 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:16:53.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:53.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:53.991 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:16:54.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:54.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:54.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:54.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:54.456 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:16:54.921 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:16:55.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:55.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:55.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:55.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:55.386 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:16:55.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:16:55.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:16:55.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:16:55.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:16:55.700 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:16:55.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:16:55.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:16:55.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:16:55.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:16:55.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:16:55.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:16:55.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:16:55.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:16:55.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:16:55.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:16:55.709 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:17:00.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:00.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:00.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:00.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:00.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:00.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:00.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:00.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:00.715 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:00.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:00.715 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:17:00.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:17:00.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:17:00.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:00.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:00.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:00.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:17:00.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:00.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:17:00.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:00.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:17:00.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:17:00.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:00.718 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:00.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:00.718 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:17:00.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:00.718 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:17:00.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:00.720 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:17:00.720 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:17:00.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:00.720 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:00.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:00.720 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:17:00.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:00.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:17:00.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:17:00.722 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:17:00.722 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:17:00.722 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:00.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:00.727 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:17:01.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:17:01.240 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:17:01.240 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:17:01.241 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:17:01.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:01.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:01.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:01.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:01.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:01.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:01.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:01.250 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:01.250 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:01.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:01.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:01.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:01.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:01.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:01.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:01.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:01.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:01.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:01.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:01.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:01.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:01.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:01.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:01.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:01.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:01.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:01.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:01.612 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:01.612 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:17:01.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:01.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:01.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:17:01.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:01.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:01.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:01.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:02.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:02.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:02.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:02.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:02.101 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:17:02.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:02.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:02.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:02.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:02.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:02.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:02.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:02.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:02.121 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:17:02.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:02.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:02.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:02.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:02.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:02.585 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:17:02.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:02.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:02.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:02.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:03.050 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:17:03.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:03.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:03.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:03.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:03.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:03.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:03.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:03.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:03.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:03.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:03.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:03.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:03.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:03.233 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:03.233 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:17:03.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:03.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:03.513 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:17:03.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:03.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:03.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:03.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:03.977 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:17:04.440 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:17:04.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:04.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:04.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:04.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:04.903 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:17:05.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:05.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:05.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:05.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:05.216 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:17:05.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:05.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:05.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:05.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:05.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:05.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:05.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:05.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:05.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:05.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:05.220 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:17:10.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:10.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:10.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:10.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:10.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:10.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:10.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:10.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:10.232 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:10.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:10.233 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:17:10.234 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:17:10.234 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:17:10.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:10.234 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:10.234 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:17:10.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:10.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:10.234 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:17:10.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:10.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:17:10.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:17:10.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:10.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:10.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:17:10.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:10.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:10.235 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:17:10.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:10.236 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:17:10.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:17:10.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:10.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:10.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:17:10.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:10.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:10.237 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:17:10.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:10.238 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:17:10.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:17:10.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:17:10.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:17:10.238 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:17:10.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:17:10.239 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:17:10.239 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:17:10.239 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:10.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:10.243 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:17:10.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:17:10.775 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:17:10.775 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:17:10.776 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:17:10.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:10.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:10.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:10.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:10.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:10.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:10.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:10.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:10.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:10.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:10.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:10.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:10.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:10.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:11.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:11.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:11.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:11.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:11.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:11.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:11.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:11.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:11.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:11.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:11.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:11.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:11.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:11.127 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:11.127 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:17:11.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:11.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:11.173 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:17:11.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:11.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:11.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:11.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:11.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:11.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:11.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:11.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:11.614 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:17:11.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:11.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:11.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:11.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:11.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:11.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:11.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:11.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:11.637 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:17:11.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:11.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:11.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:11.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:11.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:12.100 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:17:12.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:12.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:12.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:12.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:12.563 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:17:12.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:12.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:12.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:12.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:12.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:12.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:12.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:12.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:12.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:12.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:12.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:12.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:12.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:12.746 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:12.746 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:17:12.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:12.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:13.028 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:17:13.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:13.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:13.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:13.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:13.490 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:17:13.954 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:17:14.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:14.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:14.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:14.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:14.424 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:17:14.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:14.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:14.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:14.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:14.749 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:17:14.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:14.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:14.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:14.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:14.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:14.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:14.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:14.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:14.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:14.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:14.765 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:17:14.765 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=994 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:14.766 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=994 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:14.766 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=994 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:14.766 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=994 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:14.766 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=994 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:14.766 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=994 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:14.766 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=994 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:19.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:19.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:19.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:19.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:19.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:19.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:19.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:19.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:19.786 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:19.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:19.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:17:19.788 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:17:19.788 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:17:19.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:19.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:19.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:19.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:17:19.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:19.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:17:19.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:19.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:17:19.791 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:17:19.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:19.791 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:19.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:19.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:17:19.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:19.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:17:19.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:19.792 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:17:19.792 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:17:19.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:19.792 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:19.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:19.792 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:17:19.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:19.792 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:17:19.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:19.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:17:19.795 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:17:19.795 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:17:19.795 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:19.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:19.799 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:17:20.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:17:20.310 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:17:20.311 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:17:20.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:20.311 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:17:20.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:20.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:20.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:20.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:20.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:20.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:20.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:20.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:20.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:20.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:20.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:20.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:20.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:20.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:20.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:20.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:20.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:20.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:20.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:20.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:20.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:20.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:20.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:20.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:20.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:20.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:20.683 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:20.683 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:17:20.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:20.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:20.727 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:17:20.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:20.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:20.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:20.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:21.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:21.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:21.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:21.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:21.170 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:17:21.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:21.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:21.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:21.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:21.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:21.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:21.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:21.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:21.190 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:17:21.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:21.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:21.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:21.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:21.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:21.653 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:17:21.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:21.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:21.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:21.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:22.117 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:17:22.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:22.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:22.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:22.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:22.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:22.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:22.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:22.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:22.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:22.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:22.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:22.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:22.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:22.298 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:22.298 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:17:22.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:22.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:22.580 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:17:22.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:22.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:22.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:22.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:23.043 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:17:23.506 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:17:23.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:23.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:23.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:23.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:23.971 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:17:24.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:24.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:24.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:24.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:24.285 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:17:24.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:24.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:24.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:24.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:24.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:24.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:24.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:24.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:24.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:24.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:24.289 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:17:24.290 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=989 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:24.290 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=989 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:24.290 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=989 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:24.290 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=989 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:24.290 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=989 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:24.290 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=989 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:24.290 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=989 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:29.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:29.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:29.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:29.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:29.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:29.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:29.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:29.295 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:29.295 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:29.295 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:29.295 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:17:29.296 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:17:29.296 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:17:29.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:29.296 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:29.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:29.296 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:17:29.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:29.296 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:17:29.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:29.298 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:17:29.298 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:17:29.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:29.298 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:29.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:29.298 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:17:29.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:29.298 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:17:29.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:29.299 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:17:29.299 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:17:29.299 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:29.299 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:29.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:29.300 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:17:29.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:29.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:17:29.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:17:29.302 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:17:29.302 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:17:29.302 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:29.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:29.307 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:17:29.771 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:17:29.818 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:17:29.818 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:17:29.819 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:17:29.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:29.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:29.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:29.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:29.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:29.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:29.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:29.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:29.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:29.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:29.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:29.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:29.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:29.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:29.832 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:17:29.832 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:29.832 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:34.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:34.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:34.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:34.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:34.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:34.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:34.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:34.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:34.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:34.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:34.862 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:17:34.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:17:34.866 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:17:34.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:34.866 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:34.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:34.866 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:17:34.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:34.867 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:17:34.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:34.869 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:17:34.869 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:17:34.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:34.869 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:34.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:34.869 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:17:34.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:34.869 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:17:34.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:34.871 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:17:34.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:17:34.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:34.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:34.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:34.872 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:17:34.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:34.872 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:17:34.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:34.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:17:34.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:17:34.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:17:34.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:17:34.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:17:34.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:17:34.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:17:34.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:17:34.875 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:17:34.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:34.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:34.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:34.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:17:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:17:35.400 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:17:35.402 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:17:35.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:35.405 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:17:35.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:35.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:35.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:35.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:35.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:35.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:35.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:35.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:35.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:35.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:35.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:35.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:35.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:35.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:35.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:35.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:35.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:35.439 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:17:35.439 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:35.439 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:35.439 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:35.439 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:35.439 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:40.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:40.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:40.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:40.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:40.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:40.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:40.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:40.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:40.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:40.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:40.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:17:40.462 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:17:40.462 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:17:40.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:40.462 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:40.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:40.462 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:17:40.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:40.462 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:17:40.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:40.464 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:17:40.464 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:17:40.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:40.464 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:40.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:40.464 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:17:40.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:40.464 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:17:40.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:40.467 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:17:40.467 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:17:40.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:40.467 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:40.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:40.467 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:17:40.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:40.467 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:17:40.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:40.471 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:17:40.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:17:40.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:17:40.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:17:40.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:17:40.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:17:40.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:17:40.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:17:40.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:17:40.472 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:17:40.472 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:17:40.472 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:40.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:40.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:40.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:40.477 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:17:40.944 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:17:40.991 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:17:40.991 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:17:40.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:40.992 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:17:40.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:40.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:40.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:41.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:41.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:41.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:41.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:41.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:41.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:41.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:41.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:41.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:41.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:41.005 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:17:41.005 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:41.005 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:41.005 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:41.005 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:17:46.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:46.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:46.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:46.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:46.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:46.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:46.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:46.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:46.023 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:46.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:46.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:17:46.028 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:17:46.028 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:17:46.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:46.029 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:46.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:46.029 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:17:46.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:46.029 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:17:46.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:46.032 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:17:46.032 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:17:46.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:46.033 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:46.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:46.033 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:17:46.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:46.033 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:17:46.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:46.035 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:17:46.036 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:17:46.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:46.036 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:46.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:46.036 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:17:46.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:46.036 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:17:46.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:17:46.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:17:46.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:17:46.041 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:17:46.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:17:46.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:46.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:46.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:46.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:46.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:46.045 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:17:51.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:17:51.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:17:51.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:51.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:51.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:51.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:51.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:17:51.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:51.050 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:51.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:17:51.050 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:17:51.051 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:17:51.051 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:17:51.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:51.051 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:51.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:17:51.052 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:51.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:17:51.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:17:51.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:51.053 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:17:51.053 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:17:51.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:51.053 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:17:51.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:17:51.053 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:17:51.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:17:51.053 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:17:51.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:51.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:17:51.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:17:51.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:17:51.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:17:51.054 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:17:51.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:17:51.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:17:51.055 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:17:51.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:51.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:51.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:17:51.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:51.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:51.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:51.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:51.059 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:17:51.524 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:17:51.569 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:17:51.569 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:17:51.570 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:17:51.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:51.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:51.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:51.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:51.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:51.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:51.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:51.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:51.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:51.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:51.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:51.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:51.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:51.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:51.987 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:17:52.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:52.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:52.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:52.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:52.450 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:17:52.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:52.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:52.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:52.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:52.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:52.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:52.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:52.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:52.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:52.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:52.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:52.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:52.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:52.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:52.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:52.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:52.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:52.913 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:17:53.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:53.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:53.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:53.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:53.376 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:17:53.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:53.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:53.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:53.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:53.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:53.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:53.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:53.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:53.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:53.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:53.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:53.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:53.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:53.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:53.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:53.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:53.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:53.840 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:17:54.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:54.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:54.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:54.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:54.302 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:17:54.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:54.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:54.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:54.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:54.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:54.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:54.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:54.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:54.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:54.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:54.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:54.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:54.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:54.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:54.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:54.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:54.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:54.765 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:17:55.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:55.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:55.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:55.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:55.228 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:17:55.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:55.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:55.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:55.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:55.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:55.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:55.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:55.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:55.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:55.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:55.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:55.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:55.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:55.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:55.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:55.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:55.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:55.692 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:17:56.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:56.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:56.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:56.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:56.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:56.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:56.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:56.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:56.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:56.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:56.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:56.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:56.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:56.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:17:56.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:17:56.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:17:56.061 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:56.062 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 03:17:56.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:56.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:56.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:17:56.156 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:17:56.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:56.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:56.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:56.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:56.598 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:17:56.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:56.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:56.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:56.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:56.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:56.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:56.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:56.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:56.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:56.623 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:17:56.624 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:56.624 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-22 03:17:56.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:56.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:57.085 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:17:57.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:57.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:57.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:57.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:57.173 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:17:57.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:57.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:57.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:57.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:57.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:57.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:57.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:57.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:57.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:57.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:57.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:57.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:57.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:57.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:57.550 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:17:57.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:57.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:57.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:57.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:57.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:57.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:57.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:57.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:57.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:57.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:57.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:57.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:57.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:57.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:57.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:57.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:57.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:58.014 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:17:58.478 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:17:58.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:58.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:58.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:58.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:58.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:58.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:58.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:58.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:58.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:58.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:58.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:58.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:58.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:17:58.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:58.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:58.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:58.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:58.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:58.942 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:17:59.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:59.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:59.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:59.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:59.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:59.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:59.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:59.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:59.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:59.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:59.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:59.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:59.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:59.275 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:59.275 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:17:59.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:59.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:59.407 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:17:59.871 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:17:59.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:59.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:59.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:59.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:59.877 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:17:59.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:17:59.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:17:59.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:17:59.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:59.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:17:59.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:17:59.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:17:59.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:17:59.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:17:59.914 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:17:59.914 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:17:59.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:17:59.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:00.336 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:18:00.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:00.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:00.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:00.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:00.503 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:18:00.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:00.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:00.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:00.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:00.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:00.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:00.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:00.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:00.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:00.518 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:18:00.518 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:18:00.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:00.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:00.800 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:18:01.264 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:18:01.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:01.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:01.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:01.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:01.275 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:18:01.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:01.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:01.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:01.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:01.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:01.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:01.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:01.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:01.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:01.310 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:18:01.310 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:18:01.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:01.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:01.729 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:18:02.192 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:18:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:02.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:02.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:02.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:02.221 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:18:02.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:02.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:02.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:02.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:02.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:02.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:02.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:02.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:02.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:02.338 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:18:02.338 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:18:02.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:02.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:02.662 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:18:03.127 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:18:03.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:03.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:03.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:03.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:03.171 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:18:03.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:03.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:03.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:03.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:03.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:03.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:03.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:03.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:03.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:03.217 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:18:03.217 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:18:03.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:03.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:03.590 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:18:04.054 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:18:04.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:04.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:04.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:04.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:04.117 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:18:04.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:04.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:04.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:04.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:04.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:04.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:04.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:04.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:04.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:04.142 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:18:04.142 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:18:04.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:04.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:04.518 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:18:04.983 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:18:05.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:05.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:05.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:05.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:05.063 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:18:05.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:05.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:05.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:05.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:05.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:05.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:05.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:05.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:05.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:05.120 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:18:05.120 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:18:05.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:05.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:05.448 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:18:05.914 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:18:06.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:06.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:06.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:06.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:06.015 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:18:06.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:06.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:06.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:06.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:06.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:06.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:06.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:06.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:06.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:06.048 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:18:06.048 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:18:06.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:06.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:06.379 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:18:06.844 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:18:06.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:06.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:06.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:06.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:06.965 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:18:06.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:06.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:06.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:06.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:06.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:06.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:06.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:06.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:07.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:07.028 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:18:07.028 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:18:07.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:07.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:07.309 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:18:07.775 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:18:07.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:07.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:07.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:07.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:07.910 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:18:07.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:18:07.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:18:07.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:18:07.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:18:07.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:18:07.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:18:07.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:18:07.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:18:07.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:18:07.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:18:07.913 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:18:07.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3704 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:07.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3704 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:07.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3704 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:07.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3704 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:07.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3704 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:07.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3704 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:07.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3704 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:07.914 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3704 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:12.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:18:12.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:18:12.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:18:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:18:12.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:18:12.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:18:12.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:18:12.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:18:12.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:12.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:18:12.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:18:12.943 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:18:12.943 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:18:12.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:18:12.943 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:12.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:18:12.943 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:18:12.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:18:12.943 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:18:12.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:18:12.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:18:12.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:18:12.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:18:12.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:12.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:18:12.944 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:18:12.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:18:12.944 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:18:12.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:18:12.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:18:12.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:18:12.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:18:12.946 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:12.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:18:12.946 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:18:12.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:18:12.946 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:18:12.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:18:12.948 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:18:12.948 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:12.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:12.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:12.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:12.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:12.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:12.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:12.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:18:13.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:18:13.465 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:18:13.465 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:18:13.466 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:18:13.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:13.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:13.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:13.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:13.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:13.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:13.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:13.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:13.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:13.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:13.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:13.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:13.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:13.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:13.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:13.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:13.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:13.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:13.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:13.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:13.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:13.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:13.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:13.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:13.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:13.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:13.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:13.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:13.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:13.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:13.887 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:18:13.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:18:13.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:18:13.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:18:13.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:18:14.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:14.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:14.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:14.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:14.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:14.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:14.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:14.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:14.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:14.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:14.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:14.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:14.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:14.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:14.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:14.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:14.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:14.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:14.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:14.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:14.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:14.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:14.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:14.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:18:14.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:14.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:14.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:14.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:18:14.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:18:14.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:14.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:18:14.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:18:14.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:14.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:14.354 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:18:14.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:18:14.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:18:14.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:18:14.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:18:14.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:18:14.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:18:14.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:18:14.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:18:14.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:18:14.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:18:14.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:18:14.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:18:14.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:18:14.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:18:14.530 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:18:14.531 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=346 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:14.531 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:14.531 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:18:19.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:18:19.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:18:19.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:18:19.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:18:19.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:18:19.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:18:19.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:18:19.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:18:19.539 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:19.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:18:19.539 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:18:19.540 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:18:19.540 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:18:19.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:18:19.540 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:19.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:18:19.540 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:18:19.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:18:19.540 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:18:19.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:18:19.541 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:18:19.541 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:18:19.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:18:19.542 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:19.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:18:19.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:18:19.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:18:19.542 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:18:19.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:18:19.543 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:18:19.543 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:18:19.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:18:19.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:19.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:18:19.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:18:19.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:18:19.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:18:19.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:18:19.544 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:18:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:18:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:18:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:18:19.544 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:18:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:18:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:18:19.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:18:19.545 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:18:19.545 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:19.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:19.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:19.549 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:18:20.016 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:18:20.481 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:18:20.944 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:18:21.409 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:18:21.873 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:18:22.339 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:18:22.802 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:18:23.266 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:18:23.729 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:18:24.192 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:18:24.655 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:18:25.120 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:18:25.584 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:18:26.047 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:18:26.511 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:18:26.977 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:18:27.441 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:18:27.905 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:18:28.369 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:18:28.832 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:18:29.297 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:18:29.761 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:18:30.227 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:18:30.691 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:18:31.153 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:18:31.617 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:18:32.081 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:18:32.544 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:18:33.008 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:18:33.471 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:18:33.935 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:18:34.398 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:18:34.863 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:18:35.327 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:18:35.793 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:18:36.258 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:18:36.724 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:18:37.190 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:18:37.653 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:18:38.117 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:18:38.580 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:18:39.045 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:18:39.511 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:18:39.974 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:18:40.438 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:18:40.906 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:18:41.372 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:18:41.837 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:18:42.301 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:18:42.765 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:18:43.230 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:18:43.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:18:43.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:18:43.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:18:43.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:18:43.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:18:43.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:18:43.562 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:18:48.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:18:48.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:18:48.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:18:48.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:18:48.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:18:48.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:18:48.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:18:48.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:18:48.568 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:48.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:18:48.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:18:48.569 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:18:48.569 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:18:48.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:18:48.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:48.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:18:48.569 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:18:48.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:18:48.569 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:18:48.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:18:48.570 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:18:48.570 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:18:48.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:18:48.570 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:48.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:18:48.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:18:48.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:18:48.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:18:48.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:18:48.571 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:18:48.571 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:18:48.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:18:48.571 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:18:48.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:18:48.571 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:18:48.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:18:48.571 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:18:48.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:18:48.573 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:18:48.573 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:18:48.578 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:18:49.041 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:18:49.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:18:49.966 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:18:50.429 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:18:50.891 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:18:51.354 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:18:51.817 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:18:52.280 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:18:52.743 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:18:53.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:18:53.674 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:18:54.139 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:18:54.602 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:18:55.067 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:18:55.531 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:18:55.993 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:18:56.457 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:18:56.919 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:18:57.382 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:18:57.846 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:18:58.309 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:18:58.772 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:18:59.235 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:18:59.698 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:19:00.161 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:19:00.624 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:19:01.086 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:19:01.550 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:19:02.013 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:19:02.476 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:19:02.940 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:19:03.403 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:19:03.866 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:19:04.330 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:19:04.793 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:19:05.256 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:19:05.721 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:19:06.185 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:19:06.648 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:19:07.112 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:19:07.578 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:19:08.041 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:19:08.505 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:19:08.970 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:19:09.439 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:19:09.903 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:19:10.366 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:19:10.829 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:19:11.292 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:19:12.156 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:19:12.627 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:19:13.099 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:19:13.573 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:19:14.045 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:19:14.515 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:19:15.969 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:19:16.438 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:19:16.902 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:19:17.366 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:19:17.831 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:19:18.296 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:19:18.760 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:19:19.224 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:19:19.690 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:19:20.155 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:19:20.618 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 03:19:21.081 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 03:19:21.545 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 03:19:22.008 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 03:19:22.471 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 03:19:22.934 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 03:19:23.398 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 03:19:23.861 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 03:19:24.325 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 03:19:24.788 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 03:19:25.251 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 03:19:25.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:25.715 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 03:19:26.179 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 03:19:26.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:26.643 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 03:19:27.106 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 03:19:27.570 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 03:19:27.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:28.035 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 03:19:28.500 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 03:19:28.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:28.963 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 03:19:29.428 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 03:19:29.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:29.892 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 03:19:30.356 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 03:19:30.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:30.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:19:30.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:19:30.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:19:30.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:19:30.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:19:30.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:19:30.599 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:19:35.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:19:35.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:19:35.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:19:35.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:19:35.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:19:35.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:19:35.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:19:35.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:19:35.608 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:19:35.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:19:35.608 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:19:35.609 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:19:35.609 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:19:35.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:19:35.610 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:19:35.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:19:35.610 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:19:35.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:19:35.610 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:19:35.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:35.611 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:19:35.611 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:19:35.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:19:35.611 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:19:35.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:19:35.611 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:19:35.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:19:35.611 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:19:35.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:35.612 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:19:35.612 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:19:35.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:19:35.612 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:19:35.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:19:35.612 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:19:35.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:19:35.612 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:19:35.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:35.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:19:35.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:19:35.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:19:35.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:19:35.614 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:19:35.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:35.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:35.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:35.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:35.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:35.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:35.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:35.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:35.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:35.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:35.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:35.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:19:36.083 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:19:36.132 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:19:36.133 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:36.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:36.133 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:19:36.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:19:36.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:19:36.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:19:36.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:36.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:19:36.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:19:36.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:19:36.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:19:36.172 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:36.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:36.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:19:36.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:19:36.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:36.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:36.546 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:19:36.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:36.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:36.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:36.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:37.030 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:19:37.084 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:19:37.547 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:19:37.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:37.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:37.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:37.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:38.009 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:19:38.474 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:19:38.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:38.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:38.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:38.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:38.937 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:19:39.400 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:19:39.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:39.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:39.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:39.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:39.864 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:19:39.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:39.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:39.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:19:39.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:19:39.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:19:39.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:19:39.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:19:39.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:39.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:19:39.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:19:39.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:19:39.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:19:39.951 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:39.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:39.955 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:19:39.955 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:19:39.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:39.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:40.326 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:19:40.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:40.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:40.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:40.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:40.789 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:19:41.252 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:19:41.716 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:19:42.179 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:19:42.649 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:19:43.120 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:19:43.600 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:19:43.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:43.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:43.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:19:43.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:19:43.992 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:19:44.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:19:44.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:19:44.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:19:44.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:44.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:19:44.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:19:44.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:19:44.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:19:44.018 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:44.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:44.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:19:44.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:19:44.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:44.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:44.072 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:19:44.507 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:19:44.543 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:19:45.014 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:19:45.487 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:19:45.959 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:19:46.588 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:19:47.053 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:19:47.516 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:19:47.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:47.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:47.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:19:47.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:19:47.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:19:47.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:19:47.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:19:47.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:47.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:19:47.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:19:47.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:19:47.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:19:47.979 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:19:47.981 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:47.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:47.985 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:19:47.985 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:19:47.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:47.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:48.442 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:19:48.906 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:19:49.369 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:19:49.755 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:19:49.832 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:19:50.308 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:19:50.696 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:19:50.770 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:19:51.233 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:19:51.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:51.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:51.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:19:51.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:19:51.620 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:19:51.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:51.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:51.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:51.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:51.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:19:51.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:19:51.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:19:51.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:19:51.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:19:51.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:19:51.624 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:19:51.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3453 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:19:51.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3453 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:19:51.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3453 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:19:51.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3453 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:19:51.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3453 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:19:51.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3453 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:19:51.624 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3453 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:19:56.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:19:56.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:19:56.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:19:56.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:19:56.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:19:56.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:19:56.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:19:56.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:19:56.629 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:19:56.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:19:56.629 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:19:56.631 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:19:56.631 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:19:56.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:19:56.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:19:56.631 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:19:56.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:19:56.631 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:19:56.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:19:56.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:56.632 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:19:56.632 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:19:56.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:19:56.632 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:19:56.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:19:56.633 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:19:56.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:19:56.633 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:19:56.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:56.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:19:56.634 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:19:56.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:19:56.634 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:19:56.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:19:56.634 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:19:56.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:19:56.634 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:19:56.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:56.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:19:56.636 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:19:56.636 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:19:56.636 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:56.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:19:56.640 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:19:57.103 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:19:57.148 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:19:57.148 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:57.148 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:19:57.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:57.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:19:57.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:19:57.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:19:57.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:57.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:19:57.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:19:57.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:19:57.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:19:57.193 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:57.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:19:57.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:19:57.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:19:57.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:57.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:19:57.566 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:19:57.570 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:57.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:57.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:57.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:57.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:58.029 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:19:58.041 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:58.042 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:19:58.493 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:19:58.512 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:58.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:58.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:58.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:58.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:58.955 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:19:58.987 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:59.418 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:19:59.458 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:19:59.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:19:59.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:19:59.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:19:59.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:19:59.882 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:19:59.929 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:00.344 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:20:00.404 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:00.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:00.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:00.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:00.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:00.807 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:20:00.875 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:01.269 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:20:01.346 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:01.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:01.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:01.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:01.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:01.731 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:20:01.817 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:02.194 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:20:02.287 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:02.658 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:20:02.763 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:03.121 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:20:03.233 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:03.585 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:20:03.710 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:04.048 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:20:04.179 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:04.512 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:20:04.655 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:04.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:04.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:04.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:04.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:04.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:04.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:04.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:04.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:04.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:04.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:04.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:04.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:04.693 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:04.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:04.697 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:20:04.697 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:20:04.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:04.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:04.975 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:20:05.366 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:05.438 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:20:05.836 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:05.901 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:20:06.312 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:06.363 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:20:06.782 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:06.828 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:20:07.253 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:07.294 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:20:07.729 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:07.757 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:20:08.204 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:08.220 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:20:08.675 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:08.682 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:20:09.145 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:20:09.146 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:09.609 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:20:09.612 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:10.071 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:20:10.082 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:10.534 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:20:10.554 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:10.997 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:20:11.029 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:11.460 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:20:11.500 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:11.923 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:20:11.971 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:12.387 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:20:12.446 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:12.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:12.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:12.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:12.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:12.452 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:20:12.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:12.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:12.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:12.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:12.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:12.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:12.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:12.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:12.474 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:12.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:12.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:12.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:12.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:12.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:12.821 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:12.852 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:20:13.287 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:13.289 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:20:13.317 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:20:13.748 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:13.782 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:20:14.213 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:14.246 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:20:14.680 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:14.709 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:20:15.141 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:15.176 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:20:15.607 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:15.639 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:20:16.069 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:16.102 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:20:16.536 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:16.569 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:20:17.002 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:17.038 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:20:17.472 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:17.506 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:20:17.939 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:17.975 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:20:18.409 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:18.444 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:20:18.876 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:18.912 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:20:19.348 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:19.377 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:20:19.807 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:19.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:19.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:19.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:19.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:19.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:19.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:19.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:19.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:19.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:19.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:19.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:19.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:19.841 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:19.842 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:20:19.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:19.848 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:20:19.848 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:20:19.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:19.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:20.228 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:20.307 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:20:20.695 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:20.772 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:20:21.160 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:21.161 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:20:21.236 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:20:21.623 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:21.701 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:20:22.087 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:22.164 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:20:22.549 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:22.627 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:20:23.016 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:23.019 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:20:23.091 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:20:23.476 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:23.555 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:20:23.943 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:23.944 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:20:24.020 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:20:24.404 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:24.484 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:20:24.870 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:24.871 [DEBUG] fake_trx.py:269 (MS@172.18.205.22:6700) Recv SETTA cmd
2026-04-22 03:20:24.946 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:20:25.332 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:25.409 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:20:25.793 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:25.871 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:20:26.259 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:26.334 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:20:26.721 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:26.797 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:20:27.183 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:27.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:27.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:27.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:27.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:27.185 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:20:27.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:27.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:27.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:27.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:27.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:20:27.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:20:27.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:20:27.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:20:27.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:20:27.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:20:27.189 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:20:32.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:20:32.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:20:32.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:20:32.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:20:32.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:20:32.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:20:32.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:20:32.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:20:32.195 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:32.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:20:32.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:20:32.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:20:32.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:20:32.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:20:32.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:32.196 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:20:32.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:20:32.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:20:32.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:20:32.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:32.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:20:32.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:20:32.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:20:32.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:32.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:20:32.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:20:32.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:20:32.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:20:32.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:32.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:20:32.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:20:32.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:20:32.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:32.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:20:32.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:20:32.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:20:32.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:20:32.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:20:32.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:20:32.200 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:20:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:32.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:32.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:20:32.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:20:32.714 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:20:32.714 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:32.714 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:20:32.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:32.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:32.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:32.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:32.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:32.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:32.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:32.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:32.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:32.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:32.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:32.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:32.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:32.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:33.133 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:20:33.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:33.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:33.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:33.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:33.597 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:20:34.059 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:20:34.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:34.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:34.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:34.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:34.522 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:20:34.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:34.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:34.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:34.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:34.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:34.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:34.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:34.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:34.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:34.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:34.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:34.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:34.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:34.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:34.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:34.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:34.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:34.985 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:20:35.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:35.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:35.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:35.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:35.455 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:20:35.919 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:20:36.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:36.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:36.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:36.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:36.381 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:20:36.844 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:20:36.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:36.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:36.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:36.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:36.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:36.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:36.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:36.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:36.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:36.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:36.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:36.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:37.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:37.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:37.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:37.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:37.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:37.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:37.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:37.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:37.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:37.307 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:20:37.770 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:20:38.238 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:20:38.704 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:20:39.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:39.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:39.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:39.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:39.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:39.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:39.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:39.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:39.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:20:39.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:20:39.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:20:39.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:20:39.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:20:39.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:20:39.123 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:20:39.123 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1521 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1521 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1521 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1521 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1521 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1521 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.125 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1521 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:39.125 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1521 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:20:44.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:20:44.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:20:44.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:20:44.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:20:44.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:20:44.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:20:44.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:20:44.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:20:44.124 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:44.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:20:44.124 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:20:44.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:20:44.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:20:44.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:20:44.125 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:44.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:20:44.125 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:20:44.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:20:44.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:20:44.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:44.126 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:20:44.126 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:20:44.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:20:44.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:44.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:20:44.126 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:20:44.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:20:44.126 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:20:44.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:44.127 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:20:44.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:20:44.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:20:44.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:44.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:20:44.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:20:44.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:20:44.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:20:44.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:20:44.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:20:44.129 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:20:44.129 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:44.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:44.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:44.134 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:20:44.597 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:20:44.642 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:20:44.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:44.643 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:44.643 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:20:44.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:44.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:44.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:44.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:44.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:44.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:44.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:44.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:44.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:44.690 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:20:44.690 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:20:44.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:44.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:45.060 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:20:45.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:45.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:45.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:45.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:45.523 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:20:45.986 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:20:46.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:46.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:46.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:46.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:46.449 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:20:46.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:46.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:46.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:46.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:46.776 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:20:46.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:46.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:46.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:46.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:46.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:46.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:46.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:46.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:46.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:46.825 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:20:46.825 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:20:46.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:46.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:46.912 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:20:47.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:47.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:47.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:47.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:47.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:20:47.839 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:20:48.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:48.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:48.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:48.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:48.302 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:20:48.765 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:20:48.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:48.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:48.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:48.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:48.917 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:20:48.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:48.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:48.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:48.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:48.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:20:48.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:20:48.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:20:48.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:20:48.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:20:48.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:20:48.921 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:20:53.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:20:53.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:20:53.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:20:53.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:20:53.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:20:53.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:20:53.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:20:53.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:20:53.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:53.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:20:53.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:20:53.928 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:20:53.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:20:53.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:20:53.928 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:53.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:20:53.928 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:20:53.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:20:53.928 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:20:53.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:53.929 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:20:53.929 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:20:53.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:20:53.929 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:53.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:20:53.929 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:20:53.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:20:53.929 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:20:53.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:53.930 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:20:53.930 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:20:53.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:20:53.930 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:20:53.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:20:53.930 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:20:53.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:20:53.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:20:53.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:53.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:20:53.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:20:53.932 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:20:53.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:20:53.936 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:20:54.401 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:20:54.449 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:20:54.450 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:20:54.451 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:20:54.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:54.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:54.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:54.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:54.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:54.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:54.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:54.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:54.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:54.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:54.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:54.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:54.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:54.866 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:20:54.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:54.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:54.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:54.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:55.331 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:20:55.797 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:20:55.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:55.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:55.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:55.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:56.261 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:20:56.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:56.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:56.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:56.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:56.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:56.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:56.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:56.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:56.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:56.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:56.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:56.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:56.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:56.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:56.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:56.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:56.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:56.727 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:20:56.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:56.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:56.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:56.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:57.192 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:20:57.657 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:20:57.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:57.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:57.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:57.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:58.123 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:20:58.588 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:20:58.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:58.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:58.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:58.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:58.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:20:58.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:20:58.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:20:58.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:58.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:58.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:58.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:20:58.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:20:58.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:20:58.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:20:58.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:20:58.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:58.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:20:58.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:20:58.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:20:58.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:20:58.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:20:59.053 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:20:59.519 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:20:59.984 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:21:00.449 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:21:00.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:00.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:00.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:00.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:00.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:00.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:00.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:00.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:00.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:00.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:00.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:00.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:00.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:00.852 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:21:00.852 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1517 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:00.852 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1517 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:00.852 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1517 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:00.852 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1517 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:00.852 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1517 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:05.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:05.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:05.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:05.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:05.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:05.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:05.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:05.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:05.860 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:05.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:05.860 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:21:05.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:21:05.862 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:21:05.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:05.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:05.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:05.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:21:05.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:05.862 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:21:05.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:05.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:21:05.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:21:05.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:05.864 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:05.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:05.864 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:21:05.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:05.864 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:21:05.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:05.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:21:05.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:21:05.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:05.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:05.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:05.867 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:21:05.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:05.867 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:21:05.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:05.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:21:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:21:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:21:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:21:05.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:21:05.871 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:21:05.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:05.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:05.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:05.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:21:06.340 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:21:06.394 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:21:06.395 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:21:06.396 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:21:06.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:06.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:06.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:06.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:06.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:06.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:06.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:06.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:06.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:06.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:06.437 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:21:06.437 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:21:06.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:06.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:06.805 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:21:06.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:06.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:06.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:06.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:07.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:21:07.735 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:21:07.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:07.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:07.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:07.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:08.200 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:21:08.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:08.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:08.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:08.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:08.549 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:21:08.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:08.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:08.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:08.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:08.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:08.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:08.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:08.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:08.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:08.574 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:21:08.574 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:21:08.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:08.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:08.665 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:21:08.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:08.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:08.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:08.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:21:09.595 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:21:09.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:09.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:09.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:09.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:10.060 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:21:10.524 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:21:10.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:10.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:10.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:10.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:10.680 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:21:10.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:10.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:10.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:10.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:10.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:10.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:10.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:10.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:10.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:10.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:10.686 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:21:15.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:15.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:15.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:15.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:15.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:15.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:15.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:15.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:15.694 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:15.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:15.694 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:21:15.696 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:21:15.696 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:21:15.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:15.696 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:15.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:15.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:21:15.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:15.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:21:15.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:15.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:21:15.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:21:15.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:15.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:15.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:15.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:21:15.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:15.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:21:15.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:15.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:21:15.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:21:15.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:15.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:15.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:15.700 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:21:15.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:15.700 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:21:15.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:21:15.704 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:21:15.704 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:21:15.704 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:15.709 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:21:16.174 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:21:16.228 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:21:16.229 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:21:16.230 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:21:16.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:16.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:16.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:16.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:16.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:16.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:16.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:16.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:16.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:16.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:16.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:16.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:16.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:16.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:16.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:21:16.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:16.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:16.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:16.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:17.105 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:21:17.571 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:21:17.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:17.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:17.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:17.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:18.035 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:21:18.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:18.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:18.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:18.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:18.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:18.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:18.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:18.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:18.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:18.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:18.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:18.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:18.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:18.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:18.476 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:21:23.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:23.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:23.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:23.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:23.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:23.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:23.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:23.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:23.483 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:23.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:23.483 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:21:23.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:21:23.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:21:23.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:23.484 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:23.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:23.485 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:21:23.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:23.485 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:21:23.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:23.487 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:21:23.487 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:21:23.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:23.487 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:23.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:23.487 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:21:23.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:23.487 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:21:23.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:23.489 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:21:23.489 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:21:23.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:23.489 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:23.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:23.490 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:21:23.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:23.490 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:21:23.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:23.493 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:21:23.493 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:21:23.493 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:21:23.494 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:23.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:23.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:23.498 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:21:23.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:21:24.018 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:21:24.019 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:21:24.020 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:21:24.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:24.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:24.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:24.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:24.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:24.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:24.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:24.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:24.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:24.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:24.062 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:21:24.062 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:21:24.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:24.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:24.429 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:21:24.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:24.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:24.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:24.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:24.892 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:21:25.357 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:21:25.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:25.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:25.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:25.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:25.822 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:21:26.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:26.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:26.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:26.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:26.228 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:21:26.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:26.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:26.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:26.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:26.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:26.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:26.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:26.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:26.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:26.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:26.232 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:21:31.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:31.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:31.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:31.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:31.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:31.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:31.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:31.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:31.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:31.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:31.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:21:31.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:21:31.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:21:31.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:31.244 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:31.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:31.244 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:21:31.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:31.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:21:31.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:31.246 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:21:31.246 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:21:31.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:31.246 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:31.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:31.246 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:21:31.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:31.246 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:21:31.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:31.248 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:21:31.248 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:21:31.248 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:31.248 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:31.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:31.249 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:21:31.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:31.249 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:21:31.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:21:31.252 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:21:31.252 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:21:31.252 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:31.257 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:21:31.723 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:21:31.771 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:21:31.772 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:21:31.773 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:21:31.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:31.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:31.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:31.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:31.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:31.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:31.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:31.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:31.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:31.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:31.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:31.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:31.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:31.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:32.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:21:32.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:32.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:32.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:32.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:32.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:32.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:32.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:32.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:32.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:32.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:32.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:32.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:32.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:32.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:32.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:32.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:32.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:32.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:32.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:32.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:32.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:32.652 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:21:32.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:32.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:32.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:32.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:32.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:32.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:32.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:32.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:32.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:32.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:32.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:32.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:32.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:32.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:32.787 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:21:37.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:37.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:37.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:37.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:37.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:37.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:37.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:37.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:37.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:37.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:37.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:21:37.799 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:21:37.799 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:21:37.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:37.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:37.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:37.800 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:21:37.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:37.800 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:21:37.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:37.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:21:37.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:21:37.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:37.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:37.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:37.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:21:37.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:37.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:21:37.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:37.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:21:37.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:21:37.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:37.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:37.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:37.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:21:37.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:37.804 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:21:37.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:37.808 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:21:37.808 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:21:37.808 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:21:37.809 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:37.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:37.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:37.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:37.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:37.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:37.813 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:21:38.279 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:21:38.334 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:21:38.335 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:21:38.336 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:21:38.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:38.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:38.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:38.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:38.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:38.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:38.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:38.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:38.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:38.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:38.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:38.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:38.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:38.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:38.745 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:21:38.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:38.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:38.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:38.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:38.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:38.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:38.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:38.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:38.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:38.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:38.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:38.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:38.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:38.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:38.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:38.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:38.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:38.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:38.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:38.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:38.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:39.210 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:21:39.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:39.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:39.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:39.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:39.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:39.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:39.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:39.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:39.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:39.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:39.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:39.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:39.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:39.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:39.309 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:21:39.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=330 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:39.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=330 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:39.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=330 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:39.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=330 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:39.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=330 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:39.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=330 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:39.309 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=330 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:44.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:44.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:44.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:44.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:44.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:44.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:44.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:44.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:44.320 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:44.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:44.320 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:21:44.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:21:44.321 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:21:44.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:44.321 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:44.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:44.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:21:44.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:44.322 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:21:44.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:44.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:21:44.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:21:44.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:44.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:44.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:44.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:21:44.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:44.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:21:44.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:44.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:21:44.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:21:44.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:44.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:44.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:44.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:21:44.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:44.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:21:44.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:21:44.330 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:21:44.330 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:21:44.330 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:21:44.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:44.335 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:21:44.801 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:21:44.855 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:21:44.856 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:21:44.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:44.857 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:21:44.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:44.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:44.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:44.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:44.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:44.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:44.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:44.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:44.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:44.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:44.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:44.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:44.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:45.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:21:45.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:45.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:45.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:45.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:45.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:45.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:45.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:45.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:45.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:45.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:45.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:45.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:45.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:45.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:45.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:45.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:45.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:45.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:45.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:45.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:45.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:45.730 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:21:45.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:45.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:45.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:45.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:45.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:45.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:45.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:45.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:45.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:45.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:45.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:45.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:45.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:45.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:45.770 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:21:45.770 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=317 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:45.771 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=317 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:45.771 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=317 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:45.771 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=317 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:45.771 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=317 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:45.771 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=317 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:45.771 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=317 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:50.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:50.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:50.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:50.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:50.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:50.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:50.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:50.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:50.782 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:50.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:21:50.782 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:21:50.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:21:50.784 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:21:50.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:50.784 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:50.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:50.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:21:50.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:21:50.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:21:50.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:50.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:21:50.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:21:50.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:50.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:50.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:50.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:21:50.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:21:50.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:21:50.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:50.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:21:50.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:21:50.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:50.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:21:50.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:50.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:21:50.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:21:50.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:21:50.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:50.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:21:50.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:21:50.793 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:21:50.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:50.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:50.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:21:50.798 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:21:51.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:21:51.317 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:21:51.318 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:21:51.319 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:21:51.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:51.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:51.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:51.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:21:51.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:51.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:21:51.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:21:51.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:21:51.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:21:51.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:21:51.404 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:21:51.404 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:21:51.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:51.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:21:51.729 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:21:51.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:51.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:51.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:51.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:52.194 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:21:52.659 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:21:52.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:52.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:52.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:52.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:53.124 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:21:53.589 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:21:53.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:53.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:53.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:53.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:54.054 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:21:54.520 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:21:54.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:54.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:54.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:54.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:55.380 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:21:55.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:21:55.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:21:55.406 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:21:55.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:21:55.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:21:55.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:21:55.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:21:55.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:21:55.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:21:55.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:21:55.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:21:55.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:21:55.409 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:21:55.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:21:55.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:55.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:55.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:55.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:55.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:55.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:55.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:21:55.410 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:00.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:00.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:00.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:00.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:00.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:00.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:00.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:00.419 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:00.419 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:00.419 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:00.419 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:00.420 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:00.420 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:00.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:00.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:00.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:00.420 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:00.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:00.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:00.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:00.421 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:00.421 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:00.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:00.421 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:00.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:00.421 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:00.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:00.421 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:00.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:00.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:00.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:00.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:00.423 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:00.423 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:00.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:00.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:00.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:00.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:00.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:00.425 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:00.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:00.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:00.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:00.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:22:00.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:22:01.056 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:22:01.058 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:22:01.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:01.060 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:22:01.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:01.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:01.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:01.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:01.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:01.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:01.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:01.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:22:01.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:01.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:01.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:01.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:01.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:01.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:01.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:01.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:01.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:01.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:01.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:01.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:01.364 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:22:01.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:01.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:01.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:01.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:01.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:22:01.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:01.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:01.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:01.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:01.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:01.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:01.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:01.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:01.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:01.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:01.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:01.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:01.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:01.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:01.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:01.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:01.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:01.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:01.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:01.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:01.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:01.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:01.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:01.612 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:22:01.612 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=260 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:01.612 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=260 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:01.612 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=260 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:01.612 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=260 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:01.612 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=260 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:01.612 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=260 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:06.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:06.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:06.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:06.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:06.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:06.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:06.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:06.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:06.619 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:06.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:06.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:06.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:06.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:06.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:06.619 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:06.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:06.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:06.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:06.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:06.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:06.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:06.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:06.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:06.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:06.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:06.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:06.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:06.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:06.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:06.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:06.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:06.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:06.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:06.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:06.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:06.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:06.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:06.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:06.623 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:06.623 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:06.623 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:06.624 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:06.628 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:22:07.092 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:22:07.135 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:22:07.135 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:22:07.136 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:22:07.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:07.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:07.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:07.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:07.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:07.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:07.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:07.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:07.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:22:07.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:07.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:22:07.182 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:22:07.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:07.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:07.555 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:22:07.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:07.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:07.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:07.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:08.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:22:08.482 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:22:08.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:08.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:08.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:08.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:08.945 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:22:09.408 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:22:09.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:09.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:09.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:09.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:09.871 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:22:10.335 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:22:10.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:10.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:10.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:10.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:10.799 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:22:11.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:11.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:11.183 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:22:11.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:11.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:11.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:11.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:11.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:11.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:11.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:11.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:11.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:11.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:11.185 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:22:16.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:16.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:16.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:16.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:16.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:16.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:16.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:16.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:16.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:16.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:16.190 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:16.191 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:16.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:16.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:16.191 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:16.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:16.191 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:16.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:16.191 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:16.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:16.192 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:16.192 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:16.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:16.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:16.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:16.192 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:16.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:16.192 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:16.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:16.193 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:16.193 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:16.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:16.193 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:16.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:16.193 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:16.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:16.193 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:16.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:16.195 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:16.195 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:16.195 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:16.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:16.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:16.200 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:22:16.662 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:22:16.708 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:22:16.708 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:22:16.709 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:22:16.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:16.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:16.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:16.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:16.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:16.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:16.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:16.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:16.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:22:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:16.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:16.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:16.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:16.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:17.125 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:22:17.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:17.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:17.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:17.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:17.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:17.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:17.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:17.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:17.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:17.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:17.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:17.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:17.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:17.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:17.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:17.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:17.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:17.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:17.471 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:22:17.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:17.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:17.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:17.471 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:22.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:22.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:22.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:22.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:22.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:22.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:22.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:22.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:22.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:22.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:22.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:22.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:22.478 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:22.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:22.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:22.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:22.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:22.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:22.478 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:22.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:22.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:22.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:22.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:22.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:22.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:22.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:22.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:22.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:22.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:22.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:22.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:22.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:22.481 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:22.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:22.481 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:22.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:22.481 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:22.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:22.483 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:22.483 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:22.483 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:22.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:22.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:22.488 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:22:22.950 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:22:22.999 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:22:23.000 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:22:23.000 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:22:23.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:23.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:23.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:23.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:23.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:23.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:23.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:23.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:23.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:22:23.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:23.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:23.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:23.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:23.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:23.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:22:23.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:23.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:23.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:23.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:23.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:23.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:23.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:23.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:23.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:23.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:23.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:23.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:23.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:23.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:23.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:23.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:23.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:23.762 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:22:28.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:28.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:28.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:28.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:28.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:28.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:28.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:28.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:28.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:28.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:28.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:28.770 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:28.770 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:28.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:28.770 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:28.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:28.770 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:28.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:28.770 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:28.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:28.771 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:28.771 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:28.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:28.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:28.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:28.771 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:28.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:28.771 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:28.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:28.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:28.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:28.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:28.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:28.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:28.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:28.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:28.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:28.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:28.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:28.775 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:28.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:28.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:28.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:28.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:22:29.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:22:29.287 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:22:29.288 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:22:29.288 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:22:29.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:29.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:29.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:29.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:29.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:29.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:29.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:29.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:29.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:22:29.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:29.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:29.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:29.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:29.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:29.705 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:22:29.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:29.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:29.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:29.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:30.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:30.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:30.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:30.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:30.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:30.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:30.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:30.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:30.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:30.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:30.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:30.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:30.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:30.033 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:22:30.033 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=277 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:30.033 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=277 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:30.033 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=277 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:30.033 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=277 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:30.033 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=277 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:35.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:35.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:35.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:35.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:35.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:35.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:35.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:35.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:35.038 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:35.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:35.038 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:35.039 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:35.039 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:35.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:35.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:35.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:35.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:35.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:35.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:35.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:35.040 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:35.040 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:35.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:35.040 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:35.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:35.040 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:35.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:35.040 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:35.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:35.041 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:35.041 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:35.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:35.041 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:35.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:35.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:35.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:35.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:35.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:35.043 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:35.043 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:35.043 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:35.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:35.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:35.044 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:22:40.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:40.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:40.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:40.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:40.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:40.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:40.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:40.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:40.050 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:40.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:40.051 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:40.051 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:40.051 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:40.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:40.051 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:40.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:40.051 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:40.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:40.052 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:40.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:40.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:40.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:40.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:40.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:40.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:40.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:40.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:40.053 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:40.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:40.053 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:40.053 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:40.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:40.053 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:40.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:40.054 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:40.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:40.054 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:40.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:40.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:40.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:40.057 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:40.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:40.061 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:22:40.527 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:22:40.571 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:22:40.571 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:22:40.572 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:22:40.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:40.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:40.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:40.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:40.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:40.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:40.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:40.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:40.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:22:40.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:40.620 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:22:40.620 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:22:40.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:40.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:40.990 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:22:41.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:41.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:41.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:41.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:41.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:22:41.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:41.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:41.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:41.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:41.458 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:22:41.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:41.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:41.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:41.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:41.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:41.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:41.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:41.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:41.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:41.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:41.461 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:22:41.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=310 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:41.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:41.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:41.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:41.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:41.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:41.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:41.461 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:46.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:46.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:46.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:46.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:46.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:46.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:46.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:46.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:46.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:46.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:46.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:46.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:46.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:46.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:46.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:46.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:46.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:46.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:46.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:46.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:46.469 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:46.469 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:46.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:46.469 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:46.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:46.469 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:46.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:46.469 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:46.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:46.471 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:46.471 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:46.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:46.471 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:46.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:46.471 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:46.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:46.471 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:46.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:46.474 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:46.474 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:46.474 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:46.474 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:46.479 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:22:46.943 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:22:46.987 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:22:46.987 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:22:46.988 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:22:46.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:46.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:46.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:46.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:47.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:47.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:47.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:47.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:47.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:22:47.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:47.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:47.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:47.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:47.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:47.406 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:22:47.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:47.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:47.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:47.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:47.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:47.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:47.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:47.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:47.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:47.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:47.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:47.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:47.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:47.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:47.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:47.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:47.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:47.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:47.752 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:22:47.752 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:47.752 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:47.752 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:47.753 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:22:52.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:52.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:52.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:52.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:52.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:52.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:52.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:52.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:52.758 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:52.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:52.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:52.759 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:52.759 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:52.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:52.759 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:52.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:52.759 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:52.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:52.759 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:52.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:52.760 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:52.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:52.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:52.760 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:52.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:52.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:52.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:52.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:52.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:52.761 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:52.761 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:52.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:52.761 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:52.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:52.761 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:52.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:52.761 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:52.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:52.762 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:52.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:52.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:52.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:52.762 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:52.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:52.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:52.763 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:52.763 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:52.763 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:52.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:52.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:52.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:52.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:22:53.232 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:22:53.275 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:22:53.276 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:22:53.277 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:22:53.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:53.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:53.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:53.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:53.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:53.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:53.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:53.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:53.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:22:53.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:53.325 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:22:53.325 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:22:53.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:53.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:53.695 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:22:53.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:53.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:53.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:53.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:54.158 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:22:54.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:54.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:54.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:54.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:54.164 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:22:54.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:54.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:54.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:54.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:54.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:54.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:54.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:54.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:54.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:54.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:54.167 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:22:59.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:22:59.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:22:59.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:59.169 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:59.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:59.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:59.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:22:59.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:59.176 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:59.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:22:59.176 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:22:59.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:22:59.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:22:59.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:59.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:59.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:22:59.177 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:22:59.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:22:59.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:22:59.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:22:59.179 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:22:59.179 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:22:59.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:59.179 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:59.179 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:22:59.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:22:59.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:22:59.179 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:22:59.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:22:59.181 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:22:59.181 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:22:59.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:59.181 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:22:59.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:22:59.181 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:22:59.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:22:59.181 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:22:59.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:59.182 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:22:59.182 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:22:59.182 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:22:59.183 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:59.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:59.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:59.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:22:59.187 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:22:59.650 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:22:59.698 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:22:59.698 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:22:59.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:22:59.699 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:22:59.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:22:59.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:22:59.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:22:59.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:22:59.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:22:59.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:22:59.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:22:59.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:23:00.113 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:23:00.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:00.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:00.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:00.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:00.575 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:23:00.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:23:01.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:23:01.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:01.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:01.037 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:23:01.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:01.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:01.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:23:01.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:01.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:23:01.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:23:01.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:23:01.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:23:01.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:01.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:01.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:01.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:01.499 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:23:01.968 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:23:02.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 03:23:02.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:02.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:02.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:02.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:02.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 03:23:02.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:02.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:02.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:02.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:02.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:02.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:02.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:02.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:02.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:02.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:02.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:23:02.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:23:02.250 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:23:07.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:23:07.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:23:07.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:07.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:07.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:07.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:07.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:07.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:23:07.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:07.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:23:07.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:23:07.259 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:23:07.259 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:23:07.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:23:07.259 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:07.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:07.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:23:07.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:23:07.259 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:23:07.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:07.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:23:07.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:23:07.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:23:07.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:07.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:07.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:23:07.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:23:07.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:23:07.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:07.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:23:07.261 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:23:07.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:23:07.261 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:07.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:07.261 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:23:07.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:23:07.261 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:23:07.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:07.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:23:07.263 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:23:07.263 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:23:07.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:07.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:07.268 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:23:07.733 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:23:07.777 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:23:07.778 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:23:07.778 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:23:07.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:23:07.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:07.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:07.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:23:07.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:07.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:23:07.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:23:07.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:23:07.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:23:08.196 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:23:08.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:08.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:08.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:08.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:08.660 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:23:09.122 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:23:09.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:09.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:09.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:09.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:09.587 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:23:10.056 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:23:10.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:10.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:10.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:10.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:10.520 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:23:10.983 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:23:11.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:11.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:11.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:11.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:11.446 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:23:11.909 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:23:12.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:12.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:12.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:12.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:12.372 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:23:12.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 03:23:12.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:23:12.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:23:12.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:12.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:12.835 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:23:13.300 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:23:13.763 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:23:14.226 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:23:14.691 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:23:15.155 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:23:15.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:15.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:15.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:15.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:15.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:15.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:15.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:15.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:15.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:15.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:15.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:23:15.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:23:15.590 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:23:15.590 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1830 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:15.590 [WARNING] transceiver.py:257 (TRX1@172.18.205.20:5700/1) RX TRXD message (ver=1 fn=1830 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-04-22 03:23:15.590 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1830 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:15.590 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1830 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:15.590 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1830 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:15.590 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1830 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:15.590 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1830 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:15.590 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1830 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:15.590 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1830 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:20.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:23:20.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:23:20.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:20.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:20.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:20.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:20.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:20.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:23:20.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:20.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:23:20.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:23:20.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:23:20.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:23:20.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:23:20.596 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:20.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:20.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:23:20.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:23:20.597 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:23:20.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:20.597 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:23:20.597 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:23:20.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:23:20.597 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:20.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:20.598 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:23:20.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:23:20.598 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:23:20.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:20.598 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:23:20.598 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:23:20.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:23:20.598 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:20.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:20.599 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:23:20.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:23:20.599 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:23:20.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:23:20.600 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:23:20.600 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:23:20.600 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:23:20.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:20.605 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:23:21.068 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:23:21.114 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:23:21.115 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:23:21.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:23:21.116 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:23:21.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:21.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:21.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:23:21.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:21.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:23:21.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:23:21.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:23:21.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:23:21.530 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:23:21.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:21.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:21.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:21.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:21.994 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:23:22.457 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:23:22.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:22.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:22.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:22.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:22.920 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:23:23.384 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:23:23.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:23.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:23.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:23.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:23.848 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:23:24.312 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:23:24.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:24.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:24.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:24.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:24.775 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:23:25.238 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:23:25.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:25.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:25.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:25.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:25.701 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:23:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 03:23:25.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:23:25.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:23:25.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:25.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:26.164 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:23:26.626 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:23:27.089 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:23:27.551 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:23:28.164 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:23:28.627 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:23:28.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:28.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:28.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:28.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:28.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:28.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:28.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:28.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:28.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:28.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:28.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:23:28.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:23:28.914 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:23:33.915 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:23:33.915 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:23:33.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:33.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:33.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:33.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:33.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:33.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:23:33.920 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:33.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:23:33.920 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:23:33.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:23:33.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:23:33.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:23:33.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:33.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:33.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:23:33.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:23:33.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:23:33.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:33.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:23:33.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:23:33.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:23:33.922 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:33.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:33.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:23:33.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:23:33.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:23:33.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:33.922 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:23:33.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:23:33.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:23:33.923 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:33.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:33.923 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:23:33.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:23:33.923 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:23:33.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:33.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:23:33.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:23:33.925 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:23:33.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:33.929 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:23:34.394 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:23:34.437 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:23:34.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:23:34.438 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:23:34.439 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:23:34.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:34.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:34.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:23:34.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:34.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:23:34.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:23:34.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:23:34.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:23:34.858 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:23:34.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:34.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:34.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:34.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:35.327 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:23:35.792 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:23:35.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:35.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:35.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:35.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:36.255 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:23:36.719 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:23:36.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:36.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:36.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:36.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:37.183 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:23:37.647 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:23:37.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:37.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:37.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:37.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:38.111 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:23:38.721 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:23:38.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:38.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:38.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:38.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:39.188 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:23:39.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 03:23:39.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:23:39.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:23:39.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:39.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:39.655 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:23:40.120 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:23:40.584 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:23:41.048 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:23:41.511 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:23:41.976 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:23:42.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:42.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:42.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:42.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:42.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:42.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:42.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:42.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:42.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:42.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:42.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:23:42.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:23:42.190 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:23:42.190 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1781 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:42.191 [WARNING] transceiver.py:257 (TRX3@172.18.205.20:5700/3) RX TRXD message (ver=1 fn=1781 tn=0 bl=148 pwr=4), but transceiver is not running => dropping...
2026-04-22 03:23:42.191 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1781 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:42.191 [WARNING] transceiver.py:257 (TRX1@172.18.205.20:5700/1) RX TRXD message (ver=1 fn=1782 tn=0 bl=148 pwr=4), but transceiver is not running => dropping...
2026-04-22 03:23:47.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:23:47.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:23:47.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:47.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:47.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:47.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:47.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:47.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:23:47.192 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:47.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:23:47.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:23:47.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:23:47.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:23:47.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:23:47.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:47.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:47.193 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:23:47.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:23:47.193 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:23:47.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:47.194 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:23:47.194 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:23:47.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:23:47.194 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:47.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:47.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:23:47.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:23:47.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:23:47.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:47.195 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:23:47.195 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:23:47.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:23:47.195 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:23:47.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:47.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:23:47.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:23:47.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:23:47.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:47.196 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:23:47.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:23:47.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:23:47.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:23:47.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:23:47.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:23:47.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:23:47.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:23:47.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:23:47.197 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:23:47.197 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:23:47.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:23:47.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:47.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:23:47.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:47.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:47.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:47.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:23:47.202 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:23:47.669 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:23:47.717 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:23:47.718 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:23:47.718 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:23:47.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:23:47.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:47.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:47.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:23:47.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:47.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:23:47.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:23:47.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:23:47.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:23:48.133 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:23:48.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:48.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:48.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:48.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:48.598 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:23:49.064 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:23:49.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:49.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:49.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:49.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:49.530 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:23:49.994 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:23:50.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:50.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:50.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:50.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:50.460 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:23:50.924 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:23:51.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:51.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:51.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:51.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:51.388 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:23:51.852 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:23:52.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:52.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:52.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:52.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:52.317 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:23:52.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 03:23:52.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:23:52.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:23:52.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:52.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:23:52.781 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:23:53.246 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:23:53.709 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:23:54.172 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:23:54.636 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:23:55.099 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:23:55.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:23:55.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:23:55.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:23:55.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:23:55.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:23:55.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:23:55.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:23:55.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:23:55.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:23:55.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:23:55.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:23:55.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:23:55.536 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:23:55.536 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1831 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:55.536 [WARNING] transceiver.py:257 (TRX2@172.18.205.20:5700/2) RX TRXD message (ver=1 fn=1831 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-04-22 03:23:55.536 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1831 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:55.536 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1831 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:55.536 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1831 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:55.536 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1831 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:55.536 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1831 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:23:55.536 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1831 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:24:00.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:00.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:00.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:00.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:00.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:00.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:00.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:00.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:00.541 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:00.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:00.541 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:24:00.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:24:00.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:24:00.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:00.542 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:00.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:00.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:24:00.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:00.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:24:00.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:00.543 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:24:00.543 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:24:00.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:00.543 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:00.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:00.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:24:00.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:00.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:24:00.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:00.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:24:00.544 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:24:00.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:00.544 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:00.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:00.544 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:24:00.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:00.544 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:24:00.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:00.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:24:00.546 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:24:00.546 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:24:00.546 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:00.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:00.550 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:24:01.013 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:24:01.061 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:24:01.061 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:24:01.061 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:24:01.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:24:01.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:24:01.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:24:01.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:24:01.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:24:01.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:24:01.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:24:01.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:24:01.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:24:01.476 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:24:01.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:01.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:01.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:01.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:01.938 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:24:02.401 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:24:02.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:02.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:02.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:02.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:02.863 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:24:03.326 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:24:03.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:03.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:03.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:03.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:03.788 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:24:04.251 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:24:04.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:04.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:04.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:04.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:04.714 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:24:05.176 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:24:05.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:05.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:05.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:05.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:05.638 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD NOHANDOVER
2026-04-22 03:24:05.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:24:05.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:24:05.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:24:05.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:24:06.101 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:24:06.564 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:24:07.027 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:24:07.490 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:24:07.952 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:24:08.415 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:24:08.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:24:08.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:24:08.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:08.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:08.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:08.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:08.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:08.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:08.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:08.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:08.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:08.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:08.855 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:24:13.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:13.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:13.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:13.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:13.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:13.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:13.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:13.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:13.860 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:13.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:13.860 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:24:13.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:24:13.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:24:13.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:13.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:13.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:13.861 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:24:13.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:13.861 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:24:13.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:13.862 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:24:13.862 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:24:13.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:13.862 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:13.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:13.862 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:24:13.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:13.862 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:24:13.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:13.863 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:24:13.863 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:24:13.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:13.863 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:13.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:13.863 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:24:13.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:13.863 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:24:13.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:13.864 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:24:13.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:24:13.865 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:24:13.865 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:24:13.865 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:13.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:13.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:13.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:13.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:13.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:13.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:13.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:13.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:13.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:13.870 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:24:14.333 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:24:14.381 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:24:14.381 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:24:14.381 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:24:14.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:24:14.795 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:24:14.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:14.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:14.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:14.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:15.258 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:24:15.720 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:24:15.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:15.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:15.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:15.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:16.183 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:24:16.647 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:24:16.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:16.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:16.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:16.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:17.109 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:24:17.572 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:24:17.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:17.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:17.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:17.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:18.034 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:24:18.497 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:24:18.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:18.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:18.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:18.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:18.961 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:24:19.423 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:24:19.886 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:24:20.348 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:24:20.810 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:24:21.274 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:24:21.736 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:24:22.198 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:24:22.661 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:24:23.123 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:24:23.585 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:24:24.050 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:24:24.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:24.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:24.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:24.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:24.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:24.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:24.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:24.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:24.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:24.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:24.386 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:24:24.386 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:24:24.386 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:24:24.386 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:24:24.386 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:24:24.386 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:24:24.386 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:24:24.386 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:24:29.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:29.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:29.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:29.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:29.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:29.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:29.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:29.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:29.391 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:29.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:29.391 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:24:29.392 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:24:29.392 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:24:29.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:29.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:29.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:29.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:24:29.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:29.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:24:29.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:29.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:24:29.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:24:29.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:29.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:29.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:29.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:24:29.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:29.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:24:29.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:29.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:24:29.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:24:29.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:29.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:29.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:29.394 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:24:29.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:29.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:24:29.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:29.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:24:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:24:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:24:29.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:24:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:24:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:24:29.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:24:29.396 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:24:29.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:24:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:29.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:29.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:29.397 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:24:34.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:34.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:34.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:34.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:34.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:34.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:34.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:34.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:34.403 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:34.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:34.403 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:24:34.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:24:34.404 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:24:34.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:34.404 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:34.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:34.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:24:34.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:34.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:24:34.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:34.405 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:24:34.405 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:24:34.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:34.405 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:34.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:34.405 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:24:34.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:34.405 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:24:34.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:34.406 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:24:34.406 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:24:34.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:34.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:34.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:34.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:24:34.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:34.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:24:34.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:24:34.408 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:24:34.408 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:24:34.408 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:34.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:34.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:34.413 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:24:34.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:24:34.921 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:24:34.922 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:24:34.922 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:24:34.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:24:34.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:24:34.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:24:34.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:24:34.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:24:34.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:24:34.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:24:34.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:24:34.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:24:35.339 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:24:35.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:35.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:35.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:35.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:35.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:24:36.264 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:24:36.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:36.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:36.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:36.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:36.727 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:24:37.190 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:24:37.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:37.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:37.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:37.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:37.652 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:24:38.114 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:24:38.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:38.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:38.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:38.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:38.578 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:24:39.040 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:24:39.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:39.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:39.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:39.503 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:24:39.965 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:24:40.428 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:24:40.890 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:24:41.353 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:24:41.816 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:24:42.448 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:24:42.911 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:24:42.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:24:42.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:24:42.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:42.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:42.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:42.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:42.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:42.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:42.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:42.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:42.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:42.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:42.991 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:24:47.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:47.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:47.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:47.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:47.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:47.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:47.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:47.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:47.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:47.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:47.998 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:24:47.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:24:47.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:24:47.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:47.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:47.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:47.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:24:47.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:47.999 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:24:47.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:47.999 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:24:47.999 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:24:47.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:47.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:48.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:48.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:24:48.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:48.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:24:48.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:48.000 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:24:48.000 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:24:48.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:48.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:48.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:48.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:24:48.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:48.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:24:48.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:48.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:24:48.003 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:24:48.003 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:24:48.003 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:48.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:48.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:48.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:48.004 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:24:53.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:24:53.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:24:53.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:53.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:53.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:53.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:53.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:24:53.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:53.010 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:53.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:24:53.010 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:24:53.011 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:24:53.011 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:24:53.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:53.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:53.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:24:53.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:24:53.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:24:53.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:24:53.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:53.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:24:53.013 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:24:53.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:53.013 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:53.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:24:53.013 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:24:53.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:24:53.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:24:53.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:53.015 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:24:53.015 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:24:53.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:53.015 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:24:53.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:24:53.015 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:24:53.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:24:53.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:24:53.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:53.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:24:53.018 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:24:53.018 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:24:53.018 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:24:53.022 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:24:53.484 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:24:53.532 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:24:53.532 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:24:53.533 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:24:53.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:24:53.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:24:53.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:24:53.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:24:53.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:24:53.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:24:53.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:24:53.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:24:53.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:24:53.947 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:24:54.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:54.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:54.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:54.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:54.410 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:24:54.872 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:24:55.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:55.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:55.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:55.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:55.335 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:24:55.797 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:24:56.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:56.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:56.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:56.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:56.260 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:24:56.723 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:24:57.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:57.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:57.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:57.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:57.186 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:24:57.806 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:24:58.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:24:58.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:24:58.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:24:58.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:24:58.270 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:24:58.735 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:24:59.198 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:24:59.662 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:25:00.124 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:25:00.587 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:25:01.050 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:25:01.514 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:25:01.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:25:01.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:25:01.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:01.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:01.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:01.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:01.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:01.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:01.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:01.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:01.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:01.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:01.577 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:25:01.577 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1852 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:01.577 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1852 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:01.577 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1852 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:01.577 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1852 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:01.577 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1852 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:01.577 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1852 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:01.578 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1852 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:01.578 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1852 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:06.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:06.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:06.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:06.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:06.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:06.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:06.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:06.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:06.582 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:06.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:06.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:25:06.583 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:25:06.583 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:25:06.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:06.583 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:06.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:06.583 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:25:06.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:06.583 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:25:06.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:06.584 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:25:06.584 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:25:06.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:06.584 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:06.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:06.584 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:25:06.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:06.585 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:25:06.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:06.586 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:25:06.586 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:25:06.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:06.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:06.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:06.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:25:06.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:06.586 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:25:06.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:25:06.588 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:25:06.588 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:25:06.588 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:06.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:06.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:06.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:06.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:06.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:06.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:06.590 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:25:11.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:11.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:11.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:11.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:11.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:11.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:11.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:11.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:11.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:11.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:11.598 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:25:11.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:25:11.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:25:11.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:11.599 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:11.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:11.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:25:11.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:11.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:25:11.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:11.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:25:11.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:25:11.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:11.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:11.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:11.601 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:25:11.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:11.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:25:11.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:11.602 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:25:11.602 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:25:11.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:11.602 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:11.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:11.602 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:25:11.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:11.602 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:25:11.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:25:11.604 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:25:11.604 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:25:11.604 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:11.609 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:25:12.074 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:25:12.118 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:25:12.119 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:25:12.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:25:12.120 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:25:12.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:25:12.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:25:12.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:25:12.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:25:12.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:25:12.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:25:12.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:25:12.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:25:12.537 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:25:12.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:12.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:12.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:12.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:12.999 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:25:13.462 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:25:13.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:13.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:13.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:13.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:13.927 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:25:14.390 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:25:14.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:14.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:14.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:14.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:14.852 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:25:15.315 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:25:15.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:15.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:15.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:15.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:15.777 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:25:16.241 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:25:16.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:16.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:16.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:16.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:16.703 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:25:17.166 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:25:17.630 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:25:18.092 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:25:18.555 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:25:19.018 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:25:19.480 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:25:19.943 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:25:20.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:25:20.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:25:20.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:20.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:20.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:20.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:20.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:20.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:20.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:20.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:20.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:20.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:20.165 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:25:20.165 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1886 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:20.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1886 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:20.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1886 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:20.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1886 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:20.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1886 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:20.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1886 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:20.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1886 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:20.166 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1886 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:25:25.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:25.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:25.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:25.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:25.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:25.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:25.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:25.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:25.172 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:25.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:25.172 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:25:25.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:25:25.173 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:25:25.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:25.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:25.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:25:25.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:25.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:25.173 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:25:25.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:25.174 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:25:25.175 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:25:25.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:25.175 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:25.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:25.175 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:25:25.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:25.175 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:25:25.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:25.176 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:25:25.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:25:25.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:25.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:25.176 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:25:25.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:25.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:25.176 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:25:25.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:25.178 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:25:25.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:25:25.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:25:25.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:25:25.178 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:25:25.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:25:25.179 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:25:25.179 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:25.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:25.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:25.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:25.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:25.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:25.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:25.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:25.180 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:25:30.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:30.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:30.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:30.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:30.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:30.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:30.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:30.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:30.187 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:30.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:30.187 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:25:30.188 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:25:30.188 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:25:30.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:30.188 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:30.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:30.188 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:25:30.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:30.188 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:25:30.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:30.189 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:25:30.189 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:25:30.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:30.189 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:30.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:30.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:25:30.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:30.189 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:25:30.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:30.190 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:25:30.190 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:25:30.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:30.191 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:30.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:30.191 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:25:30.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:30.191 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:25:30.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:25:30.193 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:25:30.193 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:25:30.193 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:30.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:30.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:30.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:30.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:30.198 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:25:30.660 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:25:30.710 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:25:30.710 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:25:30.711 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:25:30.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:25:30.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:25:30.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:25:30.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:25:30.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:25:30.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:25:30.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:25:30.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:25:30.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:25:31.122 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:25:31.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:31.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:31.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:31.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:31.647 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:25:32.112 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:25:32.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:32.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:32.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:32.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:32.575 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:25:33.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:33.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:33.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:33.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:34.354 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:25:34.817 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:25:34.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:34.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:34.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:34.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:35.280 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:25:35.742 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:25:35.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:35.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:35.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:35.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:36.206 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:25:36.669 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:25:37.131 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:25:37.594 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:25:38.056 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:25:38.518 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:25:38.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:25:38.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:25:38.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:38.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:38.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:38.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:38.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:38.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:38.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:38.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:38.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:38.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:38.751 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:25:43.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:43.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:43.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:43.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:43.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:43.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:43.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:43.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:43.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:43.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:43.757 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:25:43.758 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:25:43.758 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:25:43.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:43.758 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:43.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:43.758 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:25:43.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:43.758 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:25:43.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:43.760 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:25:43.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:25:43.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:43.760 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:43.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:43.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:25:43.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:43.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:25:43.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:43.762 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:25:43.762 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:25:43.762 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:43.762 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:43.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:43.762 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:25:43.762 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:43.762 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:25:43.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:43.764 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:25:43.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:25:43.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:25:43.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:25:43.764 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:25:43.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:25:43.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:25:43.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:25:43.765 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:25:43.765 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:43.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:43.766 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:43.766 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:43.766 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:25:48.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:25:48.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:25:48.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:48.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:48.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:48.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:48.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:25:48.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:48.775 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:48.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:25:48.775 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:25:48.775 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:25:48.776 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:25:48.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:48.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:48.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:25:48.776 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:25:48.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:25:48.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:25:48.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:48.776 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:25:48.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:25:48.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:48.777 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:48.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:25:48.777 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:25:48.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:25:48.777 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:25:48.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:48.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:25:48.778 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:25:48.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:48.778 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:25:48.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:25:48.778 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:25:48.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:25:48.778 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:25:48.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:48.779 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:25:48.779 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:25:48.780 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:25:48.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:25:48.784 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:25:49.248 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:25:49.294 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:25:49.295 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:25:49.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:25:49.296 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:25:49.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:25:49.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:25:49.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:25:49.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:25:49.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:25:49.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:25:49.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:25:49.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:25:49.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:25:49.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:49.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:49.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:49.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:50.175 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:25:50.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:25:50.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:50.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:50.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:50.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:51.102 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:25:51.566 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:25:51.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:51.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:51.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:51.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:52.030 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:25:52.493 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:25:52.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:52.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:52.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:52.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:52.958 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:25:53.422 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:25:53.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:25:53.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:25:53.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:25:53.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:25:53.885 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:25:54.347 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:25:54.810 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:25:55.273 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:25:55.735 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:25:56.198 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:25:56.661 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:25:57.124 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:25:57.586 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:25:58.050 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:25:58.514 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:25:58.979 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:25:59.441 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:25:59.904 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:26:00.367 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:26:00.830 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:26:01.293 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:26:01.756 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:26:02.219 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:26:02.682 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:26:03.145 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:26:03.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:26:03.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:26:03.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:03.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:03.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:03.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:03.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:03.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:03.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:03.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:03.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:03.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:03.340 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:26:03.340 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3207 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:26:03.340 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3207 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:26:03.340 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3207 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:26:03.340 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3207 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:26:03.340 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3207 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:26:03.340 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3207 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:26:03.340 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3207 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:26:08.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:08.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:08.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:08.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:08.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:08.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:08.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:08.346 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:08.346 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:08.346 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:08.346 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:26:08.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:26:08.347 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:26:08.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:08.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:08.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:08.347 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:26:08.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:08.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:26:08.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:08.348 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:26:08.348 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:26:08.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:08.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:08.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:08.348 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:26:08.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:08.348 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:26:08.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:08.349 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:26:08.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:26:08.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:08.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:08.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:08.349 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:26:08.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:08.349 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:26:08.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:26:08.351 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:26:08.351 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:26:08.351 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:08.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:08.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:08.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:08.352 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:26:13.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:13.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:13.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:13.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:13.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:13.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:13.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:13.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:13.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:13.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:13.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:26:13.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:26:13.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:26:13.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:13.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:13.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:13.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:26:13.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:13.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:26:13.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:13.359 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:26:13.359 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:26:13.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:13.359 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:13.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:13.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:26:13.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:13.360 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:26:13.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:13.360 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:26:13.360 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:26:13.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:13.360 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:13.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:13.361 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:26:13.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:13.361 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:26:13.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:13.362 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:26:13.362 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:26:13.362 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:13.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:13.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:13.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:13.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:13.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:13.367 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:26:13.831 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:26:13.879 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:26:13.880 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:26:13.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:26:13.881 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:26:13.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:26:13.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:26:13.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:26:13.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:26:13.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:26:13.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:26:13.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:26:13.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:26:14.294 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:26:14.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:14.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:14.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:14.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:14.757 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:26:15.220 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:26:15.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:15.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:15.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:15.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:15.683 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:26:16.147 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:26:16.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:16.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:16.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:16.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:16.611 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:26:17.074 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:26:17.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:17.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:17.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:17.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:17.537 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:26:18.000 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:26:18.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:18.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:18.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:18.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:18.466 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:26:18.930 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:26:19.394 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:26:19.859 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:26:20.322 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:26:20.787 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:26:21.251 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:26:21.716 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:26:21.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:26:21.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:26:21.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:21.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:21.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:21.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:21.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:21.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:21.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:21.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:21.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:21.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:21.923 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:26:26.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:26.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:26.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:26.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:26.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:26.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:28.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:28.178 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:28.178 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:28.178 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:28.178 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:26:28.180 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:26:28.180 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:26:28.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:28.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:28.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:28.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:26:28.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:28.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:26:28.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:28.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:26:28.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:26:28.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:28.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:28.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:28.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:26:28.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:28.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:26:28.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:28.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:26:28.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:26:28.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:28.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:28.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:28.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:26:28.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:28.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:26:28.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:28.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:26:28.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:26:28.187 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:26:28.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:28.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:28.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:28.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:28.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:28.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:28.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:28.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:28.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:28.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:28.188 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:26:33.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:33.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:33.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:33.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:33.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:33.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:33.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:33.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:33.195 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:33.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:33.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:26:33.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:26:33.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:26:33.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:33.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:33.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:33.196 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:26:33.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:33.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:26:33.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:33.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:26:33.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:26:33.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:33.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:33.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:33.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:26:33.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:33.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:26:33.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:33.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:26:33.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:26:33.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:33.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:33.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:33.198 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:26:33.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:33.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:26:33.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:26:33.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:26:33.200 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:26:33.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:33.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:26:33.668 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:26:33.712 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:26:33.713 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:26:33.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:26:33.713 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:26:33.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:26:33.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:26:33.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:26:33.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:26:33.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:26:33.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:26:33.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:26:33.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:26:34.131 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:26:34.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:34.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:34.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:34.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:34.594 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:26:35.057 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:26:35.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:35.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:35.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:35.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:35.520 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:26:35.982 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:26:36.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:36.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:36.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:36.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:36.446 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:26:36.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:26:37.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:37.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:37.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:37.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:37.371 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:26:37.834 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:26:38.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:38.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:38.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:38.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:38.298 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:26:38.763 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:26:39.226 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:26:39.688 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:26:40.151 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:26:40.615 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:26:41.078 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:26:41.541 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:26:42.003 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:26:42.466 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:26:42.930 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:26:43.393 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:26:43.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:26:43.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:26:43.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:43.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:43.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:43.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:43.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:43.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:43.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:43.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:43.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:43.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:43.761 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:26:48.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:48.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:48.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:48.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:48.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:48.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:48.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:48.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:48.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:48.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:48.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:26:48.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:26:48.786 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:26:48.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:48.786 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:48.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:48.786 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:26:48.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:48.786 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:26:48.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:48.787 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:26:48.787 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:26:48.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:48.788 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:48.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:48.788 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:26:48.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:48.788 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:26:48.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:48.789 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:26:48.789 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:26:48.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:48.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:48.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:48.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:26:48.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:48.790 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:26:48.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:48.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:26:48.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:26:48.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:26:48.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:26:48.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:26:48.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:26:48.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:26:48.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:26:48.792 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:48.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:48.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:48.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:48.793 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:26:53.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:26:53.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:26:53.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:53.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:53.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:53.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:53.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:26:53.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:53.799 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:53.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:26:53.799 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:26:53.800 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:26:53.800 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:26:53.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:53.800 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:53.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:26:53.800 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:26:53.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:26:53.800 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:26:53.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:53.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:26:53.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:26:53.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:53.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:53.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:26:53.801 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:26:53.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:26:53.801 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:26:53.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:53.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:26:53.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:26:53.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:53.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:26:53.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:26:53.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:26:53.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:26:53.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:26:53.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:26:53.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:26:53.804 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:26:53.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:26:53.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:53.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:26:53.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:26:53.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:53.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:53.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:53.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:26:53.809 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:26:54.278 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:26:54.316 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:26:54.316 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:26:54.316 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:26:54.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:26:54.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:26:54.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:26:54.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:26:54.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:26:54.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:26:54.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:26:54.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:26:54.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:26:54.744 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:26:54.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:54.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:54.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:54.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:55.210 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:26:55.675 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:26:55.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:55.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:55.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:55.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:56.144 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:26:56.611 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:26:56.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:56.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:56.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:56.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:57.081 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:26:57.552 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:26:57.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:57.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:57.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:57.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:58.023 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:26:58.496 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:26:58.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:26:58.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:26:58.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:26:58.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:26:59.093 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:26:59.565 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:27:00.038 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:27:00.506 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:27:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:27:01.448 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:27:01.921 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:27:02.394 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:27:03.295 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:27:03.767 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:27:04.238 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:27:04.707 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:27:05.174 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:27:05.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:27:05.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:27:05.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:05.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:05.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:05.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:05.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:05.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:05.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:05.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:05.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:27:05.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:27:05.330 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:27:10.332 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:27:10.332 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:27:10.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:10.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:10.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:10.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:10.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:10.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:27:10.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:10.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:27:10.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:27:10.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:27:10.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:27:10.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:27:10.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:10.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:10.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:27:10.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:27:10.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:27:10.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:10.362 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:27:10.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:27:10.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:27:10.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:10.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:10.363 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:27:10.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:27:10.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:27:10.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:10.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:27:10.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:27:10.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:27:10.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:10.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:10.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:27:10.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:27:10.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:27:10.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:10.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:27:10.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:27:10.368 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:27:10.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:10.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:10.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:27:10.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:27:10.369 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:27:15.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:27:15.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:27:15.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:15.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:15.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:15.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:15.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:15.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:27:15.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:15.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:27:15.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:27:15.392 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:27:15.393 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:27:15.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:27:15.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:15.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:15.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:27:15.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:27:15.394 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:27:15.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:15.396 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:27:15.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:27:15.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:27:15.396 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:15.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:15.396 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:27:15.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:27:15.396 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:27:15.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:15.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:27:15.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:27:15.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:27:15.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:15.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:15.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:27:15.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:27:15.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:27:15.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:15.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:27:15.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:27:15.402 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:27:15.403 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:15.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:15.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:15.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:15.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:15.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:15.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:15.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:15.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:27:15.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:27:15.928 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:27:15.929 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:27:15.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:27:15.930 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:27:15.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:27:15.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:27:15.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:27:15.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:27:15.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:27:15.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:27:15.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:27:15.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:27:16.341 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:27:16.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:16.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:16.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:16.808 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:27:17.272 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:27:17.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:17.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:17.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:17.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:17.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:27:18.207 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:27:18.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:18.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:18.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:18.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:18.671 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:27:19.138 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:27:19.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:19.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:19.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:19.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:19.602 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:27:20.066 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:27:20.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:20.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:20.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:20.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:20.530 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:27:20.994 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:27:21.461 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:27:21.927 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:27:22.393 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:27:22.864 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:27:23.332 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:27:23.797 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:27:24.263 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:27:24.728 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:27:25.199 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:27:25.665 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:27:26.130 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:27:26.598 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:27:27.063 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:27:27.527 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:27:27.996 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:27:28.462 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:27:28.930 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:27:29.397 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:27:29.861 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:27:30.326 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:27:30.790 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:27:31.255 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:27:31.721 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:27:32.185 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:27:32.653 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:27:33.118 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:27:33.583 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:27:34.047 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:27:34.579 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:27:35.043 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:27:35.507 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:27:35.970 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:27:35.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:27:35.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:27:35.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:35.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:35.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:35.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:35.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:35.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:35.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:35.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:35.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:27:35.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:27:35.987 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:35.987 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:40.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:27:40.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:27:40.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:40.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:40.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:40.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:41.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:41.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:27:41.012 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:41.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:27:41.013 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:27:41.015 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:27:41.015 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:27:41.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:27:41.015 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:41.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:41.015 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:27:41.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:27:41.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:27:41.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:41.017 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:27:41.017 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:27:41.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:27:41.017 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:41.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:41.017 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:27:41.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:27:41.017 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:27:41.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:41.018 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:27:41.018 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:27:41.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:27:41.019 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:41.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:41.019 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:27:41.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:27:41.019 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:27:41.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:27:41.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:27:41.021 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:41.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:41.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:27:41.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:27:41.023 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:27:46.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:27:46.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:27:46.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:46.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:46.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:46.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:46.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:46.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:27:46.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:46.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:27:46.044 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:27:46.046 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:27:46.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:27:46.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:27:46.047 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:46.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:46.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:27:46.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:27:46.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:27:46.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:46.049 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:27:46.049 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:27:46.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:27:46.049 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:46.050 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:27:46.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:46.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:27:46.050 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:27:46.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:46.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:27:46.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:27:46.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:27:46.057 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:27:46.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:46.057 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:27:46.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:27:46.057 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:27:46.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:46.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:27:46.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:27:46.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:27:46.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:27:46.060 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:27:46.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:27:46.061 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:27:46.061 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:27:46.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:27:46.066 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:27:46.536 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:27:46.576 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:27:46.576 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:27:46.577 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:27:46.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:27:47.001 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:27:47.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:47.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:47.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:47.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:47.465 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:27:47.928 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:27:48.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:48.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:48.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:48.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:48.392 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:27:48.855 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:27:49.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:49.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:49.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:49.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:49.319 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:27:49.782 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:27:50.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:50.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:50.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:50.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:50.244 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:27:50.712 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:27:51.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:51.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:51.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:51.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:51.176 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:27:51.642 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:27:52.104 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:27:52.566 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:27:53.029 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:27:53.493 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:27:53.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:27:54.420 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:27:54.883 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:27:55.346 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:27:55.812 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:27:56.276 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:27:56.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:27:56.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:27:56.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:27:56.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:27:56.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:27:56.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:27:56.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:27:56.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:27:56.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:27:56.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:27:56.580 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:27:56.580 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:56.580 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:56.580 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:56.580 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:56.580 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:56.580 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:56.580 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:27:56.580 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:28:01.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:01.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:01.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:01.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:01.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:01.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:01.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:01.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:01.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:01.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:01.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:28:01.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:28:01.586 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:28:01.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:01.586 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:01.586 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:28:01.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:01.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:01.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:28:01.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:01.587 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:28:01.587 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:28:01.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:01.588 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:01.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:01.588 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:28:01.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:01.588 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:28:01.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:01.588 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:28:01.588 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:28:01.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:01.589 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:01.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:01.589 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:28:01.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:01.589 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:28:01.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:01.590 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:28:01.590 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:28:01.590 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:28:01.591 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:01.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:01.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:01.592 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:28:06.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:06.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:06.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:06.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:06.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:06.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:06.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:06.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:06.602 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:06.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:06.602 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:28:06.603 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:28:06.603 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:28:06.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:06.603 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:06.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:06.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:28:06.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:06.603 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:28:06.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:06.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:28:06.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:28:06.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:06.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:06.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:06.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:28:06.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:06.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:28:06.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:06.605 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:28:06.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:28:06.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:06.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:06.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:06.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:28:06.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:06.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:28:06.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:06.606 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:28:06.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:28:06.607 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:28:06.607 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:28:06.607 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:06.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:06.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:06.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:06.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:06.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:06.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:06.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:06.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:06.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:06.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:06.612 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:28:07.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:28:07.118 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:28:07.119 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:28:07.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:28:07.119 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:28:07.540 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:28:07.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:07.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:07.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:07.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:08.004 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:28:08.469 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:28:08.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:08.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:08.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:08.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:08.932 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:28:09.397 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:28:09.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:09.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:09.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:09.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:09.863 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:28:10.327 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:28:10.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:10.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:10.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:10.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:10.790 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:28:11.253 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:28:11.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:11.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:11.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:11.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:11.717 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:28:12.180 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:28:13.118 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:28:13.585 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:28:14.049 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:28:14.513 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:28:14.977 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:28:15.444 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:28:15.909 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:28:16.378 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:28:16.844 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:28:17.308 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:28:17.772 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:28:18.236 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:28:18.699 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:28:19.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:19.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:19.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:19.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:19.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:19.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:19.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:19.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:19.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:19.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:19.124 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:28:19.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:28:19.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:28:19.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:28:19.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:28:19.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:28:19.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:28:19.124 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:28:24.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:24.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:24.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:24.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:24.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:24.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:24.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:24.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:24.151 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:24.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:24.151 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:28:24.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:28:24.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:28:24.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:24.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:24.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:24.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:28:24.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:24.155 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:28:24.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:24.157 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:28:24.157 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:28:24.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:24.157 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:24.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:24.157 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:28:24.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:24.157 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:28:24.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:24.159 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:28:24.159 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:28:24.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:24.159 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:24.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:24.159 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:28:24.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:24.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:28:24.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:28:24.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:28:24.161 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:28:24.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:24.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:24.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:24.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:24.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:24.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:24.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:24.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:24.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:24.163 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:28:29.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:29.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:29.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:29.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:29.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:29.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:29.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:29.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:29.180 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:29.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:29.180 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:28:29.181 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:28:29.181 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:28:29.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:29.182 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:29.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:29.182 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:28:29.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:29.182 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:28:29.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:29.184 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:28:29.184 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:28:29.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:29.184 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:29.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:29.184 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:28:29.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:29.184 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:28:29.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:29.186 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:28:29.186 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:28:29.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:29.186 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:29.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:29.187 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:28:29.187 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:29.187 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:28:29.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:29.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:28:29.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:28:29.191 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:28:29.191 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:29.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:29.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:29.196 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:28:29.667 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:28:29.724 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:28:29.726 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:28:29.728 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:28:29.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:28:29.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:28:29.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:28:29.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:28:29.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:28:29.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:28:29.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:28:29.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:28:29.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:28:29.757 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:28:29.757 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 03:28:29.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:28:29.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:28:30.132 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:28:30.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:30.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:30.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:30.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:30.596 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:28:31.062 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:28:31.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:31.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:31.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:31.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:31.526 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:28:31.991 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:28:32.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:32.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:32.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:32.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:28:32.918 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:28:33.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:33.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:33.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:33.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:33.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:28:33.850 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:28:34.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:34.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:34.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:34.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:34.314 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:28:34.778 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:28:35.242 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:28:35.706 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:28:36.169 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:28:36.632 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:28:37.097 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:28:37.561 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:28:37.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:28:37.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:28:37.759 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:28:37.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:37.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:37.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:37.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:37.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:37.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:37.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:37.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:37.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:37.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:37.760 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:28:42.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:42.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:42.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:42.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:42.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:42.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:42.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:42.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:42.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:42.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:42.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:28:42.785 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:28:42.785 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:28:42.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:42.786 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:42.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:42.786 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:28:42.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:42.786 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:28:42.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:42.787 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:28:42.787 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:28:42.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:42.787 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:42.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:42.787 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:28:42.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:42.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:28:42.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:42.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:28:42.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:28:42.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:42.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:42.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:42.788 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:28:42.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:42.788 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:28:42.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:42.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:28:42.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:28:42.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:28:42.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:28:42.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:28:42.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:28:42.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:28:42.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:28:42.790 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:42.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:42.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:42.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:42.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:42.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:42.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:42.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:42.791 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:28:42.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:42.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:42.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:47.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:47.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:47.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:47.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:47.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:47.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:47.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:47.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:47.805 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:47.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:28:47.806 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:28:47.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:28:47.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:28:47.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:47.808 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:47.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:47.808 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:28:47.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:28:47.808 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:28:47.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:47.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:28:47.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:28:47.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:47.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:47.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:47.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:28:47.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:28:47.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:28:47.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:47.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:28:47.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:28:47.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:47.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:28:47.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:47.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:28:47.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:28:47.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:28:47.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:47.813 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:28:47.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:28:47.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:28:47.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:28:47.813 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:28:47.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:28:47.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:28:47.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:28:47.814 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:28:47.814 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:28:47.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:47.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:47.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:28:47.818 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:28:48.289 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:28:48.330 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:28:48.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:28:48.332 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:28:48.333 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:28:48.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:28:48.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:28:48.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:28:48.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:28:48.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:28:48.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:28:48.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:28:48.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:28:48.378 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:28:48.378 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 03:28:48.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:28:48.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:28:48.754 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:28:48.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:48.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:48.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:48.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:49.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:28:49.681 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:28:49.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:49.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:49.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:49.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:50.145 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:28:50.613 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:28:50.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:50.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:50.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:50.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:51.076 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:28:51.542 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:28:51.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:51.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:51.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:51.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:52.006 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:28:52.469 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:28:52.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:52.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:52.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:52.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:52.933 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:28:53.400 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:28:53.865 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:28:54.330 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:28:54.795 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:28:55.258 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:28:55.722 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:28:56.184 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:28:56.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:28:56.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:28:56.380 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:28:56.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:28:56.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:28:56.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:28:56.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:28:56.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:28:56.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:28:56.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:28:56.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:28:56.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:28:56.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:28:56.382 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:29:01.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:01.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:01.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:01.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:01.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:01.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:01.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:01.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:01.390 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:01.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:01.390 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:29:01.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:29:01.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:29:01.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:01.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:01.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:01.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:29:01.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:01.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:29:01.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:01.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:29:01.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:29:01.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:01.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:01.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:01.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:29:01.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:01.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:29:01.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:01.392 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:29:01.392 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:29:01.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:01.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:01.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:01.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:29:01.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:01.393 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:29:01.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:01.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:29:01.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:29:01.394 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:29:01.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:01.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:01.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:01.396 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:29:06.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:06.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:06.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:06.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:06.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:06.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:06.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:06.402 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:06.402 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:06.402 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:06.402 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:29:06.402 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:29:06.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:29:06.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:06.402 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:06.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:06.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:29:06.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:06.403 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:29:06.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:06.403 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:29:06.403 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:29:06.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:06.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:06.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:06.403 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:29:06.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:06.404 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:29:06.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:06.404 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:29:06.404 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:29:06.404 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:06.404 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:06.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:06.404 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:29:06.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:06.405 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:29:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:29:06.406 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:29:06.406 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:29:06.406 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:06.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:06.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:06.411 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:29:06.874 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:29:06.918 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:29:06.919 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:29:06.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:29:06.919 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:29:06.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:29:06.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:29:06.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:29:06.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:29:06.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:29:06.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:29:06.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:29:06.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:29:06.962 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:29:06.962 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 03:29:06.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:29:06.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:29:07.336 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:29:07.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:07.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:07.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:07.798 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:29:08.261 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:29:08.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:08.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:08.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:08.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:08.723 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:29:09.186 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:29:09.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:09.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:09.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:09.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:09.649 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:29:10.111 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:29:10.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:10.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:10.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:10.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:10.574 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:29:11.036 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:29:11.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:11.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:11.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:11.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:11.498 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:29:11.960 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:29:12.424 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:29:12.887 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:29:13.351 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:29:13.813 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:29:14.275 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:29:14.738 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:29:14.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:29:14.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:29:14.966 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:29:14.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:14.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:14.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:14.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:14.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:14.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:14.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:14.968 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:29:19.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:19.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:19.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:19.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:19.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:19.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:19.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:19.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:19.975 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:19.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:19.975 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:29:19.976 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:29:19.976 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:29:19.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:19.976 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:19.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:19.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:29:19.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:19.976 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:29:19.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:19.977 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:29:19.977 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:29:19.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:19.977 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:19.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:19.977 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:29:19.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:19.978 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:29:19.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:19.979 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:29:19.979 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:29:19.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:19.979 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:19.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:19.979 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:29:19.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:19.979 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:29:19.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:29:19.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:29:19.981 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:29:19.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:19.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:19.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:19.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:19.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:19.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:19.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:19.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:19.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:19.983 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:29:24.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:24.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:24.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:24.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:24.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:24.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:24.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:24.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:24.989 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:24.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:24.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:29:24.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:29:24.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:29:24.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:24.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:24.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:24.990 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:29:24.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:24.990 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:29:24.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:24.991 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:29:24.991 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:29:24.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:24.991 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:24.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:24.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:29:24.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:24.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:29:24.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:24.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:29:24.992 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:29:24.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:24.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:24.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:24.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:29:24.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:24.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:29:24.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:24.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:29:24.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:29:24.994 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:29:24.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:24.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:24.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:29:25.462 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:29:25.508 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:29:25.508 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:29:25.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:29:25.509 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:29:25.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:29:25.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:29:25.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:29:25.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:29:25.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:29:25.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:29:25.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:29:25.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:29:25.550 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:29:25.550 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 03:29:25.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:29:25.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:29:25.924 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:29:25.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:25.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:25.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:25.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:26.386 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:29:26.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:29:26.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:26.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:26.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:26.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:27.311 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:29:27.773 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:29:27.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:27.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:27.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:27.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:28.236 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:29:28.699 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:29:28.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:28.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:28.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:29.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:29.161 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:29:29.624 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:29:29.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:29.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:29.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:30.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:30.086 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:29:30.548 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:29:31.011 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:29:31.474 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:29:31.936 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:29:32.399 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:29:32.862 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:29:33.324 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:29:33.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:29:33.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:29:33.552 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:29:33.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:33.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:33.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:33.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:33.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:33.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:33.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:33.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:33.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:33.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:33.553 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:29:33.554 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1888 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:29:33.554 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1888 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:29:33.554 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1888 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:29:33.554 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1888 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:29:33.554 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1888 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:29:33.554 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1888 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:29:33.554 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1888 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:29:33.554 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1888 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:29:38.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:38.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:38.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:38.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:38.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:38.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:38.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:38.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:38.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:38.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:38.558 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:29:38.559 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:29:38.559 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:29:38.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:38.559 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:38.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:38.559 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:29:38.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:38.559 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:29:38.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:38.560 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:29:38.560 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:29:38.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:38.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:38.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:38.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:29:38.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:38.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:29:38.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:38.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:29:38.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:29:38.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:38.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:38.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:38.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:29:38.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:38.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:29:38.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:38.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:29:38.563 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:29:38.563 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:29:38.563 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:38.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:38.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:38.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:38.564 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:29:43.565 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:43.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:43.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:43.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:43.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:43.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:43.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:43.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:43.570 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:43.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:29:43.570 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:29:43.571 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:29:43.571 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:29:43.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:43.571 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:43.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:43.571 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:29:43.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:29:43.571 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:29:43.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:43.572 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:29:43.572 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:29:43.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:43.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:43.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:43.572 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:29:43.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:29:43.572 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:29:43.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:43.573 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:29:43.573 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:29:43.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:43.573 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:29:43.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:43.573 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:29:43.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:29:43.573 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:29:43.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:29:43.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:29:43.575 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:29:43.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:29:43.580 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:29:44.042 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:29:44.088 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:29:44.089 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:29:44.089 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:29:44.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:29:44.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:29:44.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:29:44.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:29:44.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:29:44.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:29:44.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:29:44.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:29:44.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:29:44.130 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:29:44.130 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 03:29:44.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:29:44.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:29:44.504 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:29:44.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:44.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:44.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:44.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:44.967 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:29:45.430 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:29:45.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:45.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:45.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:45.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:45.893 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:29:46.355 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:29:46.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:46.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:46.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:46.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:46.818 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:29:47.283 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:29:47.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:47.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:47.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:47.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:47.746 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:29:48.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:29:48.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:48.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:48.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:48.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:48.671 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:29:49.135 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:29:49.597 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:29:50.060 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:29:50.524 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:29:50.987 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:29:51.450 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:29:51.914 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:29:52.376 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:29:52.838 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:29:53.301 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:29:53.764 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:29:54.226 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:29:54.688 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:29:55.151 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:29:55.613 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:29:56.076 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:29:56.539 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:29:57.001 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:29:57.465 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:29:57.927 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:29:58.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:29:58.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:29:58.133 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:29:58.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:29:58.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:29:58.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:29:58.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:29:58.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:29:58.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:29:58.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:29:58.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:29:58.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:29:58.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:29:58.136 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:29:58.136 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:29:58.136 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:30:03.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:03.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:03.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:03.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:03.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:03.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:03.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:03.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:03.142 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:03.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:03.142 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:30:03.144 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:30:03.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:30:03.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:03.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:03.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:03.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:30:03.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:03.144 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:30:03.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:03.146 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:30:03.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:30:03.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:03.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:03.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:03.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:30:03.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:03.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:30:03.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:03.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:30:03.148 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:30:03.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:03.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:03.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:03.148 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:30:03.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:03.148 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:30:03.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:03.151 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:30:03.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:30:03.152 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:30:03.152 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:03.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:03.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:03.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:03.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:03.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:03.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:03.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:03.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:03.154 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:30:08.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:08.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:08.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:08.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:08.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:08.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:08.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:08.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:08.164 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:08.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:08.164 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:30:08.165 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:30:08.165 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:30:08.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:08.165 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:08.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:08.165 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:30:08.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:08.165 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:30:08.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:08.167 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:30:08.167 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:30:08.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:08.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:08.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:08.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:30:08.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:08.167 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:30:08.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:08.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:30:08.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:30:08.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:08.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:08.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:08.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:30:08.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:08.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:30:08.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:30:08.173 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:30:08.173 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:30:08.173 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:08.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:30:08.643 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:30:08.695 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:30:08.696 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:30:08.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:30:08.697 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:30:08.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:30:08.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:30:08.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:30:08.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:30:08.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:30:08.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:30:08.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:30:08.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:30:08.732 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:30:08.732 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 03:30:08.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:30:08.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:30:09.108 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:30:09.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:09.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:09.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:09.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:09.573 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:30:10.038 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:30:10.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:10.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:10.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:10.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:10.503 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:30:10.967 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:30:11.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:11.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:11.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:11.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:11.430 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:30:11.893 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:30:12.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:12.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:12.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:12.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:12.358 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:30:12.822 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:30:13.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:13.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:13.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:13.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:13.286 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:30:13.751 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:30:14.215 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:30:14.678 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:30:15.141 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:30:15.604 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:30:16.066 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:30:16.529 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:30:16.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:30:16.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:30:16.733 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:30:16.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:16.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:16.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:16.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:16.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:16.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:16.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:16.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:16.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:16.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:16.735 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:30:16.735 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1883 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:30:16.735 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1883 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:30:16.735 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1883 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:30:16.735 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1883 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:30:16.735 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1883 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:30:16.735 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1883 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:30:16.735 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1883 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:30:16.735 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1883 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:30:21.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:21.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:21.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:21.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:21.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:21.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:21.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:21.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:21.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:21.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:21.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:30:21.741 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:30:21.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:30:21.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:21.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:21.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:21.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:30:21.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:21.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:30:21.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:21.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:30:21.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:30:21.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:21.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:21.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:21.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:30:21.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:21.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:30:21.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:21.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:30:21.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:30:21.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:21.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:21.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:21.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:30:21.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:21.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:30:21.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:21.745 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:30:21.745 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:30:21.745 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:30:21.746 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:21.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:21.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:21.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:21.747 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:30:26.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:26.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:26.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:26.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:26.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:26.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:26.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:26.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:26.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:26.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:26.753 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:30:26.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:30:26.753 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:30:26.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:26.753 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:26.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:26.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:30:26.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:26.754 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:30:26.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:26.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:30:26.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:30:26.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:26.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:26.755 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:26.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:26.755 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:30:26.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:30:26.757 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:30:26.757 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:30:26.757 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:26.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:26.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:26.762 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:30:27.224 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:30:27.274 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:30:27.274 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:30:27.275 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:30:27.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:30:27.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:30:27.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:30:27.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:30:27.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:30:27.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:30:27.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:30:27.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:30:27.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:30:27.313 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:30:27.313 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 03:30:27.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:30:27.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:30:27.688 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:30:27.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:27.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:27.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:27.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:28.151 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:30:28.613 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:30:28.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:28.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:28.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:28.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:29.076 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:30:29.538 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:30:29.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:29.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:29.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:29.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:30.001 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:30:30.465 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:30:30.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:30.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:30.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:30.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:30.929 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:30:31.393 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:30:31.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:31.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:31.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:31.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:31.857 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:30:32.321 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:30:32.787 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:30:33.251 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:30:33.716 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:30:34.180 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:30:34.645 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:30:35.109 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:30:35.573 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:30:36.041 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:30:36.504 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:30:36.969 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:30:37.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:30:37.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:30:37.315 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:30:37.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:37.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:37.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:37.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:37.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:37.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:37.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:37.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:37.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:37.317 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:37.317 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:30:42.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:43.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:43.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:43.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:43.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:48.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:48.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:48.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:48.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:48.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:30:48.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:30:48.336 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:30:48.337 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:30:48.337 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:30:48.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:48.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:30:48.337 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:30:48.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:30:48.337 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:30:48.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:48.337 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:48.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:48.337 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:48.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:48.338 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:48.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:48.338 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:30:48.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:30:48.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:30:48.338 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:30:48.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:30:48.338 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:30:48.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:30:48.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:30:48.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:30:48.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:30:48.339 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:30:48.339 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:30:48.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:30:48.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:30:48.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:30:48.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:30:48.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:30:48.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:30:48.339 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:30:48.339 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:30:48.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:48.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:30:48.340 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:30:48.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:48.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:48.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:30:48.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:48.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:30:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:48.341 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:30:48.341 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:30:48.341 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:30:48.341 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:30:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:30:48.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:30:48.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:30:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:48.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:30:48.817 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:30:49.282 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:30:49.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:49.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:49.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:49.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:49.746 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:30:50.209 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:30:50.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:50.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:50.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:50.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:50.674 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:30:51.136 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:30:51.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:51.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:51.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:51.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:51.601 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:30:51.714 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:30:51.716 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:30:51.718 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:30:51.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:30:51.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:30:51.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:30:51.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:30:51.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:30:51.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:30:51.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:30:51.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:30:51.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:30:51.732 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:30:51.732 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-22 03:30:51.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:30:51.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:30:52.068 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:30:52.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:52.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:52.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:52.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:52.535 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:30:53.000 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:30:53.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:30:53.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:30:53.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:30:53.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:30:53.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:30:53.929 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:30:54.392 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:30:54.855 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:30:55.318 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:30:55.781 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:30:56.244 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:30:56.707 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:30:57.169 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:30:57.631 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:30:58.094 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:30:58.557 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:30:59.020 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:30:59.483 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:30:59.945 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:31:00.408 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:31:00.871 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:31:01.334 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:31:01.797 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:31:02.260 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:31:02.722 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:31:02.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:31:02.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:31:02.733 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:31:02.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:02.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:02.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:02.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:02.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:02.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:02.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:02.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:02.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:02.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:02.735 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:31:07.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:07.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:07.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:07.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:07.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:07.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:07.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:07.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:07.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:07.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:07.744 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:31:07.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:31:07.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:31:07.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:07.745 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:07.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:07.746 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:31:07.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:07.746 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:31:07.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:07.747 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:31:07.747 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:31:07.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:07.747 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:07.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:07.747 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:31:07.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:07.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:31:07.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:07.749 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:31:07.749 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:31:07.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:07.749 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:07.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:07.749 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:31:07.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:07.749 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:31:07.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:07.751 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:31:07.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:31:07.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:31:07.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:31:07.751 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:31:07.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:31:07.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:31:07.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:31:07.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:31:07.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:31:07.752 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:31:07.752 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:07.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:07.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:07.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:07.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:07.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:07.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:07.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:07.753 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:31:12.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:12.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:12.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:12.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:12.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:12.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:12.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:12.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:12.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:12.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:12.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:31:12.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:31:12.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:31:12.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:12.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:12.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:12.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:31:12.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:12.761 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:31:12.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:12.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:31:12.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:31:12.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:12.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:12.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:12.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:31:12.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:12.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:31:12.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:12.763 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:31:12.763 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:31:12.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:12.763 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:12.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:12.763 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:31:12.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:12.763 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:31:12.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:31:12.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:31:12.765 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:31:12.765 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:12.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:12.770 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:31:13.233 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:31:13.282 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:31:13.283 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:31:13.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:31:13.284 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:31:13.696 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:31:13.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:13.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:13.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:13.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:14.158 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:31:14.621 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:31:14.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:14.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:14.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:14.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:15.083 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:31:15.546 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:31:15.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:15.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:15.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:15.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:16.009 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:31:16.472 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:31:16.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:16.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:16.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:16.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:16.935 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:31:17.398 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:31:17.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:17.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:17.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:17.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:17.861 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:31:18.324 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:31:18.787 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:31:19.250 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:31:19.713 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:31:20.175 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:31:20.638 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:31:21.102 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:31:21.566 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:31:22.029 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:31:22.492 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:31:22.955 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:31:23.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:23.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:23.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:23.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:23.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:23.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:23.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:23.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:23.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:23.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:23.288 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:31:28.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:28.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:28.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:28.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:28.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:28.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:28.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:28.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:28.299 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:28.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:28.299 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:31:28.301 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:31:28.301 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:31:28.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:28.301 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:28.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:28.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:31:28.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:28.301 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:31:28.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:28.303 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:31:28.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:31:28.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:28.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:28.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:28.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:31:28.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:28.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:31:28.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:28.305 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:31:28.305 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:31:28.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:28.305 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:28.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:28.305 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:31:28.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:28.305 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:31:28.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:31:28.308 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:31:28.308 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:31:28.308 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:28.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:28.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:28.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:28.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:28.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:28.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:28.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:28.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:28.310 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:31:33.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:33.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:33.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:33.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:33.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:33.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:33.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:33.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:33.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:33.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:33.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:31:33.317 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:31:33.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:31:33.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:33.317 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:33.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:33.317 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:31:33.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:33.317 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:31:33.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:33.318 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:31:33.318 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:31:33.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:33.318 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:33.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:33.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:31:33.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:33.318 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:31:33.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:33.319 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:31:33.319 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:31:33.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:33.319 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:33.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:33.319 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:31:33.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:33.319 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:31:33.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:31:33.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:31:33.321 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:31:33.321 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:31:33.321 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:33.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:33.325 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:31:33.789 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:31:33.833 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:31:33.833 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:31:33.833 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:31:33.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:31:34.252 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:31:34.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:34.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:34.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:34.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:34.715 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:31:35.179 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:31:35.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:35.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:35.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:35.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:35.642 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:31:36.105 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:31:36.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:36.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:36.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:36.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:36.568 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:31:37.032 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:31:37.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:37.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:37.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:37.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:37.496 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:31:37.966 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:31:38.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:38.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:38.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:38.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:38.431 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:31:38.896 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:31:39.361 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:31:39.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:31:40.290 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:31:40.753 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:31:41.216 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:31:41.678 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:31:42.142 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:31:42.605 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:31:43.068 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:31:43.530 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:31:43.993 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:31:44.456 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:31:44.919 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:31:45.587 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:31:45.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:45.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:45.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:45.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:45.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:45.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:45.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:45.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:45.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:45.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:45.838 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:31:45.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2708 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:31:45.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2708 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:31:45.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2708 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:31:45.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2708 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:31:45.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2708 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:31:45.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2708 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:31:50.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:31:50.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:31:50.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:50.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:50.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:50.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:50.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:31:50.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:50.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:50.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:31:50.844 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:31:50.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:31:50.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:31:50.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:50.845 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:50.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:31:50.845 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:31:50.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:31:50.845 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:31:50.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:50.846 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:31:50.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:31:50.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:50.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:50.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:31:50.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:31:50.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:31:50.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:31:50.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:50.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:31:50.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:31:50.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:50.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:31:50.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:31:50.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:31:50.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:31:50.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:31:50.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:31:50.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:31:50.850 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:31:50.850 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:31:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:50.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:31:50.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:31:50.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:31:51.319 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:31:51.389 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:31:51.390 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:31:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:31:51.390 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:31:51.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:31:51.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:31:51.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:31:51.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:31:51.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:31:51.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:31:51.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:31:51.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:31:51.784 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:31:51.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:51.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:51.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:51.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:52.248 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:31:52.711 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:31:52.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:52.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:52.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:52.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:53.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:31:53.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:31:53.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:53.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:53.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:53.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:54.099 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:31:54.562 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:31:54.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:54.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:54.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:54.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:55.024 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:31:55.488 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:31:55.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:31:55.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:31:55.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:31:55.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:31:55.955 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:31:56.418 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:31:56.883 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:31:57.348 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:31:57.812 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:31:58.275 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:31:58.740 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:31:59.203 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:31:59.666 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:32:00.129 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:32:00.593 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:32:01.056 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:32:01.521 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:32:01.985 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:32:02.453 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:32:03.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:03.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:03.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:03.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:03.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:03.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:03.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:03.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:03.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:03.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:03.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:32:03.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:32:03.406 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:32:03.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2758 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:32:03.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:32:03.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:32:03.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:32:03.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:32:03.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:32:03.406 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:32:08.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:32:08.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:32:08.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:08.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:08.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:08.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:08.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:08.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:32:08.409 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:08.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:32:08.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:32:08.410 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:32:08.410 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:32:08.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:32:08.410 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:08.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:08.410 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:32:08.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:32:08.410 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:32:08.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:08.411 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:32:08.411 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:32:08.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:32:08.411 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:08.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:08.411 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:32:08.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:32:08.411 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:32:08.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:08.413 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:32:08.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:32:08.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:32:08.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:08.413 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:32:08.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:08.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:32:08.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:32:08.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:32:08.415 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:32:08.415 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:32:08.415 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:08.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:08.420 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:32:08.882 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:32:08.928 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:32:08.929 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:32:08.929 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:32:08.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:08.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:08.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:08.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:08.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:08.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:08.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:08.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:08.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:09.345 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:32:09.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:09.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:09.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:09.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:09.808 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:32:10.271 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:32:10.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:10.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:10.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:10.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:10.734 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:32:11.196 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:32:11.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:11.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:11.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:11.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:11.659 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:32:12.122 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:32:12.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:12.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:12.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:12.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:12.584 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:32:13.047 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:32:13.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:13.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:13.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:13.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:13.510 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:32:13.974 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:32:14.436 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:32:14.899 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:32:15.362 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:32:15.824 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:32:16.287 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:32:16.750 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:32:17.212 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:32:17.675 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:32:18.138 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:32:18.600 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:32:19.063 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:32:19.525 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:32:19.987 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:32:20.451 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:32:20.915 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:32:21.377 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:32:21.840 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:32:22.302 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:32:22.765 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:32:23.227 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:32:23.690 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:32:23.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:23.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:23.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:23.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:23.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:23.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:23.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:23.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:23.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:23.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:23.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:32:23.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:32:23.973 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:32:28.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:32:28.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:32:28.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:28.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:28.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:28.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:28.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:28.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:32:28.982 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:28.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:32:28.982 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:32:28.984 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:32:28.984 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:32:28.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:32:28.984 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:28.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:32:28.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:28.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:32:28.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:32:28.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:28.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:32:28.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:32:28.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:32:28.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:28.986 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:32:28.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:28.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:32:28.986 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:32:28.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:28.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:32:28.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:32:28.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:32:28.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:28.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:32:28.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:28.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:32:28.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:32:28.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:32:28.990 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:32:28.990 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:32:28.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:32:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:28.995 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:32:29.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:32:29.506 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:32:29.506 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:32:29.507 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:32:29.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:29.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:29.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:29.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:29.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:29.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:29.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:29.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:29.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:29.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:29.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:29.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:29.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:29.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:29.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:29.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:29.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:29.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:29.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:29.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:32:29.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:32:29.552 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:32:34.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:32:34.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:32:34.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:34.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:34.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:34.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:34.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:34.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:32:34.557 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:34.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:32:34.557 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:32:34.558 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:32:34.558 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:32:34.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:32:34.559 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:34.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:34.559 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:32:34.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:32:34.559 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:32:34.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:34.560 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:32:34.560 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:32:34.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:32:34.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:34.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:34.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:32:34.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:32:34.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:32:34.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:34.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:32:34.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:32:34.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:32:34.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:34.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:34.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:32:34.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:32:34.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:32:34.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:34.563 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:32:34.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:32:34.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:32:34.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:32:34.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:34.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:34.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:32:35.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:32:35.080 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:32:35.080 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:32:35.080 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:32:35.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:35.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:35.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:35.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:35.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:35.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:35.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:35.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:35.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:35.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:35.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:35.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:35.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:35.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:35.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:35.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:35.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:35.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:35.263 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:32:35.263 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:32:35.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:35.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.425 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:32:35.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:35.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:35.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:35.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:35.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:35.443 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:35.443 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:35.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:35.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:35.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:32:35.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:35.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:35.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:35.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:35.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:35.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:35.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:35.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:35.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:35.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:35.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:35.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:35.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:35.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:35.674 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:32:35.674 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:32:35.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:35.956 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:32:36.419 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:32:36.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:36.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:36.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:36.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:36.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:36.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:36.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:36.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:36.732 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:32:36.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:36.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:36.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:36.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:36.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:36.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:36.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:36.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:36.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:32:36.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:32:36.737 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:32:41.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:32:41.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:32:41.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:41.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:41.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:41.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:41.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:32:41.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:32:41.742 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:41.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:32:41.742 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:32:41.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:32:41.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:32:41.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:32:41.743 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:41.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:32:41.743 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:32:41.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:32:41.743 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:32:41.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:41.744 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:32:41.744 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:32:41.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:32:41.744 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:41.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:32:41.744 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:32:41.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:32:41.744 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:32:41.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:41.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:32:41.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:32:41.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:32:41.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:32:41.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:32:41.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:32:41.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:32:41.745 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:32:41.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:41.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:32:41.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:32:41.747 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:32:41.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:32:41.751 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:32:42.216 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:32:42.265 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:32:42.266 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:32:42.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:42.267 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:32:42.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:42.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:42.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:42.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:42.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:42.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:42.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:42.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:42.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:42.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:42.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:42.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:42.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:42.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:42.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:42.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:42.678 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:32:42.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:42.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:42.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:42.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:43.141 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:32:43.604 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:32:43.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:43.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:43.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:43.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:44.066 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:32:44.529 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:32:44.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:44.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:44.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:44.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:44.993 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:32:45.456 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:32:45.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:45.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:45.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:45.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:32:46.381 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:32:46.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:32:46.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:32:46.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:32:46.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:32:47.026 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:32:47.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:47.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:47.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:47.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:47.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:47.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:47.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:47.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:47.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:47.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:47.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:47.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:47.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:47.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:47.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:47.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:47.351 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:32:47.351 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:32:47.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:47.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:47.490 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:32:47.952 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:32:48.415 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:32:48.878 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:32:49.340 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:32:49.803 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:32:50.265 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:32:50.728 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:32:51.191 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:32:51.654 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:32:52.116 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:32:52.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:52.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:52.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:52.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:52.354 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:32:52.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:52.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:52.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:52.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:52.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:52.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:52.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:52.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:52.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:52.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:52.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:52.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:52.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:52.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:52.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:52.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:52.579 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:32:53.042 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:32:53.505 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:32:53.968 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:32:54.431 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:32:54.893 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:32:55.356 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:32:55.818 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:32:56.281 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:32:56.744 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:32:57.206 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:32:57.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:57.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:57.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:57.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:57.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:57.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:57.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:57.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:32:57.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:32:57.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:32:57.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:32:57.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:57.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:32:57.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:32:57.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:32:57.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:32:57.435 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:32:57.435 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:32:57.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:57.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:32:57.669 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:32:58.132 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:32:58.595 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:32:59.059 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:32:59.522 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:32:59.984 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:33:00.448 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:33:00.911 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:33:01.374 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:33:01.837 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:33:02.300 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:33:02.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:02.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:02.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:02.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:02.438 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:33:02.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:02.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:02.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:02.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:02.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:02.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:02.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:02.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:02.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:33:02.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:33:02.443 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:33:02.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4521 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:33:02.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4521 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:33:02.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4521 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:33:02.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4521 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:33:02.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4521 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:33:02.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4521 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:33:02.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4521 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:33:02.443 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4521 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:33:07.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:33:07.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:33:07.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:07.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:07.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:07.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:07.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:07.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:33:07.449 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:07.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:33:07.449 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:33:07.450 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:33:07.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:33:07.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:33:07.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:07.450 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:33:07.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:07.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:33:07.450 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:33:07.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:07.451 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:33:07.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:33:07.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:33:07.452 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:07.452 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:33:07.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:07.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:33:07.452 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:33:07.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:07.453 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:33:07.453 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:33:07.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:33:07.453 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:07.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:07.453 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:33:07.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:33:07.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:33:07.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:07.455 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:33:07.456 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:33:07.456 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:33:07.456 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:07.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:07.461 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:33:07.925 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:33:07.976 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:33:07.977 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:33:07.978 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:33:07.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:07.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:07.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:07.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:07.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:07.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:07.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:07.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:08.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:08.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:08.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:08.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:33:08.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:33:08.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:08.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:08.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:08.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:08.390 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:33:08.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:08.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:08.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:08.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:08.853 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:33:09.317 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:33:09.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:09.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:09.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:09.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:09.780 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:33:10.243 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:33:10.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:10.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:10.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:10.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:10.706 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:33:11.169 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:33:11.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:11.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:11.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:11.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:11.632 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:33:12.094 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:33:12.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:12.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:12.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:12.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:12.557 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:33:13.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:13.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:13.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:13.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:13.020 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:33:13.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:13.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:13.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:13.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:13.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:13.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:13.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:13.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:13.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:13.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:13.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:33:13.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:33:13.060 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:33:13.060 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:33:13.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:13.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:13.483 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:33:13.945 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:33:14.409 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:33:14.872 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:33:15.335 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:33:15.798 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:33:16.261 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:33:16.724 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:33:17.187 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:33:17.651 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:33:18.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:18.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:18.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:18.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:18.064 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:33:18.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:18.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:18.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:18.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:18.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:18.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:18.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:18.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:18.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:18.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:18.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:33:18.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:33:18.116 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:33:18.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:18.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:18.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:18.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:18.580 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:33:19.045 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:33:19.510 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:33:19.974 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:33:20.438 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:33:20.902 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:33:21.366 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:33:21.830 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:33:22.294 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:33:22.758 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:33:23.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:23.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:23.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:23.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:23.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:23.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:23.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:23.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:23.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:23.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:23.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:23.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:23.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:23.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:23.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:33:23.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:33:23.173 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:33:23.173 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:33:23.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:23.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:23.222 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:33:23.686 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:33:24.150 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:33:24.614 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:33:25.078 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:33:25.542 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:33:26.006 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:33:26.471 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:33:26.935 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:33:27.398 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:33:27.862 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:33:28.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:28.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:28.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:28.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:28.179 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:33:28.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:28.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:28.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:28.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:28.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:28.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:28.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:28.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:28.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:33:28.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:33:28.186 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:33:33.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:33:33.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:33:33.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:33.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:33.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:33.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:33.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:33.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:33:33.194 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:33.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:33:33.194 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:33:33.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:33:33.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:33:33.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:33:33.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:33.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:33.196 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:33:33.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:33:33.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:33:33.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:33.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:33:33.199 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:33:33.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:33:33.199 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:33.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:33.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:33:33.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:33:33.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:33:33.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:33.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:33:33.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:33:33.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:33:33.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:33.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:33.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:33:33.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:33:33.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:33:33.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:33:33.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:33:33.207 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:33:33.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:33.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:33.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:33.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:33.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:33.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:33.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:33.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:33.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:33.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:33.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:33.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:33.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:33.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:33:33.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:33:33.209 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:33:38.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:33:38.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:33:38.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:38.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:38.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:38.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:38.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:38.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:33:38.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:38.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:33:38.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:33:38.225 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:33:38.225 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:33:38.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:33:38.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:38.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:38.225 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:33:38.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:33:38.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:33:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:38.228 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:33:38.228 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:33:38.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:33:38.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:38.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:38.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:33:38.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:33:38.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:33:38.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:38.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:33:38.231 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:33:38.231 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:33:38.231 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:33:38.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:38.231 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:33:38.231 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:33:38.231 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:33:38.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:38.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:33:38.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:33:38.236 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:33:38.236 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:38.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:33:38.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:33:38.241 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:33:38.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:33:38.774 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:33:38.775 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:33:38.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:38.776 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:33:38.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:38.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:38.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:38.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:38.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:38.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:38.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:38.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:38.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:38.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:38.806 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:33:38.806 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:33:38.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:38.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:38.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:38.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:39.167 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:33:39.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:39.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:39.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:39.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:39.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:33:40.093 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:33:40.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:40.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:40.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:40.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:40.556 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:33:41.019 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:33:41.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:41.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:41.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:41.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:41.482 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:33:41.945 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:33:42.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:42.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:42.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:42.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:42.407 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:33:42.870 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:33:43.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:43.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:43.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:43.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:43.333 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:33:43.795 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:33:43.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:43.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:43.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:43.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:43.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:43.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:43.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:43.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:43.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:43.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:43.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:43.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:43.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:43.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:43.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:33:43.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:33:43.885 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:33:43.885 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:33:43.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:43.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:44.258 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:33:44.721 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:33:45.184 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:33:45.647 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:33:46.110 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:33:46.572 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:33:47.035 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:33:47.498 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:33:47.962 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:33:48.426 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:33:48.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:48.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:48.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:48.889 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:33:48.889 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:33:48.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:48.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:48.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:48.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:48.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:48.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:48.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:48.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:48.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:48.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:48.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:33:48.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:33:48.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:48.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:48.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:48.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:49.352 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:33:49.815 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:33:50.278 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:33:50.741 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:33:51.204 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:33:51.668 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:33:52.131 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:33:52.594 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:33:53.057 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:33:53.520 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:33:53.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:53.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:53.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:53.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:53.984 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:33:53.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:53.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:53.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:54.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:54.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:54.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:33:54.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:54.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:54.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:33:54.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:33:54.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:33:54.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:33:54.025 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:33:54.037 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:33:54.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:54.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:54.448 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:33:54.912 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:33:55.376 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:33:55.839 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:33:56.303 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:33:56.766 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:33:57.229 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:33:57.693 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:33:58.156 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:33:58.619 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:33:59.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:33:59.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:33:59.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:33:59.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:33:59.028 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:33:59.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:33:59.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:33:59.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:33:59.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:33:59.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:33:59.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:33:59.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:33:59.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:33:59.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:33:59.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:33:59.033 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:34:05.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:34:05.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:34:05.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:34:05.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:34:05.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:34:05.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:34:05.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:34:05.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:34:05.282 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:05.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:34:05.282 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:34:05.284 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:34:05.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:34:05.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:34:05.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:05.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:34:05.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:34:05.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:34:05.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:34:05.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:05.286 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:34:05.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:34:05.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:34:05.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:05.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:34:05.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:34:05.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:34:05.287 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:34:05.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:05.288 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:34:05.288 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:34:05.288 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:34:05.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:05.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:34:05.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:34:05.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:34:05.289 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:34:05.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:05.291 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:34:05.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:34:05.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:34:05.291 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:34:05.292 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:34:05.292 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:34:05.292 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:05.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:05.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:05.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:05.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:05.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:05.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:05.297 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:34:05.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:34:05.807 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:34:05.808 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:34:05.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:05.809 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:34:05.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:05.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:05.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:05.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:05.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:05.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:05.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:05.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:05.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:05.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:05.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:05.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:05.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:05.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:05.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:05.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:06.224 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:34:06.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:06.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:06.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:06.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:06.734 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:34:07.196 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:34:07.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:07.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:07.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:07.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:07.662 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:34:08.124 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:34:08.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:08.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:08.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:08.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:08.588 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:34:09.051 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:34:09.513 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:34:09.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:09.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:09.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:09.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:09.977 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:34:10.440 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:34:10.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:10.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:10.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:10.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:10.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:10.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:10.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:10.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:10.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:10.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:10.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:10.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:10.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:10.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:10.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:10.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:10.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:10.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:10.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:10.903 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:34:10.903 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:34:10.903 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:34:10.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:10.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:11.365 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:34:11.827 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:34:12.290 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:34:12.753 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:34:13.215 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:34:13.678 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:34:14.140 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:34:14.604 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:34:15.066 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:34:15.528 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:34:15.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:15.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:15.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:15.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:15.906 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:34:15.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:15.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:15.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:15.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:15.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:15.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:15.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:15.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:15.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:15.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:15.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:15.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:15.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:15.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:15.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:15.991 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:34:16.454 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:34:16.917 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:34:17.381 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:34:17.843 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:34:18.305 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:34:18.768 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:34:19.230 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:34:19.693 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:34:20.155 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:34:20.618 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:34:20.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:20.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:20.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:20.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:20.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:20.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:20.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:20.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:20.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:20.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:20.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:20.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:20.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:20.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:20.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:20.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:20.988 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:34:20.988 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:34:20.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:20.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:21.081 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:34:21.544 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:34:22.006 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:34:22.468 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:34:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:34:23.397 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:34:23.859 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:34:24.321 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:34:24.783 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:34:25.247 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:34:25.709 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:34:25.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:25.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:25.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:25.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:25.990 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:34:26.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:26.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:26.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:26.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:26.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:34:26.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:34:26.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:34:26.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:34:26.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:34:26.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:34:26.010 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:34:31.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:34:31.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:34:31.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:34:31.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:34:31.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:34:31.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:34:31.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:34:31.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:34:31.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:31.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:34:31.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:34:31.016 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:34:31.017 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:34:31.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:34:31.017 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:31.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:34:31.017 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:34:31.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:34:31.017 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:34:31.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:31.017 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:34:31.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:34:31.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:34:31.018 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:31.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:34:31.018 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:34:31.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:34:31.018 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:34:31.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:31.018 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:34:31.019 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:34:31.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:34:31.019 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:31.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:34:31.019 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:34:31.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:34:31.019 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:34:31.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:31.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:34:31.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:34:31.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:34:31.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:34:31.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:34:31.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:34:31.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:34:31.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:34:31.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:34:31.021 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:34:31.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:31.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:31.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:31.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:31.025 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:34:31.488 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:34:31.536 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:34:31.536 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:34:31.537 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:34:31.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:31.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:31.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:31.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:31.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:31.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:31.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:31.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:31.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:31.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:31.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:31.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:31.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:31.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:31.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:31.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:31.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:31.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:31.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:31.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:31.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:31.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:31.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:31.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:31.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:31.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:31.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:31.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:31.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:31.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:31.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:31.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:31.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:31.859 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:34:31.859 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:34:31.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:31.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:31.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:34:32.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:32.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:32.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:32.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:32.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:32.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:32.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:32.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:32.233 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:34:32.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:32.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:32.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:32.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:32.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:32.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:32.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:32.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:32.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:32.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:32.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:32.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:32.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:32.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:32.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:32.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:32.413 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:34:32.875 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:34:33.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:33.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:33.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:33.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:33.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:33.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:33.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:33.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:33.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:33.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:33.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:33.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:33.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:33.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:33.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:33.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:33.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:33.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:33.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:33.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:33.054 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:34:33.054 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:34:33.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:33.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:33.337 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:34:33.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:33.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:33.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:33.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:33.650 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:34:33.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:33.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:33.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:33.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:33.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:34:33.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:34:33.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:34:33.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:34:33.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:34:33.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:34:33.653 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:34:33.654 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=581 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:34:33.654 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=581 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:34:33.654 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=581 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:34:33.654 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=581 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:34:33.654 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=581 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:34:33.654 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=581 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:34:33.654 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=581 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:34:38.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:34:38.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:34:38.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:34:38.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:34:38.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:34:38.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:34:38.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:34:38.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:34:38.658 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:38.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:34:38.658 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:34:38.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:34:38.659 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:34:38.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:34:38.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:38.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:34:38.659 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:34:38.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:34:38.659 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:34:38.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:38.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:34:38.660 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:34:38.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:34:38.660 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:38.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:34:38.660 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:34:38.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:34:38.661 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:34:38.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:38.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:34:38.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:34:38.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:34:38.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:34:38.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:34:38.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:34:38.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:34:38.662 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:34:38.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:34:38.664 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:34:38.664 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:34:38.664 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:38.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:34:38.668 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:34:39.132 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:34:39.178 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:34:39.178 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:34:39.179 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:34:39.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:39.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:39.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:39.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:39.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:39.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:39.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:39.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:39.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:39.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:39.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:39.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:39.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:39.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:39.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:39.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:39.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:39.595 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:34:39.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:39.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:39.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:39.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:40.059 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:34:40.521 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:34:40.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:40.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:40.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:40.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:40.983 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:34:41.446 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:34:41.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:41.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:41.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:41.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:41.909 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:34:42.371 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:34:42.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:42.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:42.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:42.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:42.834 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:34:43.296 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:34:43.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:34:43.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:34:43.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:34:43.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:34:43.759 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:34:44.221 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:34:44.683 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:34:45.146 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:34:45.608 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:34:46.071 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:34:46.533 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:34:46.996 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:34:47.458 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:34:47.921 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:34:48.383 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:34:48.845 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:34:49.308 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:34:49.771 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:34:50.233 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:34:50.695 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:34:51.158 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:34:51.620 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:34:52.083 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:34:52.545 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:34:53.008 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:34:53.470 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:34:53.933 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:34:54.396 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:34:54.859 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:34:55.321 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:34:55.784 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:34:56.247 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:34:56.709 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:34:57.172 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:34:57.634 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:34:58.097 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:34:58.560 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:34:59.022 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:34:59.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:59.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:59.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:59.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:59.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:59.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:59.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:34:59.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:34:59.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:34:59.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:34:59.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:59.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:34:59.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:34:59.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:34:59.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:34:59.251 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:34:59.251 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:34:59.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:59.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:34:59.486 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:34:59.949 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:35:00.412 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:35:00.875 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:35:01.338 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:35:01.800 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:35:02.263 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:35:02.726 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:35:03.189 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:35:03.652 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:35:04.114 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:35:04.578 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:35:05.041 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:35:05.504 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:35:05.969 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:35:06.433 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:35:06.896 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:35:07.359 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:35:07.824 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:35:08.289 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:35:08.754 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:35:09.217 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 03:35:09.681 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 03:35:10.145 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 03:35:10.609 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 03:35:11.072 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 03:35:11.536 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 03:35:12.000 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 03:35:12.464 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 03:35:12.928 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 03:35:13.392 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 03:35:13.855 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 03:35:14.319 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 03:35:14.782 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 03:35:15.245 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 03:35:15.708 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 03:35:16.171 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 03:35:16.634 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 03:35:17.097 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 03:35:17.561 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 03:35:18.024 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 03:35:18.488 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 03:35:18.952 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 03:35:19.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:35:19.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:35:19.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:35:19.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:35:19.264 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:35:19.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:35:19.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:35:19.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:35:19.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:35:19.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:35:19.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:35:19.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:35:19.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:35:19.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:35:19.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:35:19.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:35:19.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:35:19.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:35:19.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:35:19.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:35:19.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:35:19.415 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 03:35:19.879 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 03:35:20.342 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 03:35:20.806 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 03:35:21.270 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 03:35:21.734 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 03:35:22.197 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 03:35:22.661 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 03:35:23.124 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 03:35:23.588 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 03:35:24.051 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 03:35:24.515 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 03:35:24.984 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 03:35:25.451 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 03:35:25.917 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 03:35:26.382 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 03:35:26.846 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 03:35:27.311 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 03:35:27.774 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 03:35:28.238 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 03:35:28.701 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 03:35:29.165 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 03:35:29.628 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 03:35:30.092 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 03:35:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 03:35:31.018 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 03:35:31.482 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 03:35:31.946 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 03:35:32.409 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 03:35:32.872 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 03:35:33.335 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 03:35:33.798 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 03:35:34.262 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 03:35:34.725 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 03:35:35.187 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 03:35:35.650 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 03:35:36.115 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 03:35:36.584 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 03:35:37.052 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 03:35:37.517 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 03:35:37.981 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 03:35:38.446 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 03:35:38.910 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 03:35:39.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:35:39.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:35:39.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:35:39.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:35:39.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:35:39.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:35:39.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:35:39.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:35:39.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:35:39.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:35:39.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:35:39.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:35:39.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:35:39.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:35:39.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:35:39.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:35:39.372 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 03:35:39.373 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:35:39.373 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:35:39.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:35:39.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:35:39.835 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 03:35:40.297 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 03:35:40.760 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 03:35:41.223 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 03:35:41.686 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 03:35:42.150 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 03:35:42.613 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 03:35:43.076 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 03:35:43.540 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 03:35:44.002 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 03:35:44.464 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 03:35:44.927 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 03:35:45.391 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 03:35:45.856 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 03:35:46.321 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 03:35:46.785 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 03:35:47.248 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 03:35:47.714 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 03:35:48.180 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 03:35:49.214 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 03:35:49.686 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 03:35:50.157 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 03:35:50.620 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 03:35:51.082 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 03:35:51.545 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 03:35:52.008 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 03:35:52.471 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 03:35:52.934 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 03:35:53.397 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 03:35:53.860 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 03:35:54.324 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 03:35:54.787 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 03:35:55.250 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 03:35:55.713 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 03:35:56.177 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 03:35:56.645 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 03:35:57.109 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 03:35:57.572 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 03:35:58.036 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 03:35:58.498 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 03:35:58.962 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-22 03:35:59.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:35:59.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:35:59.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:35:59.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:35:59.376 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:35:59.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:35:59.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:35:59.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:35:59.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:35:59.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:35:59.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:35:59.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:35:59.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:35:59.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:35:59.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:35:59.382 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:35:59.383 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=17637 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:35:59.383 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=17637 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:35:59.383 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=17637 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:35:59.383 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=17637 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:35:59.383 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=17637 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:35:59.383 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=17637 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:35:59.383 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=17637 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:35:59.383 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=17637 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:36:04.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:36:04.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:36:04.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:04.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:04.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:04.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:04.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:04.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:36:04.404 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:04.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:36:04.404 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:36:04.405 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:36:04.405 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:36:04.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:36:04.406 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:04.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:04.406 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:36:04.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:36:04.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:36:04.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:04.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:36:04.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:36:04.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:36:04.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:04.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:04.407 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:36:04.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:36:04.407 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:36:04.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:04.408 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:36:04.408 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:36:04.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:36:04.408 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:04.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:04.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:36:04.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:36:04.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:36:04.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:36:04.411 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:36:04.411 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:36:04.411 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:04.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:36:04.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:36:04.412 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:36:09.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:36:09.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:36:09.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:09.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:09.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:09.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:09.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:09.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:36:09.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:09.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:36:09.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:36:09.423 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:36:09.423 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:36:09.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:36:09.423 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:09.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:09.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:36:09.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:36:09.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:36:09.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:09.425 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:36:09.425 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:36:09.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:36:09.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:09.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:09.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:36:09.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:36:09.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:36:09.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:09.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:36:09.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:36:09.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:36:09.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:09.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:09.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:36:09.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:36:09.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:36:09.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:09.429 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:36:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:36:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:36:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:36:09.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:36:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:36:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:36:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:36:09.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:36:09.430 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:36:09.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:09.434 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:36:09.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:36:09.955 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:36:09.957 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:36:09.958 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:36:09.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:09.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:09.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:09.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:09.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:09.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:09.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:09.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:09.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:09.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:09.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:09.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:09.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:09.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:09.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:09.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:10.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:10.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:10.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:10.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:10.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:10.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:10.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:10.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:10.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:10.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:10.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:10.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:10.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.363 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:36:10.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:10.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:10.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:10.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:10.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:10.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:10.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:10.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:10.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:10.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:10.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:10.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:10.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:10.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:10.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:10.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:10.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:10.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:10.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:10.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:10.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:10.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:10.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:10.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:10.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:10.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:10.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:10.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:10.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:10.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:10.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:10.686 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:10.686 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:36:10.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.828 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:36:10.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:10.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:10.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:10.958 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:10.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:10.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:10.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:10.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:10.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:10.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:10.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:10.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:10.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:11.048 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:11.048 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:36:11.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:11.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:11.293 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:36:11.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:11.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:11.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:11.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:11.315 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:11.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:11.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:11.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:11.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:11.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:11.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:11.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:11.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:11.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:11.382 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:11.417 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:36:11.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:11.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:11.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:11.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:11.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:11.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:11.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:11.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:11.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:11.756 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:36:12.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:12.334 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:12.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:12.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:12.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:12.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:12.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:12.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:12.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:12.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:12.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:12.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:12.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:12.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:12.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:12.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:12.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:12.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:12.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:12.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:12.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:12.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:12.800 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:36:13.272 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:36:13.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:13.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:13.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:13.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:13.743 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:36:14.211 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:36:14.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:14.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:14.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:14.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:14.678 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:36:15.143 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:36:15.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:15.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:15.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:15.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:15.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:15.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:15.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:15.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:15.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:15.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:15.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:15.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:15.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:15.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:15.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:15.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:15.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:15.607 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:36:16.084 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:36:16.549 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:36:17.017 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:36:17.482 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:36:17.947 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:36:18.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:18.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:18.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:18.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:18.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:18.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:18.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:18.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:18.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:18.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:18.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:18.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:18.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:18.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:18.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:18.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:18.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:18.411 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:36:18.876 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:36:19.341 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:36:19.806 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:36:20.270 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:36:20.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:20.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:20.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:20.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:20.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:20.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:20.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:20.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:20.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:20.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:20.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:20.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:20.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:20.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:20.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:20.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:20.734 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:36:20.739 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:20.740 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:36:20.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:20.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:21.198 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:36:21.661 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:36:22.124 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:36:22.588 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:36:23.054 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:36:23.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:23.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:23.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:23.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:23.140 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:23.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:23.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:23.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:23.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:23.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:23.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:23.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:23.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:23.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:23.191 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:23.191 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:36:23.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:23.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:23.519 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:36:23.982 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:36:24.447 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:36:24.910 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:36:25.375 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:36:25.839 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:36:25.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:25.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:25.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:25.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:25.916 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:25.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:25.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:25.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:25.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:25.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:25.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:25.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:25.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:25.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:25.925 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:25.925 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:36:25.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:25.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:26.303 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:36:26.767 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:36:27.230 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:36:27.693 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:36:28.159 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:36:28.624 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:36:28.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:28.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:28.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:28.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:28.704 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:28.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:28.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:28.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:28.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:28.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:28.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:28.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:28.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:28.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:36:28.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:36:28.709 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:36:28.709 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4100 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:36:28.709 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4100 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:36:28.709 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4100 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:36:28.709 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4100 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:36:33.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:36:33.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:36:33.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:33.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:33.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:33.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:33.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:33.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:36:33.714 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:33.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:36:33.715 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:36:33.715 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:36:33.715 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:36:33.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:36:33.715 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:33.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:33.715 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:36:33.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:36:33.715 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:36:33.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:33.716 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:36:33.716 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:36:33.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:36:33.716 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:33.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:33.716 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:36:33.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:36:33.716 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:36:33.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:33.717 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:36:33.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:36:33.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:36:33.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:33.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:33.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:36:33.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:36:33.717 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:36:33.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:33.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:36:33.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:36:33.719 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:36:33.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:33.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:36:34.186 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:36:34.234 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:36:34.234 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:36:34.234 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:36:34.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:34.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:34.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:34.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:34.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:34.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:34.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:34.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:34.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:34.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:34.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:34.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:34.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:34.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:34.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:34.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:34.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:34.649 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:36:34.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:34.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:34.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:34.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:35.111 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:36:35.574 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:36:35.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:35.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:35.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:35.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:36.036 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:36:36.499 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:36:36.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:36.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:36.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:36.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:36.962 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:36:37.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:37.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:37.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:37.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:37.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:37.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:37.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:37.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:37.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:37.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:37.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:37.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:37.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:37.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:37.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:37.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:37.424 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:36:37.426 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:37.426 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:36:37.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:37.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:37.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:37.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:37.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:37.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:37.887 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:36:38.349 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:36:38.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:38.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:38.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:38.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:38.811 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:36:39.274 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:36:39.736 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:36:40.261 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:36:40.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:40.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:40.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:40.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:40.618 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:40.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:40.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:40.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:40.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:40.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:40.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:40.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:40.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:40.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:40.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:40.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:40.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:40.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:40.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:40.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:40.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:40.723 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:36:41.186 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:36:41.648 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:36:42.110 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:36:42.574 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:36:43.037 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:36:43.499 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:36:43.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:43.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:43.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:43.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:43.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:43.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:43.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:43.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:43.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:43.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:43.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:43.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:43.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:43.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:43.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:43.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:43.961 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:36:43.962 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:43.962 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:36:43.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:43.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:44.424 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:36:44.886 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:36:45.348 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:36:45.811 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:36:46.273 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:36:46.736 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:36:47.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:47.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:47.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:47.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:47.108 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:47.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:47.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:47.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:47.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:47.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:47.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:47.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:47.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:36:47.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:36:47.112 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:36:47.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:52.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:36:52.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:36:52.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:52.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:52.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:52.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:52.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:52.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:36:52.118 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:52.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:36:52.118 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:36:52.119 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:36:52.119 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:36:52.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:36:52.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:52.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:52.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:36:52.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:36:52.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:36:52.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:52.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:36:52.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:36:52.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:36:52.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:52.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:52.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:36:52.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:36:52.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:36:52.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:52.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:36:52.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:36:52.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:36:52.121 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:36:52.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:52.121 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:36:52.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:36:52.121 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:36:52.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:36:52.123 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:36:52.123 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:36:52.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:52.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:36:52.128 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:36:52.590 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:36:52.636 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:36:52.636 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:36:52.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:52.637 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:36:52.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:52.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:52.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:52.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:52.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:52.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:52.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:52.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:52.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:52.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:52.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:52.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:52.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:52.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:52.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:53.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:53.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:53.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:53.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:53.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:53.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:53.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:53.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:53.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:53.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:53.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:53.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:53.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:53.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:53.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:53.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:53.052 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:36:53.054 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:53.054 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:36:53.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:53.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:53.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:53.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:53.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:53.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:53.515 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:36:53.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:53.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:53.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:53.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:53.525 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:53.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:53.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:53.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:53.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:53.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:53.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:53.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:53.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:53.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:53.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:53.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:53.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:53.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:53.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:53.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:53.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:53.978 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:36:54.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:54.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:54.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:54.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:54.440 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:36:54.903 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:36:55.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:55.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:55.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:55.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:55.365 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:36:55.827 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:36:56.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:56.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:56.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:56.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:56.290 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:36:56.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:56.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:56.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:56.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:56.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:56.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:56.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:56.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:56.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:56.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:36:56.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:56.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:56.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:36:56.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:36:56.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:36:56.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:36:56.468 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:36:56.468 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:36:56.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:56.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:56.752 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:36:57.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:57.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:57.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:57.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:57.214 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:36:57.677 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:36:58.139 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:36:58.601 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:36:59.064 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:36:59.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:36:59.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:36:59.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:36:59.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:36:59.377 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:36:59.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:36:59.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:36:59.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:36:59.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:36:59.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:36:59.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:36:59.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:36:59.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:36:59.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:36:59.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:36:59.380 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:36:59.380 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:36:59.380 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:36:59.380 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:36:59.380 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:36:59.380 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=1601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:37:04.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:37:04.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:37:04.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:37:04.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:37:04.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:37:04.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:37:04.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:37:04.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:37:04.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:37:04.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:37:04.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:37:04.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:37:04.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:37:04.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:37:04.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:37:04.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:37:04.388 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:37:04.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:37:04.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:37:04.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:04.389 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:37:04.389 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:37:04.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:37:04.389 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:37:04.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:37:04.389 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:37:04.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:37:04.389 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:37:04.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:04.390 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:37:04.390 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:37:04.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:37:04.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:37:04.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:37:04.390 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:37:04.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:37:04.390 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:37:04.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:04.391 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:37:04.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:37:04.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:37:04.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:37:04.391 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:37:04.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:37:04.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:37:04.392 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:37:04.392 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:37:04.392 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:04.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:04.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:04.396 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:37:04.859 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:37:04.903 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:37:04.903 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:37:04.904 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:37:04.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:04.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:04.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:04.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:04.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:04.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:04.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:04.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:04.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:04.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:04.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:04.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:37:04.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:37:04.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:04.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:04.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:04.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:05.321 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:37:05.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:05.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:05.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:05.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:05.784 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:37:06.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:06.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:06.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:06.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:06.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:06.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:06.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:06.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:06.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:06.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:06.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:06.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:06.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:06.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:06.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:37:06.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:37:06.247 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:37:06.248 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:37:06.248 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:37:06.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:06.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:06.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:06.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:06.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:06.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:06.709 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:37:07.172 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:37:07.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:07.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:07.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:07.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:07.635 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:37:08.097 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:37:08.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:08.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:08.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:08.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:08.332 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:37:08.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:08.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:08.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:08.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:08.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:08.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:08.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:08.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:08.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:08.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:08.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:37:08.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:37:08.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:08.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:08.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:08.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:08.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:08.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:08.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:08.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:08.560 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:37:09.022 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:37:09.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:09.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:09.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:09.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:09.486 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:37:09.948 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:37:10.411 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:37:10.874 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:37:11.336 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:37:11.799 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:37:12.262 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:37:12.725 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:37:13.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:13.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:13.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:13.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:13.187 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:37:13.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:13.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:13.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:13.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:13.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:13.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:13.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:13.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:13.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:13.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:13.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:37:13.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:37:13.227 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:37:13.227 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:37:13.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:13.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:13.650 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:37:14.112 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:37:14.575 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:37:15.037 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:37:15.499 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:37:15.962 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:37:16.424 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:37:16.888 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:37:17.350 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:37:17.813 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:37:18.276 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:37:18.739 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:37:19.201 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:37:19.663 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:37:20.126 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:37:20.588 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:37:21.051 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:37:21.514 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:37:21.977 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:37:22.439 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:37:22.902 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:37:23.364 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:37:23.828 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:37:24.290 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:37:24.754 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:37:25.216 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:37:25.679 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:37:26.143 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:37:26.606 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:37:27.070 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:37:27.533 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:37:27.996 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:37:28.460 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:37:28.923 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:37:29.386 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:37:29.849 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:37:30.312 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:37:30.775 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:37:31.237 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:37:31.700 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:37:32.163 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:37:32.627 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:37:33.089 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:37:33.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:33.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:33.194 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:37:33.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:33.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:33.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:33.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:33.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:37:33.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:37:33.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:37:33.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:37:33.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:37:33.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:37:33.195 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:37:38.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:37:38.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:37:38.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:37:38.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:37:38.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:37:38.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:37:38.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:37:38.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:37:38.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:37:38.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:37:38.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:37:38.203 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:37:38.203 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:37:38.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:37:38.203 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:37:38.203 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:37:38.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:37:38.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:37:38.204 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:37:38.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:38.205 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:37:38.205 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:37:38.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:37:38.205 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:37:38.205 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:37:38.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:37:38.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:37:38.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:37:38.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:38.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:37:38.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:37:38.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:37:38.206 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:37:38.206 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:37:38.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:37:38.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:37:38.206 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:37:38.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:38.208 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:37:38.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:37:38.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:37:38.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:37:38.208 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:37:38.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:37:38.209 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:37:38.209 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:37:38.209 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:37:38.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:37:38.213 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:37:38.678 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:37:38.732 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:37:38.733 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:37:38.735 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:37:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:38.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:38.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:38.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:38.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:38.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:38.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:38.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:38.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:38.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:38.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:38.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:37:38.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:37:38.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:38.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:38.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:38.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:39.143 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:37:39.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:39.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:39.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:39.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:39.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:39.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:39.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:39.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:39.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:39.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:39.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:39.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:39.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:39.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:39.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:39.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:39.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:39.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:39.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:37:39.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:37:39.464 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:37:39.464 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:37:39.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:39.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:39.607 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:37:40.073 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:37:40.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:40.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:40.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:40.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:40.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:40.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:40.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:40.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:40.375 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:37:40.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:40.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:40.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:40.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:40.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:40.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:40.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:40.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:40.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:40.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:40.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:37:40.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:37:40.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:40.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:40.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:40.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:40.536 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:37:40.999 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:37:41.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:41.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:41.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:41.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:41.462 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:37:41.924 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:37:42.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:42.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:42.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:42.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:42.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:42.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:42.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:42.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:42.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:42.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:42.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:42.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:37:42.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:37:42.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:37:42.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:37:42.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:42.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:37:42.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:37:42.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:37:42.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:37:42.339 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:37:42.339 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:37:42.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:42.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:37:42.386 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:37:42.848 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:37:43.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:37:43.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:37:43.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:37:43.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:37:43.310 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:37:43.773 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:37:44.235 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:37:44.697 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:37:45.159 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:37:45.622 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:37:46.084 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:37:46.546 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:37:47.009 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:37:47.472 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:37:47.934 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:37:48.396 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:37:48.858 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:37:49.320 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:37:49.784 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:37:50.247 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:37:50.710 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:37:51.173 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:37:51.636 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:37:52.098 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:37:52.560 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:37:53.022 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:37:53.485 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:37:53.947 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:37:54.409 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:37:54.872 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:37:55.335 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:37:55.797 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:37:56.260 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:37:56.722 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:37:57.185 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:37:57.647 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:37:58.110 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:37:58.572 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:37:59.035 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:37:59.497 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:37:59.960 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:38:00.422 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:38:00.885 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:38:01.347 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:38:01.810 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:38:02.273 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:38:02.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:02.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:02.352 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:38:02.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:02.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:02.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:02.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:02.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:38:02.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:38:02.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:38:02.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:38:02.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:38:02.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:38:02.353 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:38:07.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:38:07.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:38:07.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:38:07.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:38:07.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:38:07.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:38:07.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:38:07.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:38:07.359 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:07.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:38:07.359 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:38:07.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:38:07.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:38:07.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:38:07.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:07.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:38:07.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:38:07.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:38:07.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:38:07.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:07.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:38:07.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:38:07.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:38:07.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:07.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:38:07.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:38:07.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:38:07.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:38:07.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:07.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:38:07.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:38:07.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:38:07.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:07.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:38:07.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:38:07.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:38:07.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:38:07.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:07.365 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:38:07.365 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:38:07.365 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:38:07.365 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:07.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:07.370 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:38:07.834 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:38:07.881 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:38:07.881 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:38:07.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:07.882 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:38:07.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:07.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:07.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:07.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:07.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:07.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:07.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:07.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:07.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:07.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:07.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:38:07.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:38:07.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:07.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:07.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:07.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:08.297 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:38:08.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:08.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:08.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:08.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:08.759 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:38:09.223 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:38:09.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:09.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:09.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:09.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:09.685 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:38:10.148 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:38:10.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:10.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:10.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:10.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:10.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:10.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:10.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:10.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:10.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:10.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:10.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:10.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:10.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:10.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:10.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:38:10.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:38:10.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:10.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:10.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:10.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:10.378 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:38:10.378 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:38:10.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:10.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:10.611 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:38:11.073 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:38:11.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:11.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:11.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:11.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:11.536 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:38:11.998 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:38:12.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:12.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:12.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:12.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:12.471 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:38:12.933 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:38:13.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:13.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:13.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:13.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:13.065 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:38:13.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:13.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:13.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:13.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:13.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:13.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:13.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:13.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:13.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:13.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:38:13.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:38:13.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:13.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:13.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:13.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:13.396 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:38:13.858 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:38:14.321 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:38:14.784 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:38:15.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:38:15.710 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:38:16.172 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:38:16.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:16.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:16.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:16.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:16.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:16.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:16.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:16.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:16.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:16.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:16.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:16.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:16.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:16.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:16.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:38:16.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:38:16.350 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:38:16.350 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:38:16.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:16.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:16.635 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:38:17.098 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:38:17.561 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:38:18.023 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:38:18.486 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:38:18.949 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:38:19.412 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:38:19.874 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:38:20.337 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:38:20.800 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:38:21.263 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:38:21.726 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:38:22.188 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:38:22.650 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:38:23.112 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:38:23.574 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:38:24.038 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:38:24.501 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:38:24.964 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:38:25.426 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:38:25.889 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:38:26.351 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:38:26.814 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:38:27.276 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:38:27.738 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:38:28.201 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:38:28.664 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:38:29.126 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:38:29.588 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:38:30.051 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:38:30.513 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:38:30.977 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:38:31.439 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:38:31.902 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:38:32.365 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:38:32.827 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:38:33.290 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:38:33.753 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:38:34.216 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:38:34.679 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:38:35.142 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:38:35.604 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:38:36.068 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:38:36.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:36.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:36.332 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:38:36.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:36.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:36.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:36.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:36.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:38:36.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:38:36.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:38:36.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:38:36.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:38:36.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:38:36.334 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:38:41.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:38:41.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:38:41.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:38:41.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:38:41.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:38:41.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:38:41.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:38:41.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:38:41.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:41.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:38:41.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:38:41.345 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:38:41.345 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:38:41.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:38:41.345 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:41.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:38:41.345 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:38:41.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:38:41.346 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:38:41.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:41.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:38:41.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:38:41.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:38:41.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:41.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:38:41.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:38:41.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:38:41.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:38:41.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:41.349 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:38:41.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:38:41.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:38:41.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:41.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:38:41.349 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:38:41.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:38:41.349 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:38:41.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:38:41.351 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:38:41.351 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:38:41.351 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:41.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:41.356 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:38:41.819 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:38:41.876 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:38:41.877 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:38:41.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:41.880 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:38:41.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:41.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:41.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:41.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:41.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:41.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:41.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:41.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:41.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:41.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:41.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:38:41.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:38:41.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:41.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:41.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:41.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:42.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:42.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:42.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:42.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:42.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:42.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:42.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:42.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:42.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:42.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:42.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:42.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:42.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:42.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:42.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:38:42.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:38:42.143 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:38:42.143 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:38:42.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:42.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:42.283 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:38:42.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:42.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:42.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:42.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:42.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:42.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:42.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:42.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:42.487 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:38:42.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:42.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:42.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:42.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:42.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:42.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:42.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:42.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:42.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:42.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:42.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:38:42.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:38:42.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:42.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:42.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:42.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:42.747 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:38:43.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:43.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:43.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:43.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:43.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:43.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:43.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:43.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:43.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:43.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:43.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:43.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:43.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:43.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:43.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:38:43.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:38:43.215 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:38:43.215 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:38:43.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:43.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:43.326 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:38:43.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:43.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:43.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:43.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:43.790 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:38:43.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:43.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:43.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:43.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:43.869 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:38:43.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:43.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:38:43.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:38:43.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:38:43.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:38:43.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:38:43.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:38:43.873 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:38:48.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:38:48.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:38:48.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:38:48.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:38:48.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:38:48.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:38:48.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:38:48.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:38:48.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:48.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:38:48.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:38:48.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:38:48.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:38:48.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:38:48.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:48.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:38:48.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:38:48.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:38:48.879 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:38:48.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:48.880 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:38:48.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:38:48.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:38:48.880 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:48.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:38:48.880 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:38:48.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:38:48.880 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:38:48.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:48.881 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:38:48.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:38:48.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:38:48.881 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:38:48.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:38:48.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:38:48.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:38:48.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:38:48.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:48.882 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:38:48.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:38:48.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:38:48.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:38:48.882 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:38:48.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:38:48.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:38:48.883 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:38:48.883 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:38:48.883 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:48.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:38:48.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:48.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:48.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:38:48.887 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:38:49.353 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:38:49.401 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:38:49.402 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:38:49.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:49.402 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:38:49.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:49.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:49.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:49.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:38:49.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:38:49.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:38:49.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:38:49.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:49.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:49.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:49.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:38:49.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:38:49.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:38:49.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:38:49.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:49.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:38:49.815 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:38:49.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:49.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:49.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:49.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:50.279 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:38:50.742 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:38:50.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:50.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:50.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:50.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:51.205 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:38:51.668 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:38:51.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:51.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:51.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:51.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:52.131 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:38:52.594 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:38:52.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:52.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:52.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:52.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:53.058 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:38:53.521 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:38:53.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:38:53.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:38:53.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:38:53.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:38:53.984 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:38:54.447 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:38:54.910 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:38:55.373 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:38:55.835 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:38:56.298 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:38:56.762 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:38:57.225 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:38:57.689 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:38:58.152 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:38:58.615 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:38:59.078 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:38:59.540 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:39:00.003 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:39:00.466 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:39:00.928 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:39:01.391 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:39:01.853 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:39:02.316 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:39:02.780 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:39:03.243 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:39:03.706 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:39:04.169 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:39:04.631 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:39:05.094 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:39:05.558 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:39:06.023 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:39:06.487 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:39:06.950 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:39:07.413 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:39:07.876 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:39:08.338 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:39:08.801 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:39:09.264 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:39:09.728 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:39:10.191 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:39:10.654 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:39:11.118 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:39:11.581 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:39:12.043 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:39:12.506 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:39:12.969 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:39:13.432 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:39:13.895 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:39:14.366 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:39:14.828 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:39:15.291 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:39:15.753 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:39:16.215 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:39:16.678 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:39:17.140 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:39:17.606 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:39:18.069 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:39:18.532 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:39:18.995 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:39:19.457 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 03:39:19.920 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 03:39:20.383 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 03:39:20.845 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 03:39:21.308 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 03:39:21.770 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 03:39:22.233 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 03:39:22.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:39:22.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:39:22.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:39:22.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:39:22.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:39:22.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:39:22.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:39:22.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:39:22.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:39:22.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:39:22.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:39:22.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:39:22.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:39:22.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:39:22.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:39:22.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:39:22.460 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:39:22.461 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:39:22.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:39:22.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:39:22.696 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 03:39:23.158 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 03:39:23.622 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 03:39:24.086 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 03:39:24.548 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 03:39:25.010 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 03:39:25.474 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 03:39:25.937 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 03:39:26.399 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 03:39:26.861 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 03:39:27.323 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 03:39:27.786 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 03:39:28.249 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 03:39:28.712 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 03:39:29.174 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 03:39:29.723 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 03:39:30.189 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 03:39:30.652 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 03:39:31.115 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 03:39:31.577 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 03:39:32.039 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 03:39:32.501 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 03:39:32.965 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 03:39:33.427 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 03:39:33.890 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 03:39:34.353 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 03:39:34.815 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 03:39:35.278 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 03:39:35.742 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 03:39:36.206 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 03:39:36.668 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-22 03:39:37.131 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-22 03:39:37.593 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-22 03:39:38.055 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-22 03:39:38.518 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-22 03:39:38.981 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-22 03:39:39.443 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-22 03:39:39.906 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-22 03:39:40.368 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-22 03:39:40.831 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-22 03:39:41.293 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-22 03:39:41.756 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-22 03:39:42.218 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-22 03:39:42.682 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-22 03:39:43.145 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-22 03:39:43.609 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-22 03:39:44.072 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-22 03:39:44.534 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-22 03:39:44.997 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-22 03:39:45.459 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-22 03:39:45.922 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-22 03:39:46.384 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-22 03:39:46.847 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-22 03:39:47.310 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-22 03:39:47.773 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-22 03:39:48.236 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-22 03:39:48.698 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-22 03:39:49.161 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-22 03:39:49.623 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-22 03:39:50.086 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-22 03:39:50.550 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-22 03:39:51.014 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-22 03:39:51.477 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-22 03:39:51.941 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-22 03:39:52.404 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-22 03:39:52.868 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-22 03:39:53.332 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-22 03:39:53.796 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-22 03:39:54.259 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-22 03:39:54.722 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-22 03:39:55.185 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-22 03:39:55.648 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-22 03:39:56.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:39:56.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:39:56.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:39:56.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:39:56.036 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:39:56.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:39:56.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:39:56.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:39:56.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:39:56.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:39:56.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:39:56.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:39:56.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:39:56.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:39:56.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:39:56.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:39:56.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:39:56.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:39:56.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:39:56.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:39:56.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:39:56.111 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-22 03:39:56.574 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-22 03:39:57.036 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-22 03:39:57.499 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-22 03:39:57.962 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-22 03:39:58.425 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-22 03:39:58.888 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-22 03:39:59.352 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-22 03:39:59.817 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-22 03:40:00.281 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-22 03:40:00.743 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-22 03:40:01.206 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-22 03:40:01.670 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-22 03:40:02.133 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-22 03:40:02.596 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-22 03:40:03.059 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-22 03:40:03.522 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-22 03:40:03.985 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-22 03:40:04.448 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-22 03:40:04.910 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-22 03:40:05.373 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-22 03:40:05.836 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-22 03:40:06.299 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-22 03:40:06.761 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-22 03:40:07.224 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-22 03:40:07.686 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-22 03:40:08.149 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-22 03:40:08.612 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-22 03:40:09.074 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-22 03:40:09.538 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-22 03:40:10.000 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-22 03:40:10.462 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-22 03:40:10.925 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-22 03:40:11.387 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-22 03:40:11.850 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-22 03:40:12.313 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-22 03:40:12.775 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-22 03:40:13.238 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-22 03:40:13.701 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-22 03:40:14.166 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-22 03:40:14.629 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-22 03:40:15.091 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-22 03:40:15.553 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-22 03:40:16.016 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-22 03:40:16.478 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-22 03:40:16.940 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-22 03:40:17.403 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-22 03:40:17.866 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-04-22 03:40:18.329 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-04-22 03:40:18.791 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-04-22 03:40:19.254 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-04-22 03:40:19.717 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-04-22 03:40:20.180 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-04-22 03:40:20.642 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-04-22 03:40:21.105 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-04-22 03:40:21.568 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-04-22 03:40:22.030 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-04-22 03:40:22.493 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-04-22 03:40:22.956 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-04-22 03:40:23.418 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-04-22 03:40:23.881 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-04-22 03:40:24.344 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-04-22 03:40:24.808 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-04-22 03:40:25.271 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-04-22 03:40:25.733 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-04-22 03:40:26.197 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-04-22 03:40:26.660 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-04-22 03:40:27.123 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-04-22 03:40:27.585 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-04-22 03:40:28.050 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-04-22 03:40:28.515 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-04-22 03:40:28.980 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-04-22 03:40:29.445 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-04-22 03:40:29.910 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-04-22 03:40:30.375 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-04-22 03:40:30.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:30.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:40:30.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:40:30.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:40:30.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:40:30.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:40:30.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:40:30.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:40:30.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:40:30.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:40:30.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:40:30.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:30.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:40:30.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:40:30.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:40:30.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:40:30.840 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-04-22 03:40:30.842 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:40:30.842 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:40:30.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:30.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:31.306 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-04-22 03:40:31.771 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-04-22 03:40:32.236 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-04-22 03:40:32.701 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-04-22 03:40:33.166 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-04-22 03:40:33.631 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-04-22 03:40:34.096 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-04-22 03:40:34.560 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-04-22 03:40:35.025 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-04-22 03:40:35.490 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-04-22 03:40:35.954 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-04-22 03:40:36.417 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-04-22 03:40:36.880 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-04-22 03:40:37.343 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-04-22 03:40:37.807 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-04-22 03:40:38.271 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-04-22 03:40:38.735 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-04-22 03:40:39.200 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-04-22 03:40:39.664 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-04-22 03:40:40.128 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-04-22 03:40:40.592 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-04-22 03:40:41.057 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-04-22 03:40:41.526 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-04-22 03:40:41.991 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-04-22 03:40:42.456 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-04-22 03:40:42.919 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-04-22 03:40:43.382 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-04-22 03:40:43.846 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-04-22 03:40:44.309 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-04-22 03:40:44.773 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-04-22 03:40:45.236 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-04-22 03:40:45.699 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-04-22 03:40:46.162 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-04-22 03:40:46.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:40:46.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:40:46.533 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:40:46.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:40:46.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:40:46.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:40:46.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:40:46.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:40:46.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:40:46.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:40:46.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:40:46.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:40:46.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:40:46.535 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:40:51.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:40:51.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:40:51.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:40:51.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:40:51.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:40:51.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:40:51.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:40:51.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:40:51.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:40:51.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:40:51.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:40:51.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:40:51.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:40:51.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:40:51.542 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:40:51.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:40:51.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:40:51.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:40:51.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:40:51.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:40:51.543 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:40:51.543 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:40:51.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:40:51.543 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:40:51.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:40:51.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:40:51.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:40:51.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:40:51.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:40:51.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:40:51.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:40:51.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:40:51.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:40:51.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:40:51.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:40:51.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:40:51.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:40:51.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:40:51.548 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:40:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:40:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:40:51.549 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:40:51.549 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:40:51.549 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:51.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:40:51.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:40:51.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:40:51.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:51.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:51.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:51.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:40:51.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:40:51.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:40:51.551 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:40:56.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:40:56.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:40:56.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:40:56.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:40:56.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:40:56.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:40:56.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:40:56.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:40:56.787 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:40:56.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:40:56.788 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:40:56.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:40:56.789 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:40:56.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:40:56.789 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:40:56.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:40:56.789 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:40:56.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:40:56.789 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:40:56.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:40:56.791 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:40:56.791 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:40:56.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:40:56.791 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:40:56.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:40:56.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:40:56.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:40:56.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:40:56.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:40:56.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:40:56.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:40:56.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:40:56.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:40:56.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:40:56.793 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:40:56.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:40:56.793 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:40:56.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:40:56.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:40:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:40:56.796 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:40:56.796 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:40:56.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:40:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:40:56.801 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:40:57.265 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:40:57.322 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:40:57.323 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:40:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:40:57.323 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:40:57.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:40:57.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:40:57.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:40:57.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:40:57.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:40:57.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:40:57.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:40:57.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:57.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:40:57.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:40:57.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:40:57.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:40:57.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:40:57.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:40:57.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:57.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:57.729 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:40:57.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:40:57.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:40:57.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:40:57.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:40:58.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:40:58.657 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:40:58.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:58.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:40:58.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:40:58.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:40:58.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:40:58.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:40:58.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:40:58.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:40:58.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:40:58.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:40:58.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:40:58.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:58.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:40:58.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:40:58.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:40:58.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:40:58.790 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:40:58.790 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:40:58.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:58.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:40:58.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:40:58.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:40:58.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:40:58.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:40:59.121 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:40:59.584 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:40:59.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:40:59.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:40:59.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:40:59.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:00.047 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:41:00.510 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:41:00.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:00.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:00.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:00.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:00.973 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:41:01.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:01.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:01.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:01.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:01.309 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:41:01.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:01.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:01.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:01.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:01.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:01.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:01.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:01.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:01.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:41:01.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:41:01.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:41:01.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:41:01.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:41:01.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:41:01.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:01.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:01.436 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:41:01.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:01.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:01.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:01.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:01.900 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:41:02.364 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:41:02.827 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:41:03.290 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:41:03.755 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:41:04.217 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:41:04.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:04.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:04.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:04.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:04.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:04.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:04.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:04.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:04.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:04.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:04.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:04.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:04.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:41:04.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:41:04.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:41:04.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:41:04.632 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:41:04.632 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:41:04.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:04.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:04.679 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:41:05.141 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:41:05.603 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:41:05.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:05.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:05.680 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:41:05.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:05.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:05.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:05.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:05.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:41:05.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:41:05.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:41:05.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:41:05.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:41:05.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:41:05.683 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:41:10.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:41:10.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:41:10.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:41:10.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:41:10.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:41:10.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:41:10.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:41:10.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:41:10.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:41:10.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:41:10.688 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:41:10.688 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:41:10.688 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:41:10.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:41:10.689 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:41:10.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:41:10.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:41:10.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:41:10.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:41:10.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:10.689 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:41:10.689 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:41:10.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:41:10.690 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:41:10.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:41:10.690 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:41:10.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:41:10.690 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:41:10.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:10.690 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:41:10.690 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:41:10.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:41:10.691 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:41:10.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:41:10.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:41:10.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:41:10.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:41:10.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:41:10.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:41:10.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:41:10.692 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:41:10.693 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:41:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:41:10.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:41:11.163 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:41:11.206 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:41:11.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:11.206 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:41:11.207 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:41:11.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:11.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:11.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:11.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:11.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:11.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:11.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:11.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:11.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:41:11.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:41:11.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:41:11.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:41:11.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:41:11.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:41:11.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:11.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:11.626 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:41:11.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:11.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:11.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:11.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:12.089 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:41:12.556 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:41:12.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:12.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:12.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:12.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:13.020 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:41:13.482 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:41:13.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:13.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:13.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:13.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:13.945 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:41:14.407 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:41:14.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:14.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:14.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:14.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:14.870 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:41:15.332 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:41:15.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:15.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:15.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:15.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:15.798 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:41:16.264 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:41:16.727 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:41:17.190 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:41:17.652 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:41:18.114 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:41:18.578 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:41:19.043 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:41:19.505 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:41:19.967 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:41:20.429 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:41:20.891 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:41:21.353 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:41:21.816 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:41:22.278 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:41:22.742 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:41:23.207 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:41:23.670 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:41:24.132 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:41:24.595 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:41:25.057 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:41:25.520 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:41:25.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:25.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:25.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:25.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:25.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:25.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:25.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:25.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:25.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:25.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:25.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:25.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:25.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:41:25.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:41:25.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:41:25.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:41:25.841 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:41:25.841 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:41:25.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:25.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:25.983 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:41:26.445 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:41:26.907 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:41:27.369 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:41:27.832 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:41:28.294 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:41:28.756 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:41:29.218 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:41:29.681 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:41:30.143 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:41:30.606 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:41:31.068 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:41:31.531 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:41:31.993 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:41:32.456 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:41:32.918 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:41:33.381 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:41:33.843 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:41:34.307 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:41:34.769 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:41:35.231 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:41:35.693 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:41:36.156 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:41:36.618 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:41:37.080 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:41:37.542 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:41:38.004 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:41:38.467 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:41:38.929 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:41:39.392 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:41:39.854 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:41:40.318 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:41:40.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:40.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:40.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:40.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:40.653 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:41:40.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:40.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:40.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:40.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:40.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:40.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:40.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:40.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:40.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:41:40.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:41:40.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:41:40.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:41:40.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:41:40.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:41:40.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:40.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:40.780 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:41:41.243 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 03:41:41.705 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 03:41:42.168 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 03:41:42.630 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 03:41:43.093 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 03:41:43.555 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 03:41:44.018 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 03:41:44.480 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 03:41:44.945 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 03:41:45.407 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 03:41:45.870 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 03:41:46.332 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 03:41:46.794 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 03:41:47.257 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 03:41:47.719 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 03:41:48.182 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 03:41:48.645 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 03:41:49.108 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 03:41:49.570 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 03:41:50.032 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 03:41:50.496 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 03:41:50.960 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 03:41:51.425 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 03:41:51.887 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 03:41:52.350 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 03:41:52.813 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 03:41:53.278 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 03:41:53.742 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 03:41:54.205 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 03:41:54.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:54.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:54.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:54.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:54.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:54.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:54.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:54.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:54.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:54.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:41:54.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:41:54.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:54.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:41:54.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:41:54.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:41:54.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:41:54.667 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 03:41:54.669 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:41:54.669 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:41:54.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:54.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:41:55.130 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 03:41:55.593 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 03:41:56.055 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 03:41:56.518 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 03:41:56.981 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 03:41:57.444 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 03:41:57.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:41:57.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:41:57.831 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:41:57.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:41:57.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:41:57.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:41:57.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:41:57.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:41:57.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:41:57.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:41:57.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:41:57.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:41:57.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:41:57.833 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:42:02.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:42:02.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:42:02.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:42:02.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:42:02.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:42:02.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:42:02.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:42:02.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:42:02.839 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:42:02.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:42:02.839 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:42:02.840 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:42:02.840 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:42:02.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:42:02.840 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:42:02.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:42:02.840 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:42:02.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:42:02.840 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:42:02.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:02.841 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:42:02.841 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:42:02.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:42:02.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:42:02.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:42:02.841 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:42:02.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:42:02.841 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:42:02.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:02.842 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:42:02.842 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:42:02.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:42:02.842 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:42:02.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:42:02.842 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:42:02.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:42:02.842 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:42:02.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:42:02.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:42:02.844 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:42:02.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:02.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:42:03.312 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:42:03.356 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:42:03.356 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:42:03.356 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:42:03.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:03.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:03.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:03.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:03.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:03.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:03.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:03.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:03.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:03.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:03.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:03.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:42:03.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:42:03.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:03.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:03.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:03.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:03.775 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:42:03.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:03.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:03.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:04.240 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:42:04.705 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:42:04.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:04.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:04.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:04.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:05.168 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:42:05.632 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:42:05.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:05.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:05.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:05.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:06.096 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:42:06.559 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:42:06.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:06.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:06.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:06.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:07.023 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:42:07.486 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:42:07.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:07.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:07.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:07.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:07.950 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:42:08.414 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:42:08.878 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:42:09.342 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:42:09.805 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:42:10.267 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:42:10.731 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:42:11.193 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:42:11.655 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:42:12.117 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:42:12.580 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:42:13.042 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:42:13.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:13.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:13.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:13.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:13.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:13.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:13.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:13.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:13.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:13.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:13.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:13.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:13.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:13.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:13.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:42:13.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:42:13.273 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:42:13.273 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:42:13.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:13.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:13.504 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:42:13.967 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:42:14.429 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:42:14.893 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:42:15.356 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:42:15.821 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:42:16.287 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:42:16.751 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:42:17.215 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:42:17.680 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:42:18.144 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:42:18.610 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:42:19.076 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:42:19.543 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:42:20.006 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:42:20.469 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:42:20.932 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:42:21.397 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:42:21.861 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:42:22.326 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:42:22.790 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:42:23.255 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:42:23.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:23.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:23.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:23.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:23.418 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:42:23.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:23.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:23.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:23.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:23.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:23.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:23.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:23.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:23.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:23.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:23.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:42:23.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:42:23.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:23.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:23.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:23.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:23.722 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:42:24.193 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:42:24.666 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:42:25.134 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:42:25.606 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-22 03:42:26.079 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-22 03:42:26.552 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-22 03:42:27.024 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-22 03:42:27.494 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-22 03:42:27.965 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-22 03:42:28.438 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-22 03:42:28.911 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-22 03:42:29.383 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-22 03:42:29.849 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-22 03:42:30.314 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-22 03:42:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:30.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:30.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:30.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:30.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:30.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:30.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:30.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:30.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:30.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:30.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:30.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:30.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:30.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:30.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:42:30.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:42:30.405 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:42:30.405 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:42:30.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:30.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:30.778 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-22 03:42:31.245 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-22 03:42:31.709 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-22 03:42:32.174 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-22 03:42:32.639 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-22 03:42:33.103 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-22 03:42:33.574 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-22 03:42:34.042 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-22 03:42:34.509 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-22 03:42:34.973 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-22 03:42:35.437 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-22 03:42:35.904 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-22 03:42:36.373 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-22 03:42:36.837 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-22 03:42:37.302 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-22 03:42:37.768 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-22 03:42:38.235 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-22 03:42:38.701 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-22 03:42:39.173 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-22 03:42:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-22 03:42:40.114 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-22 03:42:40.579 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-22 03:42:41.052 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-22 03:42:41.521 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-22 03:42:41.991 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-22 03:42:42.455 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-22 03:42:42.920 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-22 03:42:43.385 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-22 03:42:43.857 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-22 03:42:44.326 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-22 03:42:44.789 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-22 03:42:45.251 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-22 03:42:45.713 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-22 03:42:46.175 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-22 03:42:46.637 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-22 03:42:47.099 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-22 03:42:47.562 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-22 03:42:48.024 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-22 03:42:48.486 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-22 03:42:48.948 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-22 03:42:49.419 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-22 03:42:49.892 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-22 03:42:50.359 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-22 03:42:50.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:50.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:50.377 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:42:50.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:50.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:50.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:50.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:50.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:42:50.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:42:50.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:42:50.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:42:50.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:42:50.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:42:50.381 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:42:55.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:42:55.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:42:55.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:42:55.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:42:55.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:42:55.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:42:55.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:42:55.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:42:55.407 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:42:55.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:42:55.407 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:42:55.409 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:42:55.409 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:42:55.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:42:55.410 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:42:55.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:42:55.410 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:42:55.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:42:55.410 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:42:55.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:55.412 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:42:55.412 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:42:55.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:42:55.412 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:42:55.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:42:55.412 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:42:55.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:42:55.413 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:42:55.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:55.416 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:42:55.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:42:55.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:42:55.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:42:55.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:42:55.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:42:55.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:42:55.417 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:42:55.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:55.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:42:55.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:42:55.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:42:55.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:42:55.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:42:55.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:42:55.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:42:55.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:42:55.421 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:42:55.426 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:42:55.895 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:42:55.952 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:42:55.955 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:42:55.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:55.957 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:42:55.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:55.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:55.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:56.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:56.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:56.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:56.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:56.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:56.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:56.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:42:56.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:42:56.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:56.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:56.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:56.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:56.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:56.368 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:42:56.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:56.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:56.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:56.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:56.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:56.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:56.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:56.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:56.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:56.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:42:56.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:42:56.412 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:42:56.412 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:42:56.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:56.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:56.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:56.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:56.832 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:42:56.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:56.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:56.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:56.887 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:42:56.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:56.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:56.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:56.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:56.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:56.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:56.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:56.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:56.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:56.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:42:56.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:42:56.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:56.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:56.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:56.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:57.300 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:42:57.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:57.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:57.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:57.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:57.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:57.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:57.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:57.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:57.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:57.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:57.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:57.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:42:57.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:42:57.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:42:57.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:42:57.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:57.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:42:57.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:42:57.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:42:57.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:42:57.715 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:42:57.715 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:42:57.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:57.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:42:57.770 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:42:58.234 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:42:58.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:58.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:58.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:58.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:58.698 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:42:59.165 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:42:59.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:42:59.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:42:59.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:42:59.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:42:59.630 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:43:00.102 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:43:00.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:00.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:00.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:00.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:00.576 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:43:01.043 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:43:01.514 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:43:01.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:01.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:01.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:01.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:01.785 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:43:01.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:01.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:01.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:01.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:01.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:43:01.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:43:01.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:43:01.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:43:01.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:43:01.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:43:01.798 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:43:06.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:43:06.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:43:06.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:43:06.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:43:06.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:43:06.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:43:06.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:43:06.812 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:43:06.812 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:06.812 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:43:06.812 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:43:06.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:43:06.813 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:43:06.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:43:06.813 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:06.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:43:06.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:43:06.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:43:06.814 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:43:06.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:06.815 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:43:06.815 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:43:06.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:43:06.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:06.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:43:06.815 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:43:06.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:43:06.815 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:43:06.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:06.816 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:43:06.816 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:43:06.816 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:43:06.816 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:06.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:43:06.817 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:43:06.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:43:06.817 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:43:06.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:43:06.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:43:06.819 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:43:06.819 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:43:06.819 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:06.823 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:43:07.287 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:43:07.342 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:43:07.344 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:43:07.345 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:43:07.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:07.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:07.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:07.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:07.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:07.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:07.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:07.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:07.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:07.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:07.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:07.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:07.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:07.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:07.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:07.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:07.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:07.754 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:43:07.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:07.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:07.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:07.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:08.225 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:43:08.696 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:43:08.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:08.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:08.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:08.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:09.167 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:43:09.634 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:43:09.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:09.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:09.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:09.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:10.104 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:43:10.575 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:43:10.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:10.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:10.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:10.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:10.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:10.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:10.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:10.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:10.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:10.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:10.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:10.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:10.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:10.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:10.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:10.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:10.734 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:43:10.735 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:43:10.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:10.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:10.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:10.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:10.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:10.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:11.040 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:43:11.505 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:43:11.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:11.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:11.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:11.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:11.969 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:43:12.434 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:43:12.899 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:43:13.363 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:43:13.828 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:43:14.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:14.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:14.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:14.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:14.075 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:43:14.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:14.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:14.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:14.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:14.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:14.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:14.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:14.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:14.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:14.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:14.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:14.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:14.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:14.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:14.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:14.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:14.294 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:43:14.765 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:43:15.231 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:43:15.702 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:43:16.175 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:43:16.643 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:43:17.114 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:43:17.583 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:43:17.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:17.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:17.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:17.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:17.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:17.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:17.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:17.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:17.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:17.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:17.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:17.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:17.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:17.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:17.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:17.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:17.814 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:43:17.814 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:43:17.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:17.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:18.047 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:43:18.517 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:43:18.989 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:43:19.462 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:43:19.929 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:43:20.394 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:43:20.867 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:43:21.339 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:43:21.811 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:43:21.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:21.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:21.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:21.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:21.895 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:43:21.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:21.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:21.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:21.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:21.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:43:21.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:43:21.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:43:21.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:43:21.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:43:21.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:43:21.911 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:43:21.912 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3287 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.912 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3287 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.912 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3287 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.912 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.912 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.912 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.913 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.913 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3288 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.913 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.913 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.913 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.913 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.913 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.913 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:21.913 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:26.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:43:26.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:43:26.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:43:26.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:43:26.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:43:26.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:43:26.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:43:26.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:43:26.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:26.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:43:26.925 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:43:26.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:43:26.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:43:26.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:43:26.930 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:26.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:43:26.930 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:43:26.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:43:26.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:43:26.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:26.933 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:43:26.933 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:43:26.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:43:26.933 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:26.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:43:26.933 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:43:26.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:43:26.933 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:43:26.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:26.936 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:43:26.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:43:26.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:43:26.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:26.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:43:26.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:43:26.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:43:26.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:43:26.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:26.939 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:43:26.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:43:26.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:43:26.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:43:26.939 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:43:26.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:43:26.940 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:43:26.940 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:43:26.940 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:26.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:26.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:26.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:26.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:26.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:26.945 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:43:27.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:43:27.480 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:43:27.482 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:43:27.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:27.484 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:43:27.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:27.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:27.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:27.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:27.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:27.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:27.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:27.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:27.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:27.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:27.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:27.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:27.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:27.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:27.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:27.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:27.886 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:43:27.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:27.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:27.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:27.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:27.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:27.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:27.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:27.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:27.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:27.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:27.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:27.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:27.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:27.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:27.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:27.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:27.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:27.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:27.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:27.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:27.973 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:43:27.973 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:43:27.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:27.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:28.351 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:43:28.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:28.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:28.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:28.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:28.530 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:43:28.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:28.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:28.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:28.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:28.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:28.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:28.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:28.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:28.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:28.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:28.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:28.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:28.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:28.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:28.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:28.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:28.817 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:43:28.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:28.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:28.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:28.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:29.289 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:43:29.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:29.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:29.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:29.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:29.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:29.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:29.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:29.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:29.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:29.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:29.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:29.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:29.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:29.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:29.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:29.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:29.757 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:43:29.758 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:43:29.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:29.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:29.761 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:43:29.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:29.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:29.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:29.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:30.234 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:43:30.706 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:43:30.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:30.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:30.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:30.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:31.176 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:43:31.644 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:43:31.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:31.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:31.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:31.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:32.109 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:43:32.573 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:43:33.041 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:43:33.514 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:43:33.980 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:43:34.449 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:43:34.915 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:43:35.379 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:43:35.844 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:43:36.313 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:43:36.785 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:43:37.258 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:43:37.731 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:43:38.205 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:43:38.677 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:43:39.142 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:43:39.606 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:43:40.070 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:43:40.538 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:43:41.011 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:43:41.482 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:43:41.946 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:43:42.411 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:43:42.875 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:43:43.340 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-22 03:43:43.804 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-22 03:43:44.269 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-22 03:43:44.733 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-22 03:43:45.198 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-22 03:43:45.662 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-22 03:43:46.128 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-22 03:43:46.593 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-22 03:43:47.064 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-22 03:43:47.535 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-22 03:43:47.999 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-22 03:43:48.464 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-22 03:43:48.928 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-22 03:43:49.400 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-22 03:43:49.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:49.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:49.706 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:43:49.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:49.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:49.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:49.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:49.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:43:49.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:43:49.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:43:49.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:43:49.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:43:49.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:43:49.716 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:43:49.716 [WARNING] transceiver.py:257 (TRX3@172.18.205.20:5700/3) RX TRXD message (ver=1 fn=4965 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.716 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4965 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.716 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4965 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.716 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4965 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.716 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4965 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4965 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4965 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4965 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4966 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4966 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4966 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4966 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4966 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.717 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4966 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.718 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4966 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:49.718 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=4966 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:43:54.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:43:54.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:43:54.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:43:54.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:43:54.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:43:54.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:43:54.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:43:54.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:43:54.725 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:54.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:43:54.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:43:54.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:43:54.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:43:54.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:43:54.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:54.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:43:54.728 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:43:54.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:43:54.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:43:54.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:54.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:43:54.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:43:54.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:43:54.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:54.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:43:54.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:43:54.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:43:54.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:43:54.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:54.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:43:54.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:43:54.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:43:54.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:43:54.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:43:54.733 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:43:54.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:43:54.733 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:43:54.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:54.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:43:54.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:43:54.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:43:54.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:43:54.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:43:54.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:43:54.737 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:43:54.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:54.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:54.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:43:54.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:54.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:54.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:43:54.742 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:43:55.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:43:55.267 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:43:55.269 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:43:55.271 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:43:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:55.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:55.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:55.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:55.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:55.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:55.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:55.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:55.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:55.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:55.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:55.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:55.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:55.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:55.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:55.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:55.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:55.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:43:55.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:55.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:55.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:55.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:56.147 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:43:56.618 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:43:56.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:56.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:56.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:56.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:57.091 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:43:57.564 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:43:57.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:57.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:57.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:57.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:58.032 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:43:58.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:58.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:58.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:58.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:58.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:58.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:58.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:58.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:43:58.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:43:58.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:43:58.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:43:58.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:58.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:43:58.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:43:58.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:43:58.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:43:58.266 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:43:58.266 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:43:58.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:58.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:43:58.497 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:43:58.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:58.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:58.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:58.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:58.962 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:43:59.427 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:43:59.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:43:59.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:43:59.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:43:59.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:43:59.894 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:44:00.358 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:44:00.823 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:44:01.288 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:44:01.753 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:44:02.218 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:44:02.683 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:44:02.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:02.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:02.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:02.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:02.710 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:44:02.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:02.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:02.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:02.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:02.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:02.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:02.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:02.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:02.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:44:02.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:44:02.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:44:02.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:44:02.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:44:02.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:44:02.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:02.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:03.150 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:44:03.621 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:44:04.092 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:44:04.557 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:44:05.023 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:44:05.487 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:44:05.955 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:44:06.427 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:44:06.898 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:44:07.369 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:44:07.839 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:44:08.310 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:44:08.781 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:44:09.250 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:44:09.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:09.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:09.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:09.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:09.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:09.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:09.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:09.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:09.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:09.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:09.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:09.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:09.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:44:09.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:44:09.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:44:09.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:44:09.427 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:44:09.427 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:44:09.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:09.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:09.714 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:44:10.177 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:44:10.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:10.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:10.258 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:44:10.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:10.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:10.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:10.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:10.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:10.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:10.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:10.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:10.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:10.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:10.263 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:44:15.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:15.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:15.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:15.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:15.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:15.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:15.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:15.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:15.274 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:15.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:15.275 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:44:15.277 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:44:15.277 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:44:15.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:15.277 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:15.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:15.278 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:44:15.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:15.278 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:44:15.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:15.280 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:44:15.280 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:44:15.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:15.280 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:15.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:15.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:44:15.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:15.280 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:44:15.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:15.282 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:44:15.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:44:15.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:15.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:15.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:15.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:44:15.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:15.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:44:15.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:15.286 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:44:15.286 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:44:15.286 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:44:15.287 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:15.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:15.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:15.291 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:44:15.768 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:44:15.834 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:44:15.835 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:44:15.836 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:44:15.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:15.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:15.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:15.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:15.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:15.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:15.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:15.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:15.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:15.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:44:15.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:44:15.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:44:15.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:44:15.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:44:15.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:44:15.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:15.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:16.236 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:44:16.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:16.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:16.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:16.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:16.707 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:44:17.178 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:44:17.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:17.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:17.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:17.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:17.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:17.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:17.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:17.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:17.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:17.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:17.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:17.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:17.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:17.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:17.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:17.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:17.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:44:17.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:44:17.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:44:17.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:44:17.648 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:44:17.694 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:44:17.694 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-22 03:44:17.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:17.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:18.120 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:44:18.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:18.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:18.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:18.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:18.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:44:19.057 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:44:19.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:19.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:19.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:19.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:19.521 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:44:19.986 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:44:20.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:20.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:20.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:20.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:20.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:20.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:20.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:20.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:20.386 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:44:20.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:20.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:20.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:20.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:20.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:20.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:20.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:20.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:20.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:44:20.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:44:20.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:44:20.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:44:20.451 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:44:20.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:44:20.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:44:20.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:20.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:20.918 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:44:21.383 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:44:21.851 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:44:22.316 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:44:22.780 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:44:23.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:44:23.717 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:44:24.188 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:44:24.659 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:44:24.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:24.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:24.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:24.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:24.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:24.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:24.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:24.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:24.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:24.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:44:24.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:24.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:24.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:44:24.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:44:24.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:44:24.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:44:24.894 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.205.22:6700) Recv SETFH cmd
2026-04-22 03:44:24.894 [INFO] transceiver.py:201 (MS@172.18.205.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-22 03:44:24.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:24.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:44:25.125 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:44:25.590 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:44:26.054 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:44:26.519 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:44:26.983 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:44:27.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:44:27.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:44:27.066 [INFO] transceiver.py:205 (MS@172.18.205.22:6700) Frequency hopping disabled
2026-04-22 03:44:27.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:27.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:27.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:27.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:27.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:27.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:27.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:27.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:27.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:27.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:27.068 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2570 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2570 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2570 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2570 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2570 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2571 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2571 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2571 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2571 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:27.068 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=2571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:32.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:32.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:32.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:32.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:32.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:32.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:32.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:32.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:32.084 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:32.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:32.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:44:32.086 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:44:32.086 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:44:32.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:32.086 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:32.086 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:44:32.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:32.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:32.087 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:44:32.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:32.089 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:44:32.089 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:44:32.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:32.089 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:32.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:44:32.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:32.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:32.090 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:44:32.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:32.092 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:44:32.092 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:44:32.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:32.092 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:32.092 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:44:32.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:32.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:32.092 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:44:32.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:44:32.096 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:44:32.096 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:44:32.096 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:32.101 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:44:32.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:44:32.610 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:44:32.611 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:44:32.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:32.611 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:44:32.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:32.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:32.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:32.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:32.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:32.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:44:33.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:33.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:33.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:33.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:33.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.517 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:44:33.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:33.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:33.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:33.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:33.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:33.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:33.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:33.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:33.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:33.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:33.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:33.929 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:44:33.929 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=397 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:33.929 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:33.929 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:33.929 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:33.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:33.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:33.930 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:38.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:38.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:38.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:38.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:38.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:38.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:38.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:38.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:38.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:38.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:38.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:44:38.937 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:44:38.937 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:44:38.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:38.938 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:38.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:38.938 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:44:38.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:38.938 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:44:38.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:38.939 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:44:38.939 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:44:38.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:38.939 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:38.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:38.939 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:44:38.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:38.939 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:44:38.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:38.940 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:44:38.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:44:38.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:38.940 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:38.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:38.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:44:38.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:38.940 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:44:38.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:44:38.942 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:44:38.942 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:44:38.942 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:38.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:38.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:38.947 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:44:39.419 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:44:39.474 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:44:39.474 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:44:39.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.477 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:44:39.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:39.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:44:39.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:39.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:39.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:39.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:40.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.347 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:44:40.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.811 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:44:40.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:40.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:40.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:40.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:40.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:40.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:40.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:40.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:40.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:40.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:40.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:40.836 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:44:40.836 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=415 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.837 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=416 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:40.838 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=416 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:45.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:45.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:45.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:45.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:45.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:45.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:45.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:45.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:45.853 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:45.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:45.853 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:44:45.855 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:44:45.855 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:44:45.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:45.855 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:45.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:45.856 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:44:45.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:45.856 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:44:45.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:45.857 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:44:45.857 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:44:45.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:45.857 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:45.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:45.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:44:45.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:45.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:44:45.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:45.858 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:44:45.858 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:44:45.858 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:45.859 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:45.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:45.859 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:44:45.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:45.859 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:44:45.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:45.861 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:44:45.861 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:44:45.861 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:44:45.861 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:45.866 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:44:46.333 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:44:46.392 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:44:46.395 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:44:46.397 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:44:46.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:46.805 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:44:46.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:46.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:46.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:46.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:47.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.272 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:44:47.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:47.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:47.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:47.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:47.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:47.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:47.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:47.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:47.742 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:44:47.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:47.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:47.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:47.744 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:47.744 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:52.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:52.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:52.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:52.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:52.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:52.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:52.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:52.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:52.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:52.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:52.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:44:52.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:44:52.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:44:52.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:52.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:52.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:52.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:44:52.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:52.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:44:52.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:52.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:44:52.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:44:52.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:52.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:52.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:52.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:44:52.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:52.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:44:52.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:52.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:44:52.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:44:52.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:52.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:52.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:52.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:44:52.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:52.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:44:52.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:52.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:44:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:44:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:44:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:44:52.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:44:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:44:52.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:44:52.771 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:44:52.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:52.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:52.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:52.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:44:53.248 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:44:53.308 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:44:53.310 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:44:53.312 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:44:53.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:53.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:53.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:53.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:53.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:53.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:53.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:44:53.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:53.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:53.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:53.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:53.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:53.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:53.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:54.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:54.176 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:44:54.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:54.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:54.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:54.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:54.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:54.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:44:54.643 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:44:54.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:54.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:54.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:54.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:54.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:54.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:54.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:54.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:54.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:54.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:54.648 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:54.648 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:44:59.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:44:59.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:44:59.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:59.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:59.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:59.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:59.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:44:59.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:59.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:59.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:44:59.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:44:59.662 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:44:59.663 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:44:59.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:59.663 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:59.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:44:59.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:44:59.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:44:59.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:44:59.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:44:59.665 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:44:59.665 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:44:59.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:59.666 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:59.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:44:59.666 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:44:59.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:44:59.666 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:44:59.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:44:59.668 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:44:59.668 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:44:59.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:59.668 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:44:59.668 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:44:59.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:44:59.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:44:59.668 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:44:59.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:59.671 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:44:59.672 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:44:59.672 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:44:59.672 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:44:59.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:44:59.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:59.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:44:59.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:59.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:59.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:59.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:44:59.676 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:00.150 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:00.207 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:00.210 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:00.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.212 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:00.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:00.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.616 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:45:00.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:00.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:00.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:00.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:00.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:00.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:01.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:45:01.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:01.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:01.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:01.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:01.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:01.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:01.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:01.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:01.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:01.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:01.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:01.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:01.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:01.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:01.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:01.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:01.538 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:01.538 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:01.538 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:01.538 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:01.538 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:01.538 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:06.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:06.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:06.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:06.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:06.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:06.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:06.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:06.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:06.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:06.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:06.559 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:06.560 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:06.560 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:06.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:06.560 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:06.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:06.560 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:06.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:06.560 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:06.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:06.562 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:06.562 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:06.562 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:06.562 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:06.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:06.562 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:06.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:06.563 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:06.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:06.564 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:06.564 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:06.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:06.564 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:06.564 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:06.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:06.564 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:06.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:06.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:06.568 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:06.568 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:06.568 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:06.568 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:06.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:06.573 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:07.045 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:07.100 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:07.102 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:07.103 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:07.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:07.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:45:07.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:07.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:07.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:07.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:07.977 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:45:08.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:08.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:08.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:08.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:08.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:08.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:08.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:08.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:08.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:08.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:08.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:08.441 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:08.441 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:08.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:08.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:08.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:08.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:08.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:08.442 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:13.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:13.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:13.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:13.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:13.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:13.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:13.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:13.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:13.457 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:13.458 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:13.458 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:13.460 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:13.460 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:13.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:13.461 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:13.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:13.462 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:13.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:13.462 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:13.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:13.463 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:13.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:13.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:13.464 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:13.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:13.464 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:13.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:13.464 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:13.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:13.466 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:13.466 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:13.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:13.466 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:13.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:13.466 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:13.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:13.466 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:13.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:13.469 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:13.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:13.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:13.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:13.469 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:13.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:13.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:13.470 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:13.470 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:13.470 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:13.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:13.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:13.475 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:13.951 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:14.002 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:14.004 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:14.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.005 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:14.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:14.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:45:14.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:14.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:14.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:14.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:14.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:45:14.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:14.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:15.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:15.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:15.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:15.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:15.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:15.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:15.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:15.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:15.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:15.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:15.347 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:45:15.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:15.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:15.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:15.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:15.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:15.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:15.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:15.349 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:20.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:20.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:20.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:20.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:20.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:20.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:20.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:20.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:20.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:20.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:20.361 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:20.362 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:20.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:20.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:20.363 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:20.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:20.363 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:20.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:20.363 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:20.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:20.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:20.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:20.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:20.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:20.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:20.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:20.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:20.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:20.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:20.366 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:20.366 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:20.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:20.366 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:20.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:20.366 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:20.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:20.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:20.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:20.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:20.369 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:20.369 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:20.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:20.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:20.842 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:20.892 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:20.894 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:20.896 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:20.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:20.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:20.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:20.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:20.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:20.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:20.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:20.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:20.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:20.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:20.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:20.979 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:25.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:25.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:25.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:25.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:25.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:25.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:26.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:26.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:26.006 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:26.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:26.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:26.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:26.011 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:26.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:26.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:26.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:26.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:26.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:26.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:26.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:26.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:26.014 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:26.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:26.014 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:26.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:26.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:26.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:26.015 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:26.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:26.016 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:26.016 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:26.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:26.016 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:26.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:26.016 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:26.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:26.016 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:26.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:26.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:26.020 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:26.020 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:26.020 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:26.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:26.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:26.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:26.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:26.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:26.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:26.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:26.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:26.024 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:26.495 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:26.552 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:26.553 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:26.554 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:26.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:26.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:26.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:26.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:26.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:26.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:26.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:26.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:26.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:26.662 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:26.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:26.663 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:26.663 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=140 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:26.663 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=140 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:26.663 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:26.663 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=140 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:26.663 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=140 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:26.663 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=140 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:26.663 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=140 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:31.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:31.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:31.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:31.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:31.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:31.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:31.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:31.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:31.699 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:31.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:31.700 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:31.706 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:31.707 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:31.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:31.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:31.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:31.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:31.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:31.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:31.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:31.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:31.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:31.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:31.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:31.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:31.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:31.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:31.714 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:31.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:31.717 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:31.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:31.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:31.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:31.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:31.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:31.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:31.718 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:31.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:31.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:31.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:31.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:31.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:31.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:31.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:31.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:31.723 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:31.724 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:31.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:31.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:31.728 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:32.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:32.254 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:32.256 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:32.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.259 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:32.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:32.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:32.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:32.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:32.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:32.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:32.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:32.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:32.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:32.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:32.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:32.356 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:32.356 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:32.356 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:32.356 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:32.356 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:32.356 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:45:37.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:37.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:37.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:37.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:37.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:37.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:37.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:37.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:37.372 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:37.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:37.372 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:37.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:37.374 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:37.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:37.374 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:37.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:37.374 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:37.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:37.374 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:37.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:37.376 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:37.376 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:37.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:37.376 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:37.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:37.376 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:37.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:37.376 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:37.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:37.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:37.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:37.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:37.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:37.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:37.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:37.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:37.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:37.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:37.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:37.380 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:37.380 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:37.385 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:37.857 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:37.907 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:37.909 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:37.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.912 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:37.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:37.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:37.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:37.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:37.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:37.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:37.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:37.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:37.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:37.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:37.991 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:42.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:42.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:42.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:42.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:42.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:42.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:43.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:43.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:43.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:43.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:43.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:43.011 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:43.011 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:43.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:43.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:43.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:43.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:43.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:43.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:43.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:43.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:43.013 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:43.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:43.013 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:43.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:43.013 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:43.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:43.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:43.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:43.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:43.014 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:43.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:43.014 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:43.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:43.014 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:43.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:43.014 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:43.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:43.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:43.017 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:43.017 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:43.017 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:43.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:43.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:43.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:43.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:43.021 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:43.493 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:43.552 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:43.554 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:43.556 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:43.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:43.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:43.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:43.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:43.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:43.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:43.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:43.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:43.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:43.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:43.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:43.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:43.634 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:48.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:48.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:48.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:48.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:48.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:48.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:48.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:48.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:48.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:48.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:48.649 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:48.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:48.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:48.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:48.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:48.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:48.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:48.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:48.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:48.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:48.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:48.656 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:48.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:48.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:48.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:48.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:48.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:48.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:48.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:48.659 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:48.659 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:48.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:48.659 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:48.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:48.659 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:48.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:48.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:48.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:48.662 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:48.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:48.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:48.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:48.662 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:48.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:48.663 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:48.663 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:48.663 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:48.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:48.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:48.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:48.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:48.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:48.668 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:49.137 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:49.196 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:49.197 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:49.198 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:49.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:49.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:49.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:49.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:49.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:49.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:49.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:49.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:49.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:49.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:49.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:49.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:49.293 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:54.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:54.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:54.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:54.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:54.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:54.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:54.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:54.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:54.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:54.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:54.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:54.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:54.318 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:54.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:54.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:54.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:54.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:54.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:54.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:54.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:54.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:54.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:54.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:54.320 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:54.320 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:54.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:54.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:54.320 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:54.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:54.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:54.322 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:54.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:54.322 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:54.322 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:54.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:54.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:54.322 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:54.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:54.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:54.325 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:54.325 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:54.325 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:54.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:54.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:54.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:54.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:54.329 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:45:54.795 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:45:54.853 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:45:54.855 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:45:54.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.858 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:45:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:45:54.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:54.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:54.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:54.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:54.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:54.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:54.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:54.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:54.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:54.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:54.955 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:45:59.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:45:59.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:45:59.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:59.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:59.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:59.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:59.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:45:59.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:59.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:59.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:45:59.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:45:59.977 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:45:59.977 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:45:59.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:59.978 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:59.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:45:59.978 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:45:59.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:45:59.978 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:45:59.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:45:59.981 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:45:59.981 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:45:59.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:59.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:59.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:45:59.981 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:45:59.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:45:59.981 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:45:59.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:45:59.984 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:45:59.984 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:45:59.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:59.984 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:45:59.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:45:59.984 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:45:59.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:45:59.984 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:45:59.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:45:59.987 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:45:59.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:45:59.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:45:59.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:45:59.987 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:45:59.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:45:59.988 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:45:59.988 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:45:59.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:45:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:45:59.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:46:00.464 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:46:00.520 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:46:00.523 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:46:00.525 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:46:00.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:00.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:00.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:00.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:00.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:00.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:00.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:00.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:00.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:00.929 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:46:00.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:00.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:00.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:00.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:01.397 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:46:01.868 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:46:01.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:01.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:01.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:01.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:02.341 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:46:02.814 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:46:02.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:02.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:02.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:03.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:03.286 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:46:03.759 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:46:03.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:03.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:03.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:03.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:03.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:03.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:03.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:03.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:03.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:03.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:03.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:03.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:03.972 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:46:03.972 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=864 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:03.972 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:03.972 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:03.972 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:03.972 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:03.972 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:03.972 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:08.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:08.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:08.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:08.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:08.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:08.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:08.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:08.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:08.988 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:08.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:08.989 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:46:08.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:46:08.995 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:46:08.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:08.996 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:08.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:08.996 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:46:08.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:08.996 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:46:08.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:09.000 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:46:09.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:46:09.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:09.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:09.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:09.001 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:46:09.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:09.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:46:09.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:09.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:46:09.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:46:09.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:09.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:09.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:09.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:46:09.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:09.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:46:09.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:09.009 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:46:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:46:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:46:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:09.010 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:46:09.010 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:46:09.010 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:46:09.011 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:09.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:09.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:09.015 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:46:09.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:46:09.540 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:46:09.541 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:46:09.543 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:46:09.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:09.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:09.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:09.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:09.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:09.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:09.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:09.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:09.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:09.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 03:46:09.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:09.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:09.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:09.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:09.963 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:46:10.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:10.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:10.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:10.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:10.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:10.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:10.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:10.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:10.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:10.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:10.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:10.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:10.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:10.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:10.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:10.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:10.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:10.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:10.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:10.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:10.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:10.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:10.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:10.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:10.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:10.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:10.113 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:46:15.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:15.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:15.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:15.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:15.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:15.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:15.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:15.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:15.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:15.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:15.138 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:46:15.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:46:15.141 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:46:15.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:15.141 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:15.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:15.141 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:46:15.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:15.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:46:15.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:15.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:46:15.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:46:15.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:15.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:15.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:15.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:46:15.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:15.143 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:46:15.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:15.145 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:46:15.145 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:46:15.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:15.145 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:15.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:15.145 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:46:15.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:15.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:46:15.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:15.147 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:46:15.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:46:15.148 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:46:15.148 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:15.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:15.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:46:15.619 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:46:15.676 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:46:15.678 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:46:15.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:15.680 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:46:15.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:15.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:15.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:15.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:15.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:15.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:15.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:15.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:15.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 03:46:15.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:15.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:15.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:15.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:15.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:15.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:15.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:15.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:15.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:15.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:15.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:15.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:15.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:15.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:16.087 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:46:16.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:16.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:16.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:16.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:16.558 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:46:17.028 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:46:17.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:17.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:17.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:17.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:17.502 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:46:17.974 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-22 03:46:18.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:18.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:18.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:18.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:18.444 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-22 03:46:18.909 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-22 03:46:19.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:19.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:19.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:19.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:19.374 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-22 03:46:19.839 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-22 03:46:20.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:20.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:20.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:20.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:20.303 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-22 03:46:20.768 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-22 03:46:21.233 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-22 03:46:21.700 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-22 03:46:22.165 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-22 03:46:22.633 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-22 03:46:23.104 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-22 03:46:23.574 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-22 03:46:24.045 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-22 03:46:24.518 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-22 03:46:24.991 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-22 03:46:25.463 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-22 03:46:25.929 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-22 03:46:26.399 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-22 03:46:26.864 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-22 03:46:27.328 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-22 03:46:27.793 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-22 03:46:28.258 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-22 03:46:28.723 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-22 03:46:29.187 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-22 03:46:29.653 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-22 03:46:30.118 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-22 03:46:30.586 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-22 03:46:31.052 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-22 03:46:31.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:31.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:31.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:31.356 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=3536 tn=0 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.356 [WARNING] transceiver.py:257 (MS@172.18.205.22:6700) RX TRXD message (fn=3536 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:31.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:31.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:31.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:31.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:31.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:31.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:31.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:31.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:31.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:31.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:31.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:31.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:31.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:31.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:31.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:31.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:31.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:31.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:31.440 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3553 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3553 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3553 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3553 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3553 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3553 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3553 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3554 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3554 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3554 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3554 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3554 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3554 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3554 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:31.440 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=3554 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:36.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:36.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:36.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:36.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:36.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:36.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:36.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:36.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:36.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:36.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:36.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:46:36.460 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:46:36.460 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:46:36.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:36.460 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:36.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:46:36.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:36.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:36.461 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:46:36.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:36.462 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:46:36.462 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:46:36.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:36.462 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:36.462 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:46:36.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:36.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:36.462 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:46:36.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:36.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:46:36.463 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:46:36.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:36.463 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:36.463 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:46:36.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:36.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:36.463 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:46:36.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:36.465 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:46:36.466 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:46:36.466 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:46:36.466 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:36.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:36.470 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:46:36.938 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:46:36.989 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:46:36.991 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:46:36.992 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:46:36.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:37.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:37.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:37.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:37.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:37.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:37.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:37.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:37.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:37.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 03:46:37.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:37.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:37.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:37.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:37.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:37.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 03:46:37.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:37.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:37.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:37.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:37.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:37.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:37.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:37.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:37.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:37.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:37.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:37.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:37.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:37.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:37.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:37.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:37.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:37.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:37.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:37.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:37.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:37.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:37.373 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:46:37.373 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=198 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:37.373 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=198 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:37.373 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=198 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:37.373 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=198 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:37.373 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=198 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:37.373 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=198 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:37.373 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=198 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:42.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:42.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:42.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:42.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:42.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:42.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:42.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:42.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:42.390 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:42.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:42.390 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:46:42.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:46:42.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:46:42.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:42.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:42.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:42.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:46:42.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:42.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:46:42.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:42.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:46:42.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:46:42.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:42.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:42.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:42.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:46:42.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:42.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:46:42.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:42.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:46:42.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:46:42.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:42.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:42.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:42.394 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:46:42.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:42.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:46:42.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:46:42.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:46:42.396 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:46:42.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:42.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:42.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-22 03:46:42.871 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-22 03:46:42.928 [DEBUG] fake_trx.py:278 (BTS@172.18.205.20:5700) Recv FAKE_TOA cmd
2026-04-22 03:46:42.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:42.929 [DEBUG] fake_trx.py:297 (BTS@172.18.205.20:5700) Recv FAKE_RSSI cmd
2026-04-22 03:46:42.930 [DEBUG] fake_trx.py:322 (BTS@172.18.205.20:5700) Recv FAKE_CI cmd
2026-04-22 03:46:42.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:42.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:42.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:42.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:42.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:42.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:42.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:42.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:42.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD HANDOVER
2026-04-22 03:46:42.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:42.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:42.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:42.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:43.339 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-22 03:46:43.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:43.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:43.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:43.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:43.812 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-22 03:46:44.285 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-22 03:46:44.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:44.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:44.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:44.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:44.757 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-22 03:46:44.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:44.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:44.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:44.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD ECHO
2026-04-22 03:46:44.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.205.22:6700) Ignore CMD SETSLOT
2026-04-22 03:46:44.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.205.22:6700) Recv RXTUNE cmd
2026-04-22 03:46:44.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.205.22:6700) Recv TXTUNE cmd
2026-04-22 03:46:44.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.205.22:6700) Recv POWERON CMD
2026-04-22 03:46:44.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.205.22:6700) Starting transceiver...
2026-04-22 03:46:45.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD NOHANDOVER
2026-04-22 03:46:45.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.205.22:6700) Recv POWEROFF cmd
2026-04-22 03:46:45.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.205.22:6700) Stopping transceiver...
2026-04-22 03:46:45.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:45.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:45.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:45.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:45.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:45.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:45.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:45.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:45.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:45.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:45.048 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:46:45.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=575 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:45.048 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=575 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:45.049 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=575 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:45.049 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=575 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:45.049 [WARNING] transceiver.py:257 (BTS@172.18.205.20:5700) RX TRXD message (ver=1 fn=575 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-22 03:46:50.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:50.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:50.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:50.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:50.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:50.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:50.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:50.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:50.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:50.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:50.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:46:50.055 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:46:50.055 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:46:50.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:50.055 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:50.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:50.055 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:46:50.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:50.055 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:46:50.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:50.056 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:46:50.056 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:46:50.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:50.056 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:50.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:50.056 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:46:50.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:50.056 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:46:50.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:50.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:46:50.057 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:46:50.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:50.057 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:50.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:50.057 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:46:50.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:50.057 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:46:50.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:46:50.058 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:46:50.058 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:46:50.058 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:50.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:50.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:50.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:50.060 [INFO] transceiver.py:246 Stopping clock generator
2026-04-22 03:46:55.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:55.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:55.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:55.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:55.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:55.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:55.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:55.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:55.066 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.205.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:55.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.205.20:5700) Recv SETFORMAT cmd
2026-04-22 03:46:55.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.205.20:5700) TRXD header version 1 -> 1
2026-04-22 03:46:55.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.205.20:5700/1) Recv RXTUNE cmd
2026-04-22 03:46:55.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.205.20:5700/1) Recv TXTUNE cmd
2026-04-22 03:46:55.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:55.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.205.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:55.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:55.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.205.20:5700/1) Recv NOMTXPOWER cmd
2026-04-22 03:46:55.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.205.20:5700/1) Recv SETFORMAT cmd
2026-04-22 03:46:55.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.205.20:5700/1) TRXD header version 1 -> 1
2026-04-22 03:46:55.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.205.20:5700/1) Recv SETPOWER cmd
2026-04-22 03:46:55.067 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.205.20:5700/2) Recv RXTUNE cmd
2026-04-22 03:46:55.067 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.205.20:5700/2) Recv TXTUNE cmd
2026-04-22 03:46:55.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:55.067 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.205.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:55.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:55.067 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.205.20:5700/2) Recv NOMTXPOWER cmd
2026-04-22 03:46:55.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.205.20:5700/2) Recv SETFORMAT cmd
2026-04-22 03:46:55.068 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.205.20:5700/2) TRXD header version 1 -> 1
2026-04-22 03:46:55.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.205.20:5700/2) Recv SETPOWER cmd
2026-04-22 03:46:55.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.205.20:5700/3) Recv RXTUNE cmd
2026-04-22 03:46:55.068 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.205.20:5700/3) Recv TXTUNE cmd
2026-04-22 03:46:55.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:55.068 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.205.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-22 03:46:55.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:55.068 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.205.20:5700/3) Recv NOMTXPOWER cmd
2026-04-22 03:46:55.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.205.20:5700/3) Recv SETFORMAT cmd
2026-04-22 03:46:55.068 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.205.20:5700/3) TRXD header version 1 -> 1
2026-04-22 03:46:55.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.205.20:5700/3) Recv SETPOWER cmd
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.205.20:5700) Recv RXTUNE cmd
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETTSC
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETTSC
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETTSC
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.205.20:5700) Recv TXTUNE cmd
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETRXGAIN
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETRXGAIN
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETRXGAIN
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETTSC
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.205.20:5700) Recv NOMTXPOWER cmd
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.205.20:5700) Recv SETPOWER cmd
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.205.20:5700) Recv POWERON CMD
2026-04-22 03:46:55.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.205.20:5700) Starting transceiver...
2026-04-22 03:46:55.070 [INFO] transceiver.py:243 Starting clock generator
2026-04-22 03:46:55.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:55.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETRXGAIN
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.205.20:5700/1) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.205.20:5700/1) Recv RFMUTE cmd
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.205.20:5700/2) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.205.20:5700/3) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.205.20:5700/2) Recv RFMUTE cmd
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.205.20:5700) Ignore CMD SETSLOT
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.205.20:5700/3) Recv RFMUTE cmd
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.205.20:5700) Recv RFMUTE cmd
2026-04-22 03:46:55.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.205.20:5700) Recv POWEROFF cmd
2026-04-22 03:46:55.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.205.20:5700) Stopping transceiver...
2026-04-22 03:46:55.071 [INFO] transceiver.py:246 Stopping clock generator