(launched: 2018-03-03_05:36:13.270568)
20180109030512358 [1;33mDLCTRL[0;m <0017> control_if.c:854 CTRL at 127.0.0.1 4238
[0;m20180109030512359 [1;33mDLGLOBAL[0;m <0010> telnet_interface.c:104 telnet at 127.0.0.1 4241
[0;m20180109030512362 [1;33mDLINP[0;m <0012> input/ipaccess.c:887 enabling ipaccess BTS mode, OML connecting to 10.42.42.7:3002
[0;m20180109030512363 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 4 received
[0;m20180109030512363 [1;32mDL1C[0;m <0006> phy_link.c:58 PHY link state change shutdown -> connecting
[0;m20180109030512364 [1;32mDL1C[0;m <0006> l1_if.c:1617 sysmoBTSv2 L1IF compiled against API headers v5.1.0
[0;m20180109030513540 [1;31mDL1C[0;m <0006> l1_if.c:1599 Failed to read from EEPROM.
[0;m20180109030513565 [1;31mDL1C[0;m <0006> l1_if.c:1570 Unable to read band support from EEPROM, assuming all bands
[0;m20180109030513566 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim LAYER1-RESET.req
[0;m20180109030513566 [1;32mDL1C[0;m <0006> phy_link.c:58 PHY link state change connecting -> connected
[0;m20180109030513566 [1;32mDL1C[0;m <0006> phy_link.c:68 trx_set_avail(1)
[0;m20180109030513567 [1;33mDLINP[0;m <0012> input/ipa.c:131 10.42.42.7:3002 connection done
[0;m20180109030513568 [1;33mDLINP[0;m <0012> input/ipaccess.c:708 received ID get from 1/0/0
[0;m20180109030513568 [1;32mDABIS[0;m <000d> abis.c:101 OML Signalling link up
[0;m[1;36m20180109030513569 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=SITE-MANAGER INST=(ff,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109030513570 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109030513570 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSE INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109030513570 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-CELL INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109030513571 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109030513571 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,01,ff) Tx STATE CHG REP
[0;m[1;36m20180109030513571 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109030513571 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109030513572 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m[1;36m20180109030513572 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180109030513572 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180109030513572 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180109030513572 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180109030513573 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180109030513573 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180109030513573 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180109030513574 [1;33mDL1C[0;m <0006> l1_if.c:1491 Rx L1-RESET.conf (status=Success)
[0;m20180109030513574 [1;32mDL1C[0;m <0006> l1_if.c:1528 Tx SET-TRACE-FLAGS.req (0x00000000)
[0;m20180109030513575 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SYSTEM-INFO.req
[0;m20180109030513576 [1;32mDL1C[0;m <0006> l1_if.c:1432 DSP v5.1.1, FPGA v5.1.0
n[0;m20180109030513576 [1;32mDL1C[0;m <0006> l1_if.c:1301 Using external attenuator.
[0;m20180109030513576 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim ACTIVATE-RF.req
[0;m20180109030514360 [1;33mDL1C[0;m <0006> calib_file.c:205 MAC Address is 24:62:78:00:03:c3 -> NO FIXUP
[0;m20180109030514361 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m[1;36m20180109030514361 [1;34mDOML[0;m[1;36m <0001> oml.c:539 OC=BTS(01) INST=(ff,ff,ff) [0;m[1;36mRx GET ATTR
[0;m[1;36m20180109030514362 [1;32mDOML[0;m[1;36m <0001> oml.c:277 BTS Tx Get Attribute Response
[0;m[1;36m20180109030514371 [1;34mDOML[0;m[1;36m <0001> oml.c:539 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx GET ATTR
[0;m[1;36m20180109030514372 [1;32mDOML[0;m[1;36m <0001> oml.c:277 BASEBAND-TRANSCEIVER Tx Get Attribute Response
[0;m[1;36m20180109030514372 [1;31mDOML[0;m[1;36m <0001> oml.c:229 O&M Get Attributes [0], Manufacturer Dependent State is unsupported by TRX.
[0;m[1;36m20180109030514374 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=SITE-MANAGER(00) INST=(ff,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030514374 [1;34mDOML[0;m[1;36m <0001> oml.c:1008 ... automatic ACK, OP state already was Enabled
[0;m[1;36m20180109030514375 [1;34mDOML[0;m[1;36m <0001> oml.c:579 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx SET BTS ATTR
[0;m[1;36m20180109030514376 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[0] (150 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514376 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[1] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514376 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[2] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514376 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[3] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514376 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[4] (520 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514376 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[5] (165 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514377 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[6] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514377 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030514378 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030514379 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030514379 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BTS INST=(00,ff,ff) OPER STATE NULL -> Enabled
[0;m[1;36m20180109030514380 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109030514380 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BTS INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030514380 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109030514380 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-NSE INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030514380 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSE INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109030514381 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-CELL INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030514381 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-CELL INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109030514381 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-NSVC INST=(00,00,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030514381 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109030514425 [1;34mDOML[0;m[1;36m <0001> oml.c:579 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx SET BTS ATTR
[0;m[1;36m20180109030514425 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[0] (150 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514425 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[1] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514425 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[2] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514426 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[3] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514426 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[4] (520 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514426 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[5] (165 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514426 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[6] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109030514426 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030514427 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030514428 [1;33mDOML[0;m[1;36m <0001> oml.c:1051 ADM state already was Unlocked
[0;m[1;36m20180109030514429 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030514429 [1;34mDOML[0;m[1;36m <0001> oml.c:1008 ... automatic ACK, OP state already was Enabled
[0;m20180109030514629 [1;32mDL1C[0;m <0006> l1_if.c:1205 Rx RF-ACT.conf (status=Success)
[0;m20180109030514629 [1;32mDL1C[0;m <0006> main.c:120 Set global status #0 to 1 (0000 -> 0001), LEDs: ACT 1
[0;m[1;36m20180109030514630 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE Power off -> OK
[0;m[1;36m20180109030514630 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE NULL -> Disabled
[0;m[1;36m20180109030514630 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109030514630 [1;32mDOML[0;m[1;36m <0001> oml.c:457 OC=RADIO-CARRIER INST=(00,00,ff) Tx SW ACT REP
[0;m[1;36m20180109030514631 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) AVAIL STATE Power off -> OK
[0;m[1;36m20180109030514631 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109030514631 [1;32mDOML[0;m[1;36m <0001> oml.c:457 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx SW ACT REP
[0;m[1;36m20180109030514631 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,00) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109030514631 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,00) OPER STATE NULL -> Disabled
[0;m[1;36m20180109030514632 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m[1;36m20180109030514632 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,01) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109030514632 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,01) OPER STATE NULL -> Disabled
[0;m[1;36m20180109030514632 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180109030514632 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,02) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109030514633 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,02) OPER STATE NULL -> Disabled
[0;m[1;36m20180109030514633 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180109030514633 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,03) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109030514633 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,03) OPER STATE NULL -> Disabled
[0;m[1;36m20180109030514633 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180109030514633 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,04) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109030514634 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,04) OPER STATE NULL -> Disabled
[0;m[1;36m20180109030514634 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180109030514634 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,05) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109030514634 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,05) OPER STATE NULL -> Disabled
[0;m[1;36m20180109030514634 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180109030514635 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,06) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109030514635 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,06) OPER STATE NULL -> Disabled
[0;m[1;36m20180109030514635 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180109030514635 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,07) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109030514635 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,07) OPER STATE NULL -> Disabled
[0;m[1;36m20180109030514635 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180109030514636 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_850.cfg loaded (src: eeprom)
[0;m20180109030514637 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109030514638 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_900.cfg loaded (src: eeprom)
[0;m20180109030514638 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109030514639 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_1800.cfg loaded (src: eeprom)
[0;m20180109030514640 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109030514641 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_1900.cfg loaded (src: eeprom)
[0;m20180109030514641 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109030514642 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_850.cfg loaded (src: eeprom)
[0;m20180109030514642 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109030514643 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_900.cfg loaded (src: eeprom)
[0;m20180109030514644 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109030514644 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_1800.cfg loaded (src: eeprom)
[0;m20180109030514645 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109030514646 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_1900.cfg loaded (src: eeprom)
[0;m20180109030514646 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180109030514647 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_850.cfg loaded (src: eeprom)
[0;m20180109030514647 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180109030514648 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_900.cfg loaded (src: eeprom)
[0;m20180109030514649 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m[1;36m20180109030514650 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m20180109030514650 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_1800.cfg loaded (src: eeprom)
[0;m20180109030514650 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180109030514651 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_1900.cfg loaded (src: eeprom)
[0;m20180109030514651 [1;32mDL1C[0;m <0006> calib_file.c:440 L1 calibration table loading complete!
[0;m[1;36m20180109030514683 [1;34mDOML[0;m[1;36m <0001> oml.c:749 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx SET RADIO CARRIER ATTR
[0;m[1;36m20180109030514683 [1;32mDOML[0;m[1;36m <0001> oml.c:781 Set RF Max Power Reduction = 0 dBm
[0;m[1;36m20180109030514683 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030514685 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030514685 [1;33mDOML[0;m[1;36m <0001> oml.c:1051 ADM state already was Unlocked
[0;m20180109030514685 [1;32mDL1C[0;m <0006> l1_if.c:1391 Tx RF-MUTE.req (0, 0, 0, 0, 0, 0, 0, 0)
[0;m20180109030514685 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim MUTE-RF.req
[0;m20180109030514686 [1;32mDL1C[0;m <0006> l1_if.c:1364 Rx RF-MUTE.conf with status=Success
[0;m20180109030514686 [1;32mDL1C[0;m <0006> main.c:120 Set global status #1 to 0 (0001 -> 0001), LEDs: ACT 1
[0;m[1;36m20180109030514687 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m20180109030514688 [1;33mDL1C[0;m <0006> oml.c:423 Init TRX (ARFCN 868, TSC 7, RxPower -75.000000 dBm, TxPower  0.00 dBm
[0;m20180109030514689 [1;32mDL1C[0;m <0006> oml.c:343 Rx MPH-INIT.conf (status=Success)
[0;m20180109030514689 [1;32mDL1C[0;m <0006> tx_power.c:248 power_ramp_start(cur=0, tgt=23000)
[0;m[1;36m20180109030514689 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE OK -> OK
[0;m[1;36m20180109030514689 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109030514690 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109030514732 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030514733 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030514734 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) OPER STATE NULL -> Enabled
[0;m[1;36m20180109030514734 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109030514776 [1;34mDOML[0;m[1;36m <0001> oml.c:1408 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx IPACCESS(0xe0): [0;m[1;36m20180109030514777 [1;32mDOML[0;m[1;36m <0001> oml.c:1365 Rx IPA RSL CONNECT IP=10.42.42.7 PORT=3003 STREAM=0x00
[0;m[1;36m20180109030514778 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m20180109030514779 [1;33mDLINP[0;m <0012> input/ipa.c:131 10.42.42.7:3003 connection done
[0;m[1;36m20180109030514780 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109030514780 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,00) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109030514780 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m20180109030514781 [1;33mDLINP[0;m <0012> input/ipaccess.c:708 received ID get from 1/0/0
[0;m20180109030514781 [1;32mDABIS[0;m <000d> abis.c:113 RSL Signalling link for TRX0 up
[0;m[1;35m20180109030514782 [1;32mDRSL[0;m[1;35m <0000> rsl.c:271 Tx RSL RF RESource INDication
[0;m[1;36m20180109030514784 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030514785 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx OPSTART
[0;m[1;35m20180109030514786 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2543 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109030514786 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI1, 23 bytes)
[0;m[1;38m20180109030514786 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;36m20180109030514787 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,00) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030514787 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,00) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109030514787 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m20180109030514788 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, FCCH [0;mTxDL)
[0;m20180109030514789 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (FCCH [0;mTxDL)
[0;m20180109030514789 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, SCH [0;mTxDL)
[0;m20180109030514790 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (SCH [0;mTxDL)
[0;m20180109030514790 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, BCCH [0;mTxDL)
[0;m20180109030514791 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (BCCH [0;mTxDL)
[0;m20180109030514791 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, AGCH [0;mTxDL)
[0;m20180109030514792 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (AGCH [0;mTxDL)
[0;m20180109030514792 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, PCH [0;mTxDL)
[0;m20180109030514793 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (PCH [0;mTxDL)
[0;m20180109030514793 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, RACH [0;mRxUL)
[0;m20180109030514794 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (RACH [0;mRxUL)
[0;m20180109030514794 [1;32mDL1C[0;m <0006> l1sap.c:579 activate confirm chan_nr=0x40 trx=0
[0;m[1;35m20180109030514794 [1;33mDRSL[0;m[1;35m <0000> rsl.c:648 (bts=0,trx=0,ts=0,ss=0) Tx CHAN ACT ACK
[0;m20180109030514794 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=4) SET_CIPHERING (ALG=0 TxDL)
[0;m20180109030514795 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=4) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m20180109030514796 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=4) SET_CIPHERING (ALG=0 RxUL)
[0;m[1;35m20180109030514796 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2543 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109030514796 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI2, 23 bytes)
[0;m[1;38m20180109030514797 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m20180109030514797 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=4) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m[1;35m20180109030514797 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2543 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109030514798 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2bis)
[0;m[1;38m20180109030514798 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109030514798 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2543 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109030514798 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2ter)
[0;m[1;38m20180109030514799 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109030514799 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2543 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109030514799 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2quater)
[0;m[1;38m20180109030514799 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109030514800 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2543 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109030514800 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI3, 23 bytes)
[0;m[1;38m20180109030514800 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109030514800 [1;32mDRSL[0;m[1;35m <0000> bts.c:405 Updated AGCH max queue length to 12
[0;m[1;35m20180109030514801 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2543 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109030514801 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI4, 23 bytes)
[0;m[1;38m20180109030514801 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109030514801 [1;32mDRSL[0;m[1;35m <0000> rsl.c:555  Rx RSL SACCH FILLING (SI5, 19 bytes)
[0;m[1;38m20180109030514802 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109030514802 [1;32mDRSL[0;m[1;35m <0000> rsl.c:559  Rx RSL Disabling SACCH FILLING (SI5bis)
[0;m[1;38m20180109030514802 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109030514803 [1;32mDRSL[0;m[1;35m <0000> rsl.c:559  Rx RSL Disabling SACCH FILLING (SI5ter)
[0;m[1;38m20180109030514803 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109030514803 [1;32mDRSL[0;m[1;35m <0000> rsl.c:555  Rx RSL SACCH FILLING (SI6, 13 bytes)
[0;m[1;38m20180109030514803 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;36m20180109030514832 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109030514833 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,01) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109030514833 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030514834 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030514835 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030514836 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,01) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030514837 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,01) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109030514837 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180109030514880 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109030514881 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,02) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109030514881 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030514882 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030514883 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030514884 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,02) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030514884 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,02) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109030514884 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180109030514928 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109030514928 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,03) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109030514929 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030514930 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030514932 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030514932 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,03) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030514933 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,03) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109030514933 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180109030514976 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109030514977 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,04) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109030514977 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030514978 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030514980 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030514981 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,04) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030514981 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,04) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109030514981 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180109030515024 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109030515025 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,05) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109030515025 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030515026 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030515027 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030515028 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,05) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030515028 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,05) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109030515029 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180109030515072 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109030515073 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,06) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109030515073 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030515074 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030515075 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030515076 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,06) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030515076 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,06) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109030515077 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180109030515120 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109030515121 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,07) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109030515121 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109030515122 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109030515124 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109030515124 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,07) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109030515125 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,07) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109030515125 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180109030515689 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 2000 mdBm.
[0;m20180109030515690 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 2.000000 dBm
[0;m20180109030516690 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 4000 mdBm.
[0;m20180109030516691 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 4.000000 dBm
[0;m20180109030517692 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 6000 mdBm.
[0;m20180109030517692 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 6.000000 dBm
[0;m20180109030518692 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 8000 mdBm.
[0;m20180109030518693 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 8.000000 dBm
[0;m20180109030519694 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 10000 mdBm.
[0;m20180109030519694 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 10.000000 dBm
[0;m20180109030520695 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 12000 mdBm.
[0;m20180109030520696 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 12.000000 dBm
[0;m20180109030521696 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 14000 mdBm.
[0;m20180109030521697 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 14.000000 dBm
[0;m20180109030522697 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 16000 mdBm.
[0;m20180109030522698 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 16.000000 dBm
[0;m20180109030523698 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 18000 mdBm.
[0;m20180109030523699 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 18.000000 dBm
[0;m20180109030524700 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 20000 mdBm.
[0;m20180109030524700 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 20.000000 dBm
[0;m20180109030525701 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 22000 mdBm.
[0;m20180109030525702 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 22.000000 dBm
[0;m20180109030526702 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 23000 mdBm.
[0;m20180109030526703 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 23.000000 dBm
[0;m[1;35m20180109030552661 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2513 (bts=0,trx=0,ts=0,ss=4) Fwd RLL msg CHAN_RQD from LAPDm to A-bis
[0;m[1;35m20180109030552663 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2599 (bts=0,trx=0,ts=0,ss=1) Rx RSL CHAN_ACTIV
[0;m[1;35m20180109030552663 [1;32mDRSL[0;m[1;35m <0000> rsl.c:1029  chan_nr=0x28 type=0x00 mode=0x00
[0;m20180109030552664 [1;32mDL1C[0;m <0006> l1sap.c:1389 activating channel chan_nr=0x28 trx=0
[0;m20180109030552664 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SDCCH [0;mTxDL)
[0;m20180109030552664 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SDCCH [0;mTxDL)
[0;m20180109030552665 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SDCCH [0;mRxUL)
[0;m20180109030552665 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SDCCH [0;mRxUL)
[0;m20180109030552666 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SACCH [0;mTxDL)
[0;m20180109030552666 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SACCH [0;mTxDL)
[0;m20180109030552667 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SACCH [0;mRxUL)
[0;m20180109030552667 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SACCH [0;mRxUL)
[0;m20180109030552668 [1;32mDL1C[0;m <0006> l1sap.c:579 activate confirm chan_nr=0x28 trx=0
[0;m[1;35m20180109030552668 [1;33mDRSL[0;m[1;35m <0000> rsl.c:648 (bts=0,trx=0,ts=0,ss=1) Tx CHAN ACT ACK
[0;m20180109030552668 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=1) SET_CIPHERING (ALG=0 TxDL)
[0;m20180109030552669 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=1) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m20180109030552669 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=1) SET_CIPHERING (ALG=0 RxUL)
[0;m[1;35m20180109030552670 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2543 (bts=0,trx=0,ts=0,ss=0) Rx RSL IMM_ASS_CMD
[0;m20180109030552670 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=1) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m20180109030553021 [1;33mDLLAPD[0;m <0011> lapd_core.c:920 Store content res. (dl=0xb6d53a24)
[0;m[1;35m20180109030553021 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2513 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg EST_IND from LAPDm to A-bis
[0;m[1;31m20180109030553032 [1;34mDRLL[0;m[1;31m <0002> rsl.c:2337 (bts=0,trx=0,ts=0,ss=1) Rx RLL DATA_REQ Abis -> LAPDm
[0;m[1;35m20180109030553349 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2490 (bts=0,trx=0,ts=0,ss=1) Handing RLL msg UNIT_DATA_IND from LAPDm to MEAS REP
[0;m[1;35m20180109030553349 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2407 (bts=0,trx=0,ts=0,ss=1) chan_num:40 Tx MEAS RES valid(2), flags(03)
[0;m[1;35m20180109030553349 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2425 (bts=0,trx=0,ts=0,ss=1) Send Meas RES: NUM:0, RXLEV_FULL:12, RXLEV_SUB:12, RXQUAL_FULL:6, RXQUAL_SUB:6, MS_PWR:0, UL_TA:0, L3_LEN:18, TimingOff:4294967295
[0;m[1;35m20180109030553492 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2513 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg DATA_IND from LAPDm to A-bis
[0;m[1;31m20180109030553504 [1;34mDRLL[0;m[1;31m <0002> rsl.c:2337 (bts=0,trx=0,ts=0,ss=1) Rx RLL DATA_REQ Abis -> LAPDm
[0;m[1;35m20180109030553819 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2490 (bts=0,trx=0,ts=0,ss=1) Handing RLL msg UNIT_DATA_IND from LAPDm to MEAS REP
[0;m[1;35m20180109030553820 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2407 (bts=0,trx=0,ts=0,ss=1) chan_num:40 Tx MEAS RES valid(2), flags(03)
[0;m[1;35m20180109030553820 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2425 (bts=0,trx=0,ts=0,ss=1) Send Meas RES: NUM:1, RXLEV_FULL:29, RXLEV_SUB:29, RXQUAL_FULL:0, RXQUAL_SUB:0, MS_PWR:0, UL_TA:0, L3_LEN:18, TimingOff:4294967295
[0;m[1;35m20180109030553962 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2513 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg DATA_IND from LAPDm to A-bis
[0;m[1;31m20180109030553994 [1;34mDRLL[0;m[1;31m <0002> rsl.c:2337 (bts=0,trx=0,ts=0,ss=1) Rx RLL DATA_REQ Abis -> LAPDm
[0;m[1;35m20180109030553995 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2599 (bts=0,trx=0,ts=0,ss=1) Rx RSL DEACTIVATE_SACCH
[0;m20180109030553995 [1;32mDL1C[0;m <0006> l1sap.c:1453 deactivating sacch chan_nr=0x28 trx=0
[0;m20180109030553996 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SACCH [0;mTxDL)
[0;m20180109030553997 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SACCH [0;mTxDL)
[0;m20180109030553997 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SACCH [0;mRxUL)
[0;m20180109030553998 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SACCH [0;mRxUL)
[0;m[1;35m20180109030554433 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2513 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg REL_IND from LAPDm to A-bis
[0;m[1;35m20180109030556437 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2599 (bts=0,trx=0,ts=0,ss=1) Rx RSL RF_CHAN_REL
[0;m20180109030556437 [1;32mDL1C[0;m <0006> l1sap.c:1437 deactivating channel chan_nr=0x28 trx=0
[0;m20180109030556437 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SDCCH [0;mRxUL)
[0;m20180109030556438 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SDCCH [0;mRxUL)
[0;m20180109030556438 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SDCCH [0;mTxDL)
[0;m20180109030556439 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SDCCH [0;mTxDL)
[0;m20180109030556439 [1;32mDL1C[0;m <0006> l1sap.c:604 deactivate confirm chan_nr=0x28 trx=0
[0;m[1;35m20180109030556439 [1;33mDRSL[0;m[1;35m <0000> rsl.c:622 (bts=0,trx=0,ts=0,ss=1) Tx RF CHAN REL ACK
[0;m20180109030602949 [1;31mDLINP[0;m <0012> input/ipa.c:69 10.42.42.7:3002 connection closed with server
[0;m20180109030602950 [1;31mDABIS[0;m <000d> abis.c:135 Signalling link down
[0;m20180109030602950 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 2 received
[0;m20180109030602951 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 2 received
[0;m[1;36m20180109030602951 [1;33mDOML[0;m[1;36m <0001> bts.c:239 Shutting down BTS 0, Reason Abis close
[0;m20180109030602951 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim DEACTIVATE-RF.req
[0;m20180109030602951 [1;33mDL1C[0;m <0006> oml.c:452 Close TRX 0
[0;m20180109030602953 [1;32mDL1C[0;m <0006> l1_if.c:1205 Rx RF-DEACT.conf (status=Success)
[0;m20180109030602953 [1;32mDL1C[0;m <0006> main.c:120 Set global status #0 to 0 (0001 -> 0000), LEDs: ACT 0
[0;m[1;36m20180109030602953 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE OK -> Off line
[0;m[1;36m20180109030602954 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE Enabled -> Disabled
[0;m[1;36m20180109030602954 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109030602954 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) AVAIL STATE OK -> Off line
[0;m[1;36m20180109030602954 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) OPER STATE Enabled -> Disabled
[0;m[1;36m20180109030602954 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m