(launched: 2018-03-03_23:36:34.058980)
20180109210533971 [1;33mDLCTRL[0;m <0017> control_if.c:854 CTRL at 127.0.0.1 4238
[0;m20180109210533972 [1;33mDLGLOBAL[0;m <0010> telnet_interface.c:104 telnet at 127.0.0.1 4241
[0;m20180109210533974 [1;33mDLINP[0;m <0012> input/ipaccess.c:887 enabling ipaccess BTS mode, OML connecting to 10.42.42.7:3002
[0;m20180109210533975 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 4 received
[0;m20180109210533976 [1;32mDL1C[0;m <0006> phy_link.c:58 PHY link state change shutdown -> connecting
[0;m20180109210533976 [1;32mDL1C[0;m <0006> l1_if.c:1617 sysmoBTSv2 L1IF compiled against API headers v5.1.0
[0;m20180109210535153 [1;31mDL1C[0;m <0006> l1_if.c:1599 Failed to read from EEPROM.
[0;m20180109210535177 [1;31mDL1C[0;m <0006> l1_if.c:1570 Unable to read band support from EEPROM, assuming all bands
[0;m20180109210535178 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim LAYER1-RESET.req
[0;m20180109210535178 [1;32mDL1C[0;m <0006> phy_link.c:58 PHY link state change connecting -> connected
[0;m20180109210535179 [1;32mDL1C[0;m <0006> phy_link.c:68 trx_set_avail(1)
[0;m20180109210535179 [1;33mDLINP[0;m <0012> input/ipa.c:131 10.42.42.7:3002 connection done
[0;m20180109210535180 [1;33mDLINP[0;m <0012> input/ipaccess.c:708 received ID get from 1/0/0
[0;m20180109210535181 [1;32mDABIS[0;m <000d> abis.c:101 OML Signalling link up
[0;m[1;36m20180109210535181 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=SITE-MANAGER INST=(ff,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535182 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535182 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSE INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535183 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-CELL INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535183 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535183 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,01,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535183 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535184 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535184 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m[1;36m20180109210535184 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180109210535184 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180109210535185 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180109210535185 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180109210535185 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180109210535185 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180109210535185 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180109210535187 [1;33mDL1C[0;m <0006> l1_if.c:1491 Rx L1-RESET.conf (status=Success)
[0;m20180109210535187 [1;32mDL1C[0;m <0006> l1_if.c:1528 Tx SET-TRACE-FLAGS.req (0x00000000)
[0;m20180109210535187 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SYSTEM-INFO.req
[0;m[1;36m20180109210535188 [1;34mDOML[0;m[1;36m <0001> oml.c:539 OC=BTS(01) INST=(ff,ff,ff) [0;m[1;36mRx GET ATTR
[0;m[1;36m20180109210535188 [1;32mDOML[0;m[1;36m <0001> oml.c:277 BTS Tx Get Attribute Response
[0;m20180109210535189 [1;32mDL1C[0;m <0006> l1_if.c:1432 DSP v5.1.1, FPGA v5.1.0
n[0;m20180109210535190 [1;32mDL1C[0;m <0006> l1_if.c:1301 Using external attenuator.
[0;m20180109210535190 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim ACTIVATE-RF.req
[0;m20180109210535974 [1;33mDL1C[0;m <0006> calib_file.c:205 MAC Address is 24:62:78:00:03:c3 -> NO FIXUP
[0;m20180109210535974 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m[1;36m20180109210535981 [1;34mDOML[0;m[1;36m <0001> oml.c:539 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx GET ATTR
[0;m[1;36m20180109210535982 [1;32mDOML[0;m[1;36m <0001> oml.c:277 BASEBAND-TRANSCEIVER Tx Get Attribute Response
[0;m[1;36m20180109210535982 [1;31mDOML[0;m[1;36m <0001> oml.c:229 O&M Get Attributes [0], Manufacturer Dependent State is unsupported by TRX.
[0;m[1;36m20180109210535984 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=SITE-MANAGER(00) INST=(ff,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210535984 [1;34mDOML[0;m[1;36m <0001> oml.c:1008 ... automatic ACK, OP state already was Enabled
[0;m[1;36m20180109210535985 [1;34mDOML[0;m[1;36m <0001> oml.c:579 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx SET BTS ATTR
[0;m[1;36m20180109210535986 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[0] (150 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210535986 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[1] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210535986 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[2] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210535987 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[3] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210535987 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[4] (520 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210535987 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[5] (165 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210535987 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[6] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210535987 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210535989 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210535990 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210535990 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BTS INST=(00,ff,ff) OPER STATE NULL -> Enabled
[0;m[1;36m20180109210535991 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535991 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BTS INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210535991 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535991 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-NSE INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210535991 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSE INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535992 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-CELL INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210535992 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-CELL INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180109210535992 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-NSVC INST=(00,00,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210535992 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109210536037 [1;34mDOML[0;m[1;36m <0001> oml.c:579 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx SET BTS ATTR
[0;m[1;36m20180109210536038 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[0] (150 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210536038 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[1] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210536038 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[2] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210536038 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[3] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210536039 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[4] (520 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210536039 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[5] (165 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210536039 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[6] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180109210536039 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210536040 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536041 [1;33mDOML[0;m[1;36m <0001> oml.c:1051 ADM state already was Unlocked
[0;m[1;36m20180109210536042 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536042 [1;34mDOML[0;m[1;36m <0001> oml.c:1008 ... automatic ACK, OP state already was Enabled
[0;m20180109210536268 [1;32mDL1C[0;m <0006> l1_if.c:1205 Rx RF-ACT.conf (status=Success)
[0;m20180109210536268 [1;32mDL1C[0;m <0006> main.c:120 Set global status #0 to 1 (0000 -> 0001), LEDs: ACT 1
[0;m[1;36m20180109210536269 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE Power off -> OK
[0;m[1;36m20180109210536269 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE NULL -> Disabled
[0;m[1;36m20180109210536269 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109210536269 [1;32mDOML[0;m[1;36m <0001> oml.c:457 OC=RADIO-CARRIER INST=(00,00,ff) Tx SW ACT REP
[0;m[1;36m20180109210536270 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) AVAIL STATE Power off -> OK
[0;m[1;36m20180109210536270 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109210536270 [1;32mDOML[0;m[1;36m <0001> oml.c:457 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx SW ACT REP
[0;m[1;36m20180109210536270 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,00) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109210536270 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,00) OPER STATE NULL -> Disabled
[0;m[1;36m20180109210536270 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m[1;36m20180109210536271 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,01) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109210536271 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,01) OPER STATE NULL -> Disabled
[0;m[1;36m20180109210536271 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180109210536271 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,02) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109210536271 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,02) OPER STATE NULL -> Disabled
[0;m[1;36m20180109210536272 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180109210536272 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,03) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109210536272 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,03) OPER STATE NULL -> Disabled
[0;m[1;36m20180109210536272 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180109210536272 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,04) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109210536272 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,04) OPER STATE NULL -> Disabled
[0;m[1;36m20180109210536273 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180109210536273 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,05) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109210536273 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,05) OPER STATE NULL -> Disabled
[0;m[1;36m20180109210536273 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180109210536273 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,06) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109210536274 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,06) OPER STATE NULL -> Disabled
[0;m[1;36m20180109210536274 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180109210536274 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,07) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180109210536274 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,07) OPER STATE NULL -> Disabled
[0;m[1;36m20180109210536274 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180109210536275 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_850.cfg loaded (src: eeprom)
[0;m20180109210536275 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109210536277 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_900.cfg loaded (src: eeprom)
[0;m20180109210536277 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m[1;36m20180109210536278 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m20180109210536279 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_1800.cfg loaded (src: eeprom)
[0;m20180109210536279 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109210536280 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_1900.cfg loaded (src: eeprom)
[0;m20180109210536280 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109210536281 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_850.cfg loaded (src: eeprom)
[0;m20180109210536282 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109210536283 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_900.cfg loaded (src: eeprom)
[0;m20180109210536283 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109210536284 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_1800.cfg loaded (src: eeprom)
[0;m20180109210536285 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180109210536285 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_1900.cfg loaded (src: eeprom)
[0;m20180109210536286 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180109210536287 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_850.cfg loaded (src: eeprom)
[0;m20180109210536287 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180109210536288 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_900.cfg loaded (src: eeprom)
[0;m20180109210536288 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180109210536289 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_1800.cfg loaded (src: eeprom)
[0;m20180109210536290 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180109210536290 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_1900.cfg loaded (src: eeprom)
[0;m20180109210536291 [1;32mDL1C[0;m <0006> calib_file.c:440 L1 calibration table loading complete!
[0;m[1;36m20180109210536323 [1;34mDOML[0;m[1;36m <0001> oml.c:749 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx SET RADIO CARRIER ATTR
[0;m[1;36m20180109210536324 [1;32mDOML[0;m[1;36m <0001> oml.c:781 Set RF Max Power Reduction = 0 dBm
[0;m[1;36m20180109210536324 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210536326 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536326 [1;33mDOML[0;m[1;36m <0001> oml.c:1051 ADM state already was Unlocked
[0;m20180109210536326 [1;32mDL1C[0;m <0006> l1_if.c:1391 Tx RF-MUTE.req (0, 0, 0, 0, 0, 0, 0, 0)
[0;m20180109210536326 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim MUTE-RF.req
[0;m20180109210536327 [1;32mDL1C[0;m <0006> l1_if.c:1364 Rx RF-MUTE.conf with status=Success
[0;m20180109210536327 [1;32mDL1C[0;m <0006> main.c:120 Set global status #1 to 0 (0001 -> 0001), LEDs: ACT 1
[0;m[1;36m20180109210536329 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m20180109210536329 [1;33mDL1C[0;m <0006> oml.c:423 Init TRX (ARFCN 868, TSC 7, RxPower -75.000000 dBm, TxPower  0.00 dBm
[0;m20180109210536330 [1;32mDL1C[0;m <0006> oml.c:343 Rx MPH-INIT.conf (status=Success)
[0;m20180109210536331 [1;32mDL1C[0;m <0006> tx_power.c:248 power_ramp_start(cur=0, tgt=23000)
[0;m[1;36m20180109210536331 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE OK -> OK
[0;m[1;36m20180109210536331 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109210536331 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109210536377 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536379 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536379 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) OPER STATE NULL -> Enabled
[0;m[1;36m20180109210536379 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109210536425 [1;34mDOML[0;m[1;36m <0001> oml.c:1408 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx IPACCESS(0xe0): [0;m[1;36m20180109210536425 [1;32mDOML[0;m[1;36m <0001> oml.c:1365 Rx IPA RSL CONNECT IP=10.42.42.7 PORT=3003 STREAM=0x00
[0;m[1;36m20180109210536426 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m20180109210536427 [1;33mDLINP[0;m <0012> input/ipa.c:131 10.42.42.7:3003 connection done
[0;m[1;36m20180109210536428 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109210536429 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,00) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109210536429 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m20180109210536429 [1;33mDLINP[0;m <0012> input/ipaccess.c:708 received ID get from 1/0/0
[0;m20180109210536430 [1;32mDABIS[0;m <000d> abis.c:113 RSL Signalling link for TRX0 up
[0;m[1;35m20180109210536430 [1;32mDRSL[0;m[1;35m <0000> rsl.c:271 Tx RSL RF RESource INDication
[0;m[1;36m20180109210536432 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536433 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536434 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,00) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210536434 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,00) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109210536435 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m20180109210536435 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, FCCH [0;mTxDL)
[0;m20180109210536436 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (FCCH [0;mTxDL)
[0;m20180109210536436 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, SCH [0;mTxDL)
[0;m20180109210536437 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (SCH [0;mTxDL)
[0;m20180109210536438 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, BCCH [0;mTxDL)
[0;m20180109210536438 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (BCCH [0;mTxDL)
[0;m20180109210536438 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, AGCH [0;mTxDL)
[0;m20180109210536439 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (AGCH [0;mTxDL)
[0;m20180109210536439 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, PCH [0;mTxDL)
[0;m20180109210536440 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (PCH [0;mTxDL)
[0;m20180109210536440 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, RACH [0;mRxUL)
[0;m20180109210536441 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (RACH [0;mRxUL)
[0;m20180109210536441 [1;32mDL1C[0;m <0006> l1sap.c:579 activate confirm chan_nr=0x40 trx=0
[0;m[1;35m20180109210536441 [1;33mDRSL[0;m[1;35m <0000> rsl.c:648 (bts=0,trx=0,ts=0,ss=0) Tx CHAN ACT ACK
[0;m20180109210536442 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=4) SET_CIPHERING (ALG=0 TxDL)
[0;m20180109210536442 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=4) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m20180109210536443 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=4) SET_CIPHERING (ALG=0 RxUL)
[0;m[1;35m20180109210536443 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109210536444 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI1, 23 bytes)
[0;m[1;38m20180109210536444 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m20180109210536444 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=4) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m[1;35m20180109210536445 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109210536445 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI2, 23 bytes)
[0;m[1;38m20180109210536445 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109210536445 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109210536446 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2bis)
[0;m[1;38m20180109210536446 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109210536446 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109210536447 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2ter)
[0;m[1;38m20180109210536447 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109210536447 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109210536447 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2quater)
[0;m[1;38m20180109210536448 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109210536448 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109210536448 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI3, 23 bytes)
[0;m[1;38m20180109210536448 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109210536448 [1;32mDRSL[0;m[1;35m <0000> bts.c:405 Updated AGCH max queue length to 12
[0;m[1;35m20180109210536449 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180109210536449 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI4, 23 bytes)
[0;m[1;38m20180109210536449 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109210536450 [1;32mDRSL[0;m[1;35m <0000> rsl.c:555  Rx RSL SACCH FILLING (SI5, 19 bytes)
[0;m[1;38m20180109210536450 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109210536450 [1;32mDRSL[0;m[1;35m <0000> rsl.c:559  Rx RSL Disabling SACCH FILLING (SI5bis)
[0;m[1;38m20180109210536450 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109210536451 [1;32mDRSL[0;m[1;35m <0000> rsl.c:559  Rx RSL Disabling SACCH FILLING (SI5ter)
[0;m[1;38m20180109210536451 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180109210536451 [1;32mDRSL[0;m[1;35m <0000> rsl.c:555  Rx RSL SACCH FILLING (SI6, 13 bytes)
[0;m[1;38m20180109210536452 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;36m20180109210536481 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109210536482 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,01) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109210536482 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210536483 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536484 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536485 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,01) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210536485 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,01) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109210536485 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180109210536529 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109210536529 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,02) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109210536529 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210536531 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536532 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536533 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,02) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210536533 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,02) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109210536533 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180109210536577 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109210536578 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,03) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109210536578 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210536579 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536580 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536581 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,03) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210536581 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,03) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109210536581 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180109210536625 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109210536625 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,04) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109210536625 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210536627 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536628 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536629 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,04) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210536629 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,04) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109210536629 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180109210536673 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109210536674 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,05) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109210536674 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210536675 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536676 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536677 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,05) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210536677 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,05) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109210536677 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180109210536721 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109210536722 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,06) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109210536722 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210536723 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536724 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536725 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,06) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210536725 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,06) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109210536725 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180109210536769 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180109210536770 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,07) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180109210536770 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180109210536771 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180109210536772 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx OPSTART
[0;m[1;36m20180109210536773 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,07) AVAIL STATE Dependency -> OK
[0;m[1;36m20180109210536773 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,07) OPER STATE Disabled -> Enabled
[0;m[1;36m20180109210536773 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180109210537331 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 2000 mdBm.
[0;m20180109210537332 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 2.000000 dBm
[0;m20180109210538332 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 4000 mdBm.
[0;m20180109210538333 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 4.000000 dBm
[0;m20180109210539333 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 6000 mdBm.
[0;m20180109210539334 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 6.000000 dBm
[0;m20180109210540334 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 8000 mdBm.
[0;m20180109210540335 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 8.000000 dBm
[0;m20180109210541335 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 10000 mdBm.
[0;m20180109210541336 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 10.000000 dBm
[0;m20180109210542336 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 12000 mdBm.
[0;m20180109210542337 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 12.000000 dBm
[0;m20180109210543338 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 14000 mdBm.
[0;m20180109210543338 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 14.000000 dBm
[0;m20180109210544339 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 16000 mdBm.
[0;m20180109210544339 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 16.000000 dBm
[0;m20180109210545340 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 18000 mdBm.
[0;m20180109210545340 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 18.000000 dBm
[0;m20180109210546341 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 20000 mdBm.
[0;m20180109210546341 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 20.000000 dBm
[0;m20180109210547342 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 22000 mdBm.
[0;m20180109210547343 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 22.000000 dBm
[0;m20180109210548343 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 23000 mdBm.
[0;m20180109210548344 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 23.000000 dBm
[0;m20180109211134952 [1;31mDLINP[0;m <0012> input/ipa.c:69 10.42.42.7:3002 connection closed with server
[0;m20180109211134953 [1;31mDABIS[0;m <000d> abis.c:135 Signalling link down
[0;m20180109211134954 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 2 received
[0;m20180109211134954 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 2 received
[0;m[1;36m20180109211134954 [1;33mDOML[0;m[1;36m <0001> bts.c:239 Shutting down BTS 0, Reason Abis close
[0;m20180109211134954 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim DEACTIVATE-RF.req
[0;m20180109211134955 [1;33mDL1C[0;m <0006> oml.c:452 Close TRX 0
[0;m20180109211134956 [1;32mDL1C[0;m <0006> l1_if.c:1205 Rx RF-DEACT.conf (status=Success)
[0;m20180109211134956 [1;32mDL1C[0;m <0006> main.c:120 Set global status #0 to 0 (0001 -> 0000), LEDs: ACT 0
[0;m[1;36m20180109211134957 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE OK -> Off line
[0;m[1;36m20180109211134957 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE Enabled -> Disabled
[0;m[1;36m20180109211134957 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180109211134957 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) AVAIL STATE OK -> Off line
[0;m[1;36m20180109211134957 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) OPER STATE Enabled -> Disabled
[0;m[1;36m20180109211134958 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m20180109211135111 [1;31mDLINP[0;m <0012> e1_input.c:235 abis_sendmsg: msg->dst == NULL: 0c 12 01 90 0f ff ff 
[0;m