(launched: 2018-03-05_08:23:25.299800)
20180111055226241 [1;33mDLCTRL[0;m <0017> control_if.c:854 CTRL at 127.0.0.1 4238
[0;m20180111055226242 [1;33mDLGLOBAL[0;m <0010> telnet_interface.c:104 telnet at 127.0.0.1 4241
[0;m20180111055226245 [1;33mDLINP[0;m <0012> input/ipaccess.c:887 enabling ipaccess BTS mode, OML connecting to 10.42.42.7:3002
[0;m20180111055226246 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 4 received
[0;m20180111055226247 [1;32mDL1C[0;m <0006> phy_link.c:58 PHY link state change shutdown -> connecting
[0;m20180111055226247 [1;32mDL1C[0;m <0006> l1_if.c:1617 sysmoBTSv2 L1IF compiled against API headers v5.1.0
[0;m20180111055227424 [1;31mDL1C[0;m <0006> l1_if.c:1599 Failed to read from EEPROM.
[0;m20180111055227448 [1;31mDL1C[0;m <0006> l1_if.c:1570 Unable to read band support from EEPROM, assuming all bands
[0;m20180111055227449 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim LAYER1-RESET.req
[0;m20180111055227449 [1;32mDL1C[0;m <0006> phy_link.c:58 PHY link state change connecting -> connected
[0;m20180111055227450 [1;32mDL1C[0;m <0006> phy_link.c:68 trx_set_avail(1)
[0;m20180111055227450 [1;33mDLINP[0;m <0012> input/ipa.c:131 10.42.42.7:3002 connection done
[0;m20180111055227451 [1;33mDLINP[0;m <0012> input/ipaccess.c:708 received ID get from 1/0/0
[0;m20180111055227452 [1;32mDABIS[0;m <000d> abis.c:101 OML Signalling link up
[0;m[1;36m20180111055227452 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=SITE-MANAGER INST=(ff,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111055227453 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111055227453 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSE INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111055227454 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-CELL INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111055227454 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111055227454 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,01,ff) Tx STATE CHG REP
[0;m[1;36m20180111055227454 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111055227455 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111055227455 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m[1;36m20180111055227455 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180111055227455 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180111055227456 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180111055227456 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180111055227456 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180111055227456 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180111055227457 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180111055227458 [1;33mDL1C[0;m <0006> l1_if.c:1491 Rx L1-RESET.conf (status=Success)
[0;m20180111055227458 [1;32mDL1C[0;m <0006> l1_if.c:1528 Tx SET-TRACE-FLAGS.req (0x00000000)
[0;m20180111055227458 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SYSTEM-INFO.req
[0;m[1;36m20180111055227459 [1;34mDOML[0;m[1;36m <0001> oml.c:539 OC=BTS(01) INST=(ff,ff,ff) [0;m[1;36mRx GET ATTR
[0;m[1;36m20180111055227459 [1;32mDOML[0;m[1;36m <0001> oml.c:277 BTS Tx Get Attribute Response
[0;m20180111055227461 [1;32mDL1C[0;m <0006> l1_if.c:1432 DSP v5.1.1, FPGA v5.1.0
n[0;m20180111055227461 [1;32mDL1C[0;m <0006> l1_if.c:1301 Using external attenuator.
[0;m20180111055227461 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim ACTIVATE-RF.req
[0;m20180111055228245 [1;33mDL1C[0;m <0006> calib_file.c:205 MAC Address is 24:62:78:00:03:c3 -> NO FIXUP
[0;m20180111055228245 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m[1;36m20180111055228252 [1;34mDOML[0;m[1;36m <0001> oml.c:539 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx GET ATTR
[0;m[1;36m20180111055228252 [1;32mDOML[0;m[1;36m <0001> oml.c:277 BASEBAND-TRANSCEIVER Tx Get Attribute Response
[0;m[1;36m20180111055228252 [1;31mDOML[0;m[1;36m <0001> oml.c:229 O&M Get Attributes [0], Manufacturer Dependent State is unsupported by TRX.
[0;m[1;36m20180111055228254 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=SITE-MANAGER(00) INST=(ff,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055228254 [1;34mDOML[0;m[1;36m <0001> oml.c:1008 ... automatic ACK, OP state already was Enabled
[0;m[1;36m20180111055228255 [1;34mDOML[0;m[1;36m <0001> oml.c:579 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx SET BTS ATTR
[0;m[1;36m20180111055228256 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[0] (150 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228256 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[1] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228256 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[2] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228256 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[3] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228257 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[4] (520 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228257 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[5] (165 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228257 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[6] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228257 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055228258 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228259 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055228260 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BTS INST=(00,ff,ff) OPER STATE NULL -> Enabled
[0;m[1;36m20180111055228260 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111055228260 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BTS INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228260 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111055228261 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-NSE INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228261 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSE INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111055228261 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-CELL INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228261 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-CELL INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111055228261 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-NSVC INST=(00,00,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228261 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111055228307 [1;34mDOML[0;m[1;36m <0001> oml.c:579 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx SET BTS ATTR
[0;m[1;36m20180111055228307 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[0] (150 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228307 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[1] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228308 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[2] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228308 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[3] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228308 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[4] (520 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228308 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[5] (165 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228308 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[6] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111055228308 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055228310 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228310 [1;33mDOML[0;m[1;36m <0001> oml.c:1051 ADM state already was Unlocked
[0;m[1;36m20180111055228311 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055228312 [1;34mDOML[0;m[1;36m <0001> oml.c:1008 ... automatic ACK, OP state already was Enabled
[0;m20180111055228539 [1;32mDL1C[0;m <0006> l1_if.c:1205 Rx RF-ACT.conf (status=Success)
[0;m20180111055228539 [1;32mDL1C[0;m <0006> main.c:120 Set global status #0 to 1 (0000 -> 0001), LEDs: ACT 1
[0;m[1;36m20180111055228540 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE Power off -> OK
[0;m[1;36m20180111055228540 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE NULL -> Disabled
[0;m[1;36m20180111055228540 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111055228540 [1;32mDOML[0;m[1;36m <0001> oml.c:457 OC=RADIO-CARRIER INST=(00,00,ff) Tx SW ACT REP
[0;m[1;36m20180111055228541 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) AVAIL STATE Power off -> OK
[0;m[1;36m20180111055228541 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111055228541 [1;32mDOML[0;m[1;36m <0001> oml.c:457 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx SW ACT REP
[0;m[1;36m20180111055228541 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,00) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111055228541 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,00) OPER STATE NULL -> Disabled
[0;m[1;36m20180111055228542 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m[1;36m20180111055228542 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,01) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111055228542 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,01) OPER STATE NULL -> Disabled
[0;m[1;36m20180111055228542 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180111055228542 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,02) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111055228543 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,02) OPER STATE NULL -> Disabled
[0;m[1;36m20180111055228543 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180111055228543 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,03) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111055228543 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,03) OPER STATE NULL -> Disabled
[0;m[1;36m20180111055228543 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180111055228543 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,04) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111055228544 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,04) OPER STATE NULL -> Disabled
[0;m[1;36m20180111055228544 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180111055228544 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,05) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111055228544 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,05) OPER STATE NULL -> Disabled
[0;m[1;36m20180111055228544 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180111055228545 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,06) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111055228545 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,06) OPER STATE NULL -> Disabled
[0;m[1;36m20180111055228545 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180111055228545 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,07) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111055228545 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,07) OPER STATE NULL -> Disabled
[0;m[1;36m20180111055228545 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180111055228546 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_850.cfg loaded (src: eeprom)
[0;m20180111055228546 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111055228548 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_900.cfg loaded (src: eeprom)
[0;m20180111055228548 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m[1;36m20180111055228549 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m20180111055228550 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_1800.cfg loaded (src: eeprom)
[0;m20180111055228550 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111055228551 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_1900.cfg loaded (src: eeprom)
[0;m20180111055228552 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111055228553 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_850.cfg loaded (src: eeprom)
[0;m20180111055228553 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111055228554 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_900.cfg loaded (src: eeprom)
[0;m20180111055228554 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111055228555 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_1800.cfg loaded (src: eeprom)
[0;m20180111055228556 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111055228557 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_1900.cfg loaded (src: eeprom)
[0;m20180111055228557 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180111055228558 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_850.cfg loaded (src: eeprom)
[0;m20180111055228558 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180111055228559 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_900.cfg loaded (src: eeprom)
[0;m20180111055228560 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180111055228560 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_1800.cfg loaded (src: eeprom)
[0;m20180111055228561 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180111055228562 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_1900.cfg loaded (src: eeprom)
[0;m20180111055228562 [1;32mDL1C[0;m <0006> calib_file.c:440 L1 calibration table loading complete!
[0;m[1;36m20180111055228601 [1;34mDOML[0;m[1;36m <0001> oml.c:749 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx SET RADIO CARRIER ATTR
[0;m[1;36m20180111055228601 [1;32mDOML[0;m[1;36m <0001> oml.c:781 Set RF Max Power Reduction = 0 dBm
[0;m[1;36m20180111055228601 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055228603 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228603 [1;33mDOML[0;m[1;36m <0001> oml.c:1051 ADM state already was Unlocked
[0;m20180111055228604 [1;32mDL1C[0;m <0006> l1_if.c:1391 Tx RF-MUTE.req (0, 0, 0, 0, 0, 0, 0, 0)
[0;m20180111055228604 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim MUTE-RF.req
[0;m20180111055228604 [1;32mDL1C[0;m <0006> l1_if.c:1364 Rx RF-MUTE.conf with status=Success
[0;m20180111055228604 [1;32mDL1C[0;m <0006> main.c:120 Set global status #1 to 0 (0001 -> 0001), LEDs: ACT 1
[0;m[1;36m20180111055228606 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m20180111055228607 [1;33mDL1C[0;m <0006> oml.c:423 Init TRX (ARFCN 868, TSC 7, RxPower -75.000000 dBm, TxPower  0.00 dBm
[0;m20180111055228609 [1;32mDL1C[0;m <0006> oml.c:343 Rx MPH-INIT.conf (status=Success)
[0;m20180111055228610 [1;32mDL1C[0;m <0006> tx_power.c:248 power_ramp_start(cur=0, tgt=23000)
[0;m[1;36m20180111055228610 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE OK -> OK
[0;m[1;36m20180111055228610 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111055228610 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111055228655 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228656 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055228657 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) OPER STATE NULL -> Enabled
[0;m[1;36m20180111055228657 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111055228703 [1;34mDOML[0;m[1;36m <0001> oml.c:1408 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx IPACCESS(0xe0): [0;m[1;36m20180111055228703 [1;32mDOML[0;m[1;36m <0001> oml.c:1365 Rx IPA RSL CONNECT IP=10.42.42.7 PORT=3003 STREAM=0x00
[0;m[1;36m20180111055228704 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m20180111055228705 [1;33mDLINP[0;m <0012> input/ipa.c:131 10.42.42.7:3003 connection done
[0;m[1;36m20180111055228706 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111055228706 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,00) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111055228706 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m20180111055228707 [1;33mDLINP[0;m <0012> input/ipaccess.c:708 received ID get from 1/0/0
[0;m20180111055228708 [1;32mDABIS[0;m <000d> abis.c:113 RSL Signalling link for TRX0 up
[0;m[1;35m20180111055228708 [1;32mDRSL[0;m[1;35m <0000> rsl.c:271 Tx RSL RF RESource INDication
[0;m[1;36m20180111055228710 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228712 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx OPSTART
[0;m[1;35m20180111055228712 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111055228713 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI1, 23 bytes)
[0;m[1;38m20180111055228713 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;36m20180111055228713 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,00) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228713 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,00) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111055228714 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m20180111055228714 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, FCCH [0;mTxDL)
[0;m20180111055228715 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (FCCH [0;mTxDL)
[0;m20180111055228716 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, SCH [0;mTxDL)
[0;m20180111055228716 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (SCH [0;mTxDL)
[0;m20180111055228717 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, BCCH [0;mTxDL)
[0;m20180111055228717 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (BCCH [0;mTxDL)
[0;m20180111055228718 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, AGCH [0;mTxDL)
[0;m20180111055228718 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (AGCH [0;mTxDL)
[0;m20180111055228719 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, PCH [0;mTxDL)
[0;m20180111055228719 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (PCH [0;mTxDL)
[0;m20180111055228720 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, RACH [0;mRxUL)
[0;m20180111055228720 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (RACH [0;mRxUL)
[0;m20180111055228720 [1;32mDL1C[0;m <0006> l1sap.c:579 activate confirm chan_nr=0x40 trx=0
[0;m[1;35m20180111055228721 [1;33mDRSL[0;m[1;35m <0000> rsl.c:648 (bts=0,trx=0,ts=0,ss=0) Tx CHAN ACT ACK
[0;m20180111055228721 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=4) SET_CIPHERING (ALG=0 TxDL)
[0;m20180111055228722 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=4) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m20180111055228722 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=4) SET_CIPHERING (ALG=0 RxUL)
[0;m[1;35m20180111055228723 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111055228723 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI2, 23 bytes)
[0;m[1;38m20180111055228723 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m20180111055228723 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=4) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m[1;35m20180111055228724 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111055228724 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2bis)
[0;m[1;38m20180111055228724 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111055228725 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111055228725 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2ter)
[0;m[1;38m20180111055228725 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111055228725 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111055228726 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2quater)
[0;m[1;38m20180111055228726 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111055228726 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111055228727 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI3, 23 bytes)
[0;m[1;38m20180111055228727 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111055228727 [1;32mDRSL[0;m[1;35m <0000> bts.c:405 Updated AGCH max queue length to 12
[0;m[1;35m20180111055228727 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111055228728 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI4, 23 bytes)
[0;m[1;38m20180111055228728 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111055228728 [1;32mDRSL[0;m[1;35m <0000> rsl.c:555  Rx RSL SACCH FILLING (SI5, 19 bytes)
[0;m[1;38m20180111055228728 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111055228729 [1;32mDRSL[0;m[1;35m <0000> rsl.c:559  Rx RSL Disabling SACCH FILLING (SI5bis)
[0;m[1;38m20180111055228729 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111055228729 [1;32mDRSL[0;m[1;35m <0000> rsl.c:559  Rx RSL Disabling SACCH FILLING (SI5ter)
[0;m[1;38m20180111055228730 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111055228730 [1;32mDRSL[0;m[1;35m <0000> rsl.c:555  Rx RSL SACCH FILLING (SI6, 13 bytes)
[0;m[1;38m20180111055228730 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;36m20180111055228759 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111055228759 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,01) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111055228759 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055228761 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228762 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055228763 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,01) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228763 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,01) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111055228763 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180111055228806 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111055228807 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,02) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111055228807 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055228808 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228810 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055228811 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,02) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228811 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,02) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111055228812 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180111055228854 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111055228855 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,03) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111055228855 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055228856 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228858 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055228859 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,03) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228859 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,03) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111055228859 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180111055228902 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111055228903 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,04) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111055228903 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055228904 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228906 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055228907 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,04) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228907 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,04) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111055228907 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180111055228951 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111055228951 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,05) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111055228951 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055228953 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055228954 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055228955 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,05) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055228955 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,05) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111055228955 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180111055228999 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111055228999 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,06) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111055228999 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055229000 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055229002 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055229002 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,06) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055229003 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,06) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111055229003 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180111055229047 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111055229047 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,07) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111055229047 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111055229048 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111055229050 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111055229050 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,07) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111055229051 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,07) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111055229051 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180111055229610 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 2000 mdBm.
[0;m20180111055229611 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 2.000000 dBm
[0;m20180111055230611 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 4000 mdBm.
[0;m20180111055230612 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 4.000000 dBm
[0;m20180111055231612 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 6000 mdBm.
[0;m20180111055231613 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 6.000000 dBm
[0;m20180111055232613 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 8000 mdBm.
[0;m20180111055232614 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 8.000000 dBm
[0;m20180111055233614 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 10000 mdBm.
[0;m20180111055233615 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 10.000000 dBm
[0;m20180111055234615 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 12000 mdBm.
[0;m20180111055234616 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 12.000000 dBm
[0;m20180111055235617 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 14000 mdBm.
[0;m20180111055235617 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 14.000000 dBm
[0;m20180111055236618 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 16000 mdBm.
[0;m20180111055236619 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 16.000000 dBm
[0;m20180111055237619 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 18000 mdBm.
[0;m20180111055237620 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 18.000000 dBm
[0;m20180111055238620 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 20000 mdBm.
[0;m20180111055238621 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 20.000000 dBm
[0;m20180111055239621 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 22000 mdBm.
[0;m20180111055239622 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 22.000000 dBm
[0;m20180111055240622 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 23000 mdBm.
[0;m20180111055240623 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 23.000000 dBm
[0;m[1;35m20180111055308472 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=4) Fwd RLL msg CHAN_RQD from LAPDm to A-bis
[0;m[1;35m20180111055308474 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2596 (bts=0,trx=0,ts=0,ss=1) Rx RSL CHAN_ACTIV
[0;m[1;35m20180111055308475 [1;32mDRSL[0;m[1;35m <0000> rsl.c:1029  chan_nr=0x28 type=0x00 mode=0x00
[0;m20180111055308475 [1;32mDL1C[0;m <0006> l1sap.c:1389 activating channel chan_nr=0x28 trx=0
[0;m20180111055308475 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SDCCH [0;mTxDL)
[0;m20180111055308476 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SDCCH [0;mTxDL)
[0;m20180111055308476 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SDCCH [0;mRxUL)
[0;m20180111055308477 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SDCCH [0;mRxUL)
[0;m20180111055308477 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SACCH [0;mTxDL)
[0;m20180111055308478 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SACCH [0;mTxDL)
[0;m20180111055308478 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SACCH [0;mRxUL)
[0;m20180111055308479 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SACCH [0;mRxUL)
[0;m20180111055308479 [1;32mDL1C[0;m <0006> l1sap.c:579 activate confirm chan_nr=0x28 trx=0
[0;m[1;35m20180111055308479 [1;33mDRSL[0;m[1;35m <0000> rsl.c:648 (bts=0,trx=0,ts=0,ss=1) Tx CHAN ACT ACK
[0;m20180111055308479 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=1) SET_CIPHERING (ALG=0 TxDL)
[0;m20180111055308480 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=1) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m20180111055308480 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=1) SET_CIPHERING (ALG=0 RxUL)
[0;m20180111055308481 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=1) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m[1;35m20180111055308482 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL IMM_ASS_CMD
[0;m20180111055308814 [1;33mDLLAPD[0;m <0011> lapd_core.c:920 Store content res. (dl=0xb6e41a24)
[0;m[1;35m20180111055308814 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg EST_IND from LAPDm to A-bis
[0;m[1;31m20180111055308825 [1;34mDRLL[0;m[1;31m <0002> rsl.c:2334 (bts=0,trx=0,ts=0,ss=1) Rx RLL DATA_REQ Abis -> LAPDm
[0;m[1;35m20180111055309142 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2487 (bts=0,trx=0,ts=0,ss=1) Handing RLL msg UNIT_DATA_IND from LAPDm to MEAS REP
[0;m[1;35m20180111055309142 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2404 (bts=0,trx=0,ts=0,ss=1) chan_num:40 Tx MEAS RES valid(2), flags(03)
[0;m[1;35m20180111055309142 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2422 (bts=0,trx=0,ts=0,ss=1) Send Meas RES: NUM:0, RXLEV_FULL:11, RXLEV_SUB:11, RXQUAL_FULL:6, RXQUAL_SUB:6, MS_PWR:0, UL_TA:0, L3_LEN:18, TimingOff:4294967295
[0;m[1;35m20180111055309285 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg DATA_IND from LAPDm to A-bis
[0;m[1;31m20180111055309297 [1;34mDRLL[0;m[1;31m <0002> rsl.c:2334 (bts=0,trx=0,ts=0,ss=1) Rx RLL DATA_REQ Abis -> LAPDm
[0;m[1;35m20180111055309612 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2487 (bts=0,trx=0,ts=0,ss=1) Handing RLL msg UNIT_DATA_IND from LAPDm to MEAS REP
[0;m[1;35m20180111055309612 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2404 (bts=0,trx=0,ts=0,ss=1) chan_num:40 Tx MEAS RES valid(2), flags(03)
[0;m[1;35m20180111055309613 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2422 (bts=0,trx=0,ts=0,ss=1) Send Meas RES: NUM:1, RXLEV_FULL:29, RXLEV_SUB:29, RXQUAL_FULL:0, RXQUAL_SUB:0, MS_PWR:0, UL_TA:0, L3_LEN:18, TimingOff:4294967295
[0;m[1;35m20180111055309755 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg DATA_IND from LAPDm to A-bis
[0;m[1;31m20180111055309771 [1;34mDRLL[0;m[1;31m <0002> rsl.c:2334 (bts=0,trx=0,ts=0,ss=1) Rx RLL DATA_REQ Abis -> LAPDm
[0;m[1;35m20180111055309818 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2596 (bts=0,trx=0,ts=0,ss=1) Rx RSL DEACTIVATE_SACCH
[0;m20180111055309818 [1;32mDL1C[0;m <0006> l1sap.c:1453 deactivating sacch chan_nr=0x28 trx=0
[0;m20180111055309818 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SACCH [0;mTxDL)
[0;m20180111055309819 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SACCH [0;mTxDL)
[0;m20180111055309819 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SACCH [0;mRxUL)
[0;m20180111055309820 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SACCH [0;mRxUL)
[0;m[1;35m20180111055310226 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg REL_IND from LAPDm to A-bis
[0;m[1;35m20180111055312230 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2596 (bts=0,trx=0,ts=0,ss=1) Rx RSL RF_CHAN_REL
[0;m20180111055312230 [1;32mDL1C[0;m <0006> l1sap.c:1437 deactivating channel chan_nr=0x28 trx=0
[0;m20180111055312230 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SDCCH [0;mRxUL)
[0;m20180111055312231 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SDCCH [0;mRxUL)
[0;m20180111055312231 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SDCCH [0;mTxDL)
[0;m20180111055312232 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SDCCH [0;mTxDL)
[0;m20180111055312232 [1;32mDL1C[0;m <0006> l1sap.c:604 deactivate confirm chan_nr=0x28 trx=0
[0;m[1;35m20180111055312232 [1;33mDRSL[0;m[1;35m <0000> rsl.c:622 (bts=0,trx=0,ts=0,ss=1) Tx RF CHAN REL ACK
[0;m20180111055318832 [1;31mDLINP[0;m <0012> input/ipa.c:69 10.42.42.7:3002 connection closed with server
[0;m20180111055318832 [1;31mDABIS[0;m <000d> abis.c:135 Signalling link down
[0;m20180111055318833 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 2 received
[0;m20180111055318833 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 2 received
[0;m[1;36m20180111055318834 [1;33mDOML[0;m[1;36m <0001> bts.c:239 Shutting down BTS 0, Reason Abis close
[0;m20180111055318834 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim DEACTIVATE-RF.req
[0;m20180111055318834 [1;33mDL1C[0;m <0006> oml.c:452 Close TRX 0
[0;m20180111055318835 [1;32mDL1C[0;m <0006> l1_if.c:1205 Rx RF-DEACT.conf (status=Success)
[0;m20180111055318835 [1;32mDL1C[0;m <0006> main.c:120 Set global status #0 to 0 (0001 -> 0000), LEDs: ACT 0
[0;m[1;36m20180111055318836 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE OK -> Off line
[0;m[1;36m20180111055318836 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE Enabled -> Disabled
[0;m[1;36m20180111055318836 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111055318837 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) AVAIL STATE OK -> Off line
[0;m[1;36m20180111055318837 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) OPER STATE Enabled -> Disabled
[0;m[1;36m20180111055318837 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m