(launched: 2018-03-05_17:46:40.300246)
20180111151541297 [1;33mDLCTRL[0;m <0017> control_if.c:854 CTRL at 127.0.0.1 4238
[0;m20180111151541298 [1;33mDLGLOBAL[0;m <0010> telnet_interface.c:104 telnet at 127.0.0.1 4241
[0;m20180111151541300 [1;33mDLINP[0;m <0012> input/ipaccess.c:887 enabling ipaccess BTS mode, OML connecting to 10.42.42.7:3002
[0;m20180111151541301 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 4 received
[0;m20180111151541302 [1;32mDL1C[0;m <0006> phy_link.c:58 PHY link state change shutdown -> connecting
[0;m20180111151541302 [1;32mDL1C[0;m <0006> l1_if.c:1617 sysmoBTSv2 L1IF compiled against API headers v5.1.0
[0;m20180111151542479 [1;31mDL1C[0;m <0006> l1_if.c:1599 Failed to read from EEPROM.
[0;m20180111151542503 [1;31mDL1C[0;m <0006> l1_if.c:1570 Unable to read band support from EEPROM, assuming all bands
[0;m20180111151542504 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim LAYER1-RESET.req
[0;m20180111151542505 [1;32mDL1C[0;m <0006> phy_link.c:58 PHY link state change connecting -> connected
[0;m20180111151542505 [1;32mDL1C[0;m <0006> phy_link.c:68 trx_set_avail(1)
[0;m20180111151542505 [1;33mDLINP[0;m <0012> input/ipa.c:131 10.42.42.7:3002 connection done
[0;m20180111151542506 [1;33mDLINP[0;m <0012> input/ipaccess.c:708 received ID get from 1/0/0
[0;m20180111151542507 [1;32mDABIS[0;m <000d> abis.c:101 OML Signalling link up
[0;m[1;36m20180111151542508 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=SITE-MANAGER INST=(ff,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111151542508 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111151542509 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSE INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111151542509 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-CELL INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111151542509 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111151542509 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,01,ff) Tx STATE CHG REP
[0;m[1;36m20180111151542510 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111151542510 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111151542510 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m[1;36m20180111151542510 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180111151542511 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180111151542511 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180111151542511 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180111151542511 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180111151542511 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180111151542512 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180111151542513 [1;33mDL1C[0;m <0006> l1_if.c:1491 Rx L1-RESET.conf (status=Success)
[0;m20180111151542513 [1;32mDL1C[0;m <0006> l1_if.c:1528 Tx SET-TRACE-FLAGS.req (0x00000000)
[0;m20180111151542513 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SYSTEM-INFO.req
[0;m[1;36m20180111151542514 [1;34mDOML[0;m[1;36m <0001> oml.c:539 OC=BTS(01) INST=(ff,ff,ff) [0;m[1;36mRx GET ATTR
[0;m[1;36m20180111151542514 [1;32mDOML[0;m[1;36m <0001> oml.c:277 BTS Tx Get Attribute Response
[0;m20180111151542516 [1;32mDL1C[0;m <0006> l1_if.c:1432 DSP v5.1.1, FPGA v5.1.0
n[0;m20180111151542516 [1;32mDL1C[0;m <0006> l1_if.c:1301 Using external attenuator.
[0;m20180111151542516 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim ACTIVATE-RF.req
[0;m20180111151543300 [1;33mDL1C[0;m <0006> calib_file.c:205 MAC Address is 24:62:78:00:03:c3 -> NO FIXUP
[0;m20180111151543301 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m[1;36m20180111151543311 [1;34mDOML[0;m[1;36m <0001> oml.c:539 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx GET ATTR
[0;m[1;36m20180111151543311 [1;32mDOML[0;m[1;36m <0001> oml.c:277 BASEBAND-TRANSCEIVER Tx Get Attribute Response
[0;m[1;36m20180111151543311 [1;31mDOML[0;m[1;36m <0001> oml.c:229 O&M Get Attributes [0], Manufacturer Dependent State is unsupported by TRX.
[0;m[1;36m20180111151543313 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=SITE-MANAGER(00) INST=(ff,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543313 [1;34mDOML[0;m[1;36m <0001> oml.c:1008 ... automatic ACK, OP state already was Enabled
[0;m[1;36m20180111151543314 [1;34mDOML[0;m[1;36m <0001> oml.c:579 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx SET BTS ATTR
[0;m[1;36m20180111151543315 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[0] (150 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543315 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[1] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543315 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[2] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543315 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[3] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543315 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[4] (520 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543315 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[5] (165 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543316 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[6] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543316 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151543317 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543318 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543319 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BTS INST=(00,ff,ff) OPER STATE NULL -> Enabled
[0;m[1;36m20180111151543319 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111151543319 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BTS INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543319 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BTS INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111151543320 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-NSE INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543320 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSE INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111151543320 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-CELL INST=(00,ff,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543320 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-CELL INST=(00,ff,ff) Tx STATE CHG REP
[0;m[1;36m20180111151543320 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=GPRS-NSVC INST=(00,00,ff) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543320 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=GPRS-NSVC INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111151543365 [1;34mDOML[0;m[1;36m <0001> oml.c:579 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx SET BTS ATTR
[0;m[1;36m20180111151543366 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[0] (150 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543366 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[1] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543366 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[2] (180 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543366 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[3] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543366 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[4] (520 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543366 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[5] (165 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543367 [1;33mDOML[0;m[1;36m <0001> oml.c:680 Ignoring T200[6] (1680 ms) as sent by BSC due to suspected LAPDm bug!
[0;m[1;36m20180111151543367 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151543368 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543368 [1;33mDOML[0;m[1;36m <0001> oml.c:1051 ADM state already was Unlocked
[0;m[1;36m20180111151543369 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BTS(01) INST=(00,ff,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543369 [1;34mDOML[0;m[1;36m <0001> oml.c:1008 ... automatic ACK, OP state already was Enabled
[0;m20180111151543595 [1;32mDL1C[0;m <0006> l1_if.c:1205 Rx RF-ACT.conf (status=Success)
[0;m20180111151543595 [1;32mDL1C[0;m <0006> main.c:120 Set global status #0 to 1 (0000 -> 0001), LEDs: ACT 1
[0;m[1;36m20180111151543596 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE Power off -> OK
[0;m[1;36m20180111151543596 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE NULL -> Disabled
[0;m[1;36m20180111151543596 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111151543596 [1;32mDOML[0;m[1;36m <0001> oml.c:457 OC=RADIO-CARRIER INST=(00,00,ff) Tx SW ACT REP
[0;m[1;36m20180111151543596 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) AVAIL STATE Power off -> OK
[0;m[1;36m20180111151543597 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111151543597 [1;32mDOML[0;m[1;36m <0001> oml.c:457 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx SW ACT REP
[0;m[1;36m20180111151543597 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,00) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111151543597 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,00) OPER STATE NULL -> Disabled
[0;m[1;36m20180111151543598 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m[1;36m20180111151543598 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,01) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111151543598 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,01) OPER STATE NULL -> Disabled
[0;m[1;36m20180111151543598 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180111151543598 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,02) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111151543598 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,02) OPER STATE NULL -> Disabled
[0;m[1;36m20180111151543599 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180111151543599 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,03) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111151543599 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,03) OPER STATE NULL -> Disabled
[0;m[1;36m20180111151543599 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180111151543599 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,04) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111151543600 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,04) OPER STATE NULL -> Disabled
[0;m[1;36m20180111151543600 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180111151543600 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,05) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111151543600 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,05) OPER STATE NULL -> Disabled
[0;m[1;36m20180111151543600 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180111151543601 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,06) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111151543601 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,06) OPER STATE NULL -> Disabled
[0;m[1;36m20180111151543601 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180111151543601 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,07) AVAIL STATE Power off -> Dependency
[0;m[1;36m20180111151543601 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,07) OPER STATE NULL -> Disabled
[0;m[1;36m20180111151543602 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180111151543602 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_850.cfg loaded (src: eeprom)
[0;m20180111151543603 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m[1;36m20180111151543603 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m20180111151543604 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_900.cfg loaded (src: eeprom)
[0;m20180111151543605 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111151543606 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_1800.cfg loaded (src: eeprom)
[0;m20180111151543606 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111151543607 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxu_1900.cfg loaded (src: eeprom)
[0;m20180111151543608 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111151543609 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_850.cfg loaded (src: eeprom)
[0;m20180111151543609 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111151543610 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_900.cfg loaded (src: eeprom)
[0;m20180111151543610 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111151543611 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_1800.cfg loaded (src: eeprom)
[0;m20180111151543612 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-RX-CALIB.req
[0;m20180111151543613 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_rxd_1900.cfg loaded (src: eeprom)
[0;m20180111151543613 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180111151543614 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_850.cfg loaded (src: eeprom)
[0;m20180111151543614 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180111151543615 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_900.cfg loaded (src: eeprom)
[0;m20180111151543616 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180111151543616 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_1800.cfg loaded (src: eeprom)
[0;m20180111151543617 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim SET-TX-CALIB.req
[0;m20180111151543618 [1;33mDL1C[0;m <0006> calib_file.c:430 L1 calibration table calib_tx_1900.cfg loaded (src: eeprom)
[0;m20180111151543618 [1;32mDL1C[0;m <0006> calib_file.c:440 L1 calibration table loading complete!
[0;m[1;36m20180111151543651 [1;34mDOML[0;m[1;36m <0001> oml.c:749 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx SET RADIO CARRIER ATTR
[0;m[1;36m20180111151543652 [1;32mDOML[0;m[1;36m <0001> oml.c:781 Set RF Max Power Reduction = 0 dBm
[0;m[1;36m20180111151543652 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151543653 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543654 [1;33mDOML[0;m[1;36m <0001> oml.c:1051 ADM state already was Unlocked
[0;m20180111151543654 [1;32mDL1C[0;m <0006> l1_if.c:1391 Tx RF-MUTE.req (0, 0, 0, 0, 0, 0, 0, 0)
[0;m20180111151543654 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim MUTE-RF.req
[0;m20180111151543655 [1;32mDL1C[0;m <0006> l1_if.c:1364 Rx RF-MUTE.conf with status=Success
[0;m20180111151543655 [1;32mDL1C[0;m <0006> main.c:120 Set global status #1 to 0 (0001 -> 0001), LEDs: ACT 1
[0;m[1;36m20180111151543656 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=RADIO-CARRIER(02) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m20180111151543657 [1;33mDL1C[0;m <0006> oml.c:423 Init TRX (ARFCN 868, TSC 7, RxPower -75.000000 dBm, TxPower  0.00 dBm
[0;m20180111151543658 [1;32mDL1C[0;m <0006> oml.c:343 Rx MPH-INIT.conf (status=Success)
[0;m20180111151543658 [1;32mDL1C[0;m <0006> tx_power.c:248 power_ramp_start(cur=0, tgt=23000)
[0;m[1;36m20180111151543658 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE OK -> OK
[0;m[1;36m20180111151543658 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111151543659 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111151543701 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543702 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543702 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) OPER STATE NULL -> Enabled
[0;m[1;36m20180111151543703 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111151543745 [1;34mDOML[0;m[1;36m <0001> oml.c:1408 OC=BASEBAND-TRANSCEIVER(04) INST=(00,00,ff) [0;m[1;36mRx IPACCESS(0xe0): [0;m[1;36m20180111151543745 [1;32mDOML[0;m[1;36m <0001> oml.c:1365 Rx IPA RSL CONNECT IP=10.42.42.7 PORT=3003 STREAM=0x00
[0;m[1;36m20180111151543746 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m20180111151543747 [1;33mDLINP[0;m <0012> input/ipa.c:131 10.42.42.7:3003 connection done
[0;m[1;36m20180111151543749 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111151543749 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,00) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111151543749 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m20180111151543749 [1;33mDLINP[0;m <0012> input/ipaccess.c:708 received ID get from 1/0/0
[0;m20180111151543750 [1;32mDABIS[0;m <000d> abis.c:113 RSL Signalling link for TRX0 up
[0;m[1;35m20180111151543750 [1;32mDRSL[0;m[1;35m <0000> rsl.c:271 Tx RSL RF RESource INDication
[0;m[1;36m20180111151543752 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543755 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,00) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543756 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,00) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543756 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,00) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111151543757 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,00) Tx STATE CHG REP
[0;m20180111151543757 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, FCCH [0;mTxDL)
[0;m20180111151543758 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (FCCH [0;mTxDL)
[0;m20180111151543759 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, SCH [0;mTxDL)
[0;m20180111151543759 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (SCH [0;mTxDL)
[0;m20180111151543760 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, BCCH [0;mTxDL)
[0;m20180111151543760 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (BCCH [0;mTxDL)
[0;m20180111151543761 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, AGCH [0;mTxDL)
[0;m20180111151543761 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (AGCH [0;mTxDL)
[0;m20180111151543762 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, PCH [0;mTxDL)
[0;m20180111151543762 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (PCH [0;mTxDL)
[0;m20180111151543762 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.req (hL2=0x000004bb, RACH [0;mRxUL)
[0;m20180111151543763 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=4) MPH-ACTIVATE.conf (RACH [0;mRxUL)
[0;m20180111151543764 [1;32mDL1C[0;m <0006> l1sap.c:579 activate confirm chan_nr=0x40 trx=0
[0;m[1;35m20180111151543764 [1;33mDRSL[0;m[1;35m <0000> rsl.c:648 (bts=0,trx=0,ts=0,ss=0) Tx CHAN ACT ACK
[0;m20180111151543764 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=4) SET_CIPHERING (ALG=0 TxDL)
[0;m20180111151543765 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=4) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m20180111151543765 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=4) SET_CIPHERING (ALG=0 RxUL)
[0;m[1;35m20180111151543766 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111151543766 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI1, 23 bytes)
[0;m[1;38m20180111151543766 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m20180111151543767 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=4) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m[1;35m20180111151543767 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111151543768 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI2, 23 bytes)
[0;m[1;38m20180111151543768 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111151543768 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111151543768 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2bis)
[0;m[1;38m20180111151543769 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111151543769 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111151543769 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2ter)
[0;m[1;38m20180111151543769 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111151543770 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111151543770 [1;32mDRSL[0;m[1;35m <0000> rsl.c:383  RX RSL Disabling BCCH INFO (SI2quater)
[0;m[1;38m20180111151543770 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111151543771 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111151543771 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI3, 23 bytes)
[0;m[1;38m20180111151543771 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111151543771 [1;32mDRSL[0;m[1;35m <0000> bts.c:405 Updated AGCH max queue length to 12
[0;m[1;35m20180111151543771 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL BCCH_INFO
[0;m[1;35m20180111151543772 [1;32mDRSL[0;m[1;35m <0000> rsl.c:322  Rx RSL BCCH INFO (SI4, 23 bytes)
[0;m[1;38m20180111151543772 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111151543772 [1;32mDRSL[0;m[1;35m <0000> rsl.c:555  Rx RSL SACCH FILLING (SI5, 19 bytes)
[0;m[1;38m20180111151543773 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111151543773 [1;32mDRSL[0;m[1;35m <0000> rsl.c:559  Rx RSL Disabling SACCH FILLING (SI5bis)
[0;m[1;38m20180111151543773 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111151543774 [1;32mDRSL[0;m[1;35m <0000> rsl.c:559  Rx RSL Disabling SACCH FILLING (SI5ter)
[0;m[1;38m20180111151543774 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;35m20180111151543774 [1;32mDRSL[0;m[1;35m <0000> rsl.c:555  Rx RSL SACCH FILLING (SI6, 13 bytes)
[0;m[1;38m20180111151543774 [1;32mDPAG[0;m[1;38m <0005> paging.c:540 Paging SI update
[0;m[1;36m20180111151543801 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111151543801 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,01) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111151543801 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151543803 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543804 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,01) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543805 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,01) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543805 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,01) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111151543805 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,01) Tx STATE CHG REP
[0;m[1;36m20180111151543849 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111151543849 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,02) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111151543849 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151543851 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543852 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,02) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543853 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,02) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543853 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,02) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111151543853 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,02) Tx STATE CHG REP
[0;m[1;36m20180111151543897 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111151543898 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,03) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111151543898 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151543899 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543901 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,03) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543901 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,03) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543902 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,03) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111151543902 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,03) Tx STATE CHG REP
[0;m[1;36m20180111151543945 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111151543945 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,04) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111151543945 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151543947 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543948 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,04) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543949 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,04) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543949 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,04) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111151543950 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,04) Tx STATE CHG REP
[0;m[1;36m20180111151543992 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111151543993 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,05) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111151543993 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151543994 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151543996 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,05) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151543997 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,05) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151543997 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,05) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111151543997 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,05) Tx STATE CHG REP
[0;m[1;36m20180111151544041 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111151544041 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,06) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111151544041 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151544043 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151544044 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,06) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151544045 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,06) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151544045 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,06) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111151544046 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,06) Tx STATE CHG REP
[0;m[1;36m20180111151544089 [1;34mDOML[0;m[1;36m <0001> oml.c:922 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx SET CHAN ATTR
[0;m[1;36m20180111151544089 [1;32mDOML[0;m[1;36m <0001> oml.c:984 OC=CHANNEL INST=(00,00,07) SET CHAN ATTR (TSC = 7)
[0;m[1;36m20180111151544089 [1;34mDOML[0;m[1;36m <0001> oml.c:441 Sending FOM ACK.
[0;m[1;36m20180111151544091 [1;34mDOML[0;m[1;36m <0001> oml.c:1025 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx CHG ADM STATE
[0;m[1;36m20180111151544093 [1;34mDOML[0;m[1;36m <0001> oml.c:997 OC=CHANNEL(03) INST=(00,00,07) [0;m[1;36mRx OPSTART
[0;m[1;36m20180111151544093 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=CHANNEL INST=(00,00,07) AVAIL STATE Dependency -> OK
[0;m[1;36m20180111151544094 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=CHANNEL INST=(00,00,07) OPER STATE Disabled -> Enabled
[0;m[1;36m20180111151544094 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=CHANNEL INST=(00,00,07) Tx STATE CHG REP
[0;m20180111151544658 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 2000 mdBm.
[0;m20180111151544659 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 2.000000 dBm
[0;m20180111151545659 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 4000 mdBm.
[0;m20180111151545660 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 4.000000 dBm
[0;m20180111151546661 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 6000 mdBm.
[0;m20180111151546661 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 6.000000 dBm
[0;m20180111151547662 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 8000 mdBm.
[0;m20180111151547663 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 8.000000 dBm
[0;m20180111151548663 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 10000 mdBm.
[0;m20180111151548664 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 10.000000 dBm
[0;m20180111151549664 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 12000 mdBm.
[0;m20180111151549665 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 12.000000 dBm
[0;m20180111151550665 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 14000 mdBm.
[0;m20180111151550666 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 14.000000 dBm
[0;m20180111151551667 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 16000 mdBm.
[0;m20180111151551667 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 16.000000 dBm
[0;m20180111151552668 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 18000 mdBm.
[0;m20180111151552669 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 18.000000 dBm
[0;m20180111151553669 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 20000 mdBm.
[0;m20180111151553670 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 20.000000 dBm
[0;m20180111151554670 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 22000 mdBm.
[0;m20180111151554671 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 22.000000 dBm
[0;m20180111151555671 [1;32mDL1C[0;m <0006> tx_power.c:181 ramping TRX board output power to 23000 mdBm.
[0;m20180111151555672 [1;32mDL1C[0;m <0006> oml.c:1240 (bts=0,trx=0) MPH-CONFIG.conf (Set Tx power level) [0;msetTxPower 23.000000 dBm
[0;m[1;35m20180111151612248 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=4) Fwd RLL msg CHAN_RQD from LAPDm to A-bis
[0;m[1;35m20180111151612250 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2596 (bts=0,trx=0,ts=0,ss=1) Rx RSL CHAN_ACTIV
[0;m[1;35m20180111151612250 [1;32mDRSL[0;m[1;35m <0000> rsl.c:1029  chan_nr=0x28 type=0x00 mode=0x00
[0;m20180111151612250 [1;32mDL1C[0;m <0006> l1sap.c:1389 activating channel chan_nr=0x28 trx=0
[0;m20180111151612251 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SDCCH [0;mTxDL)
[0;m20180111151612251 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SDCCH [0;mTxDL)
[0;m20180111151612252 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SDCCH [0;mRxUL)
[0;m20180111151612252 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SDCCH [0;mRxUL)
[0;m20180111151612253 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SACCH [0;mTxDL)
[0;m20180111151612253 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SACCH [0;mTxDL)
[0;m20180111151612254 [1;32mDL1C[0;m <0006> oml.c:1084 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.req (hL2=0x000001bb, SACCH [0;mRxUL)
[0;m20180111151612254 [1;32mDL1C[0;m <0006> oml.c:817 (bts=0,trx=0,ts=0,ss=1) MPH-ACTIVATE.conf (SACCH [0;mRxUL)
[0;m20180111151612255 [1;32mDL1C[0;m <0006> l1sap.c:579 activate confirm chan_nr=0x28 trx=0
[0;m[1;35m20180111151612255 [1;33mDRSL[0;m[1;35m <0000> rsl.c:648 (bts=0,trx=0,ts=0,ss=1) Tx CHAN ACT ACK
[0;m20180111151612255 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=1) SET_CIPHERING (ALG=0 TxDL)
[0;m20180111151612256 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=1) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m20180111151612256 [1;33mDL1C[0;m <0006> oml.c:1425 (bts=0,trx=0,ts=0,ss=1) SET_CIPHERING (ALG=0 RxUL)
[0;m20180111151612257 [1;32mDL1C[0;m <0006> oml.c:1270 (bts=0,trx=0,ts=0,ss=1) MPH-CONFIG.conf (Configure ciphering params) [0;m
[0;m[1;35m20180111151612258 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2540 (bts=0,trx=0,ts=0,ss=0) Rx RSL IMM_ASS_CMD
[0;m20180111151612571 [1;33mDLLAPD[0;m <0011> lapd_core.c:920 Store content res. (dl=0xb6db3a24)
[0;m[1;35m20180111151612572 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg EST_IND from LAPDm to A-bis
[0;m[1;31m20180111151612582 [1;34mDRLL[0;m[1;31m <0002> rsl.c:2334 (bts=0,trx=0,ts=0,ss=1) Rx RLL DATA_REQ Abis -> LAPDm
[0;m[1;35m20180111151612899 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2487 (bts=0,trx=0,ts=0,ss=1) Handing RLL msg UNIT_DATA_IND from LAPDm to MEAS REP
[0;m[1;35m20180111151612899 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2404 (bts=0,trx=0,ts=0,ss=1) chan_num:40 Tx MEAS RES valid(2), flags(03)
[0;m[1;35m20180111151612899 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2422 (bts=0,trx=0,ts=0,ss=1) Send Meas RES: NUM:0, RXLEV_FULL:11, RXLEV_SUB:11, RXQUAL_FULL:6, RXQUAL_SUB:6, MS_PWR:0, UL_TA:0, L3_LEN:18, TimingOff:4294967295
[0;m[1;35m20180111151613042 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg DATA_IND from LAPDm to A-bis
[0;m[1;31m20180111151613054 [1;34mDRLL[0;m[1;31m <0002> rsl.c:2334 (bts=0,trx=0,ts=0,ss=1) Rx RLL DATA_REQ Abis -> LAPDm
[0;m[1;35m20180111151613370 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2487 (bts=0,trx=0,ts=0,ss=1) Handing RLL msg UNIT_DATA_IND from LAPDm to MEAS REP
[0;m[1;35m20180111151613370 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2404 (bts=0,trx=0,ts=0,ss=1) chan_num:40 Tx MEAS RES valid(2), flags(03)
[0;m[1;35m20180111151613370 [1;34mDRSL[0;m[1;35m <0000> rsl.c:2422 (bts=0,trx=0,ts=0,ss=1) Send Meas RES: NUM:1, RXLEV_FULL:28, RXLEV_SUB:28, RXQUAL_FULL:0, RXQUAL_SUB:0, MS_PWR:0, UL_TA:0, L3_LEN:18, TimingOff:4294967295
[0;m[1;35m20180111151613513 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg DATA_IND from LAPDm to A-bis
[0;m[1;31m20180111151613528 [1;34mDRLL[0;m[1;31m <0002> rsl.c:2334 (bts=0,trx=0,ts=0,ss=1) Rx RLL DATA_REQ Abis -> LAPDm
[0;m[1;35m20180111151613529 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2596 (bts=0,trx=0,ts=0,ss=1) Rx RSL DEACTIVATE_SACCH
[0;m20180111151613529 [1;32mDL1C[0;m <0006> l1sap.c:1453 deactivating sacch chan_nr=0x28 trx=0
[0;m20180111151613530 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SACCH [0;mTxDL)
[0;m20180111151613530 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SACCH [0;mTxDL)
[0;m20180111151613531 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SACCH [0;mRxUL)
[0;m20180111151613531 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SACCH [0;mRxUL)
[0;m[1;35m20180111151613983 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2510 (bts=0,trx=0,ts=0,ss=1) Fwd RLL msg REL_IND from LAPDm to A-bis
[0;m[1;35m20180111151615986 [1;32mDRSL[0;m[1;35m <0000> rsl.c:2596 (bts=0,trx=0,ts=0,ss=1) Rx RSL RF_CHAN_REL
[0;m20180111151615987 [1;32mDL1C[0;m <0006> l1sap.c:1437 deactivating channel chan_nr=0x28 trx=0
[0;m20180111151615987 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SDCCH [0;mRxUL)
[0;m20180111151615988 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SDCCH [0;mRxUL)
[0;m20180111151615988 [1;32mDL1C[0;m <0006> oml.c:1566 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.req (SDCCH [0;mTxDL)
[0;m20180111151615989 [1;32mDL1C[0;m <0006> oml.c:1505 (bts=0,trx=0,ts=0,ss=1) MPH-DEACTIVATE.conf (SDCCH [0;mTxDL)
[0;m20180111151615989 [1;32mDL1C[0;m <0006> l1sap.c:604 deactivate confirm chan_nr=0x28 trx=0
[0;m[1;35m20180111151615989 [1;33mDRSL[0;m[1;35m <0000> rsl.c:622 (bts=0,trx=0,ts=0,ss=1) Tx RF CHAN REL ACK
[0;m20180111151623044 [1;31mDLINP[0;m <0012> input/ipa.c:69 10.42.42.7:3002 connection closed with server
[0;m20180111151623044 [1;31mDABIS[0;m <000d> abis.c:135 Signalling link down
[0;m20180111151623045 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 2 received
[0;m20180111151623045 [1;34mDABIS[0;m <000d> abis.c:207 Input Signal 2 received
[0;m[1;36m20180111151623046 [1;33mDOML[0;m[1;36m <0001> bts.c:239 Shutting down BTS 0, Reason Abis close
[0;m20180111151623046 [1;32mDL1C[0;m <0006> l1_if.c:184 Tx SYS prim DEACTIVATE-RF.req
[0;m20180111151623046 [1;33mDL1C[0;m <0006> oml.c:452 Close TRX 0
[0;m20180111151623047 [1;32mDL1C[0;m <0006> l1_if.c:1205 Rx RF-DEACT.conf (status=Success)
[0;m20180111151623048 [1;32mDL1C[0;m <0006> main.c:120 Set global status #0 to 0 (0001 -> 0000), LEDs: ACT 0
[0;m[1;36m20180111151623048 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=RADIO-CARRIER INST=(00,00,ff) AVAIL STATE OK -> Off line
[0;m[1;36m20180111151623048 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=RADIO-CARRIER INST=(00,00,ff) OPER STATE Enabled -> Disabled
[0;m[1;36m20180111151623048 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=RADIO-CARRIER INST=(00,00,ff) Tx STATE CHG REP
[0;m[1;36m20180111151623049 [1;32mDOML[0;m[1;36m <0001> oml.c:344 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) AVAIL STATE OK -> Off line
[0;m[1;36m20180111151623049 [1;32mDOML[0;m[1;36m <0001> oml.c:351 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) OPER STATE Enabled -> Disabled
[0;m[1;36m20180111151623049 [1;32mDOML[0;m[1;36m <0001> oml.c:312 OC=BASEBAND-TRANSCEIVER INST=(00,00,ff) Tx STATE CHG REP
[0;m20180111151623375 [1;31mDLINP[0;m <0012> e1_input.c:235 abis_sendmsg: msg->dst == NULL: 0c 12 01 90 0f ff ff 
[0;m