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#28702 (Jun 12, 2026, 12:21:57 PM)

Started 28 days ago
Took 2.2 sec on build5-deb12build-ansible

Started by upstream project gerrit-osmo-ccid-firmware build number 212
originally caused by:

This run spent:

  • 7.1 sec waiting;
  • 2.2 sec build duration;
  • 9.4 sec total from scheduled to completion.
Revision: 3c6f11045554bdeb02db8faae1c0812627e203f6
Repository: $GERRIT_REPO_URL
  • master
7816fsm: reset stale cuart state on FSM RESET entry

Reset paths reached without power-cycling (WTIME_EXP, HW_ERR,
CARD_REMOVAL during a warm reset) leave the cuart with stale tx_busy,
rx_threshold and wtime_etu from the prior transaction. The next ATR
then hits card_uart_tx tx_busy assertion, or the ATR receive stalls
because the 33-byte ATR can never reach a multi-byte rx_threshold
left from a TPDU.

The new card_uart_tx_abort() clears tx_busy + rx_after_tx_compl + WT,
without driving a synthetic TX_COMPLETE through the FSM.

iso7816_3_reset_onenter is the right place to do this alongside
rx_threshold=1 and wtime_etu=default, this mirrors what
card_uart_ctrl(POWER_*=0) already does, but for the warm-reset paths
that don't touch power.

Change-Id: Iac8bd7f4f0eecccc9acce149277a4f5016fec7c1
Andreas Eversberg at