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  1. csd_v110: set E2 bit correctly for TCH/[FH]4.8 NT (details)
Commit fc1b20ff75f47e3fb5e73280c0834b3e580d3091 by falcon
csd_v110: set E2 bit correctly for TCH/[FH]4.8 NT

In all classic NT modes below 14.5 kbit/s, V.110 frame bits E2 and E3
are repurposed to indicate the alignment whereby a single 240-bit RLP
frame is composed of 4 pseudo-V.110 frames in switching transport.
(TS 48.020 section 15.1.)  In the case of TCH/F9.6, setting both E2
and E3 is easy because all 4 pseudo-V.110 frames go out in the same
clearmode RTP packet as a result of a single channel decoding
operation.  However, in the case of TCH/F4.8 there are two separate
channel decoding operations producing two separate RTP packets
20 ms apart.  Furthermore, GSM 05.03 section 3.4.1 specifies which
TDMA frame positions hold which half of the RLP frame - therefore,
the correct emission of bit E2 needs to be based on the TDMA frame
number at which the block was received.

A similar situation occurs with TCH/H4.8 NT: we receive a single
block from the 05.03 decoder every 40 ms, containing a full RLP frame,
but we emit it as two separate RTP packets, each carrying 20 ms worth
of bits.  These RTP packets also require correct setting of E2 bit.

Related: OS#6579
Change-Id: I485af5e01ea87c1721a298a486cd344a17884200
The file was modifiedtests/csd/csd_test.c
The file was modifiedsrc/common/csd_v110.c
The file was modifiedsrc/common/l1sap.c
The file was modifiedinclude/osmo-bts/csd_v110.h