Same config SetConfig is currently not properly handled and stale toggle bits lead to weird transfers until USB resyncs because the asf4 code itself does not properly handle the toggle bit.
- USB 2.0 §9.4.5 states that ClearFeature(ENDPOINT_HALT) unconditionally resets the data toggle to DATA0 - USB 2.0 §9.1.1.5 demands toggle reset even when the same config/interface is selected
The old code was only doing a proper reset upon receiving a bus reset, but the actual state reset path outlined in the spec is the set config command. The easy fix here is to split the existing reset code which already does everything we need into two parts for the actual usb reset and SetConfig.
The current halt clear code only resets DTGL if the endpoint is actually halted and a fix is a bit more complicated. _usb_d_dev_ep_stall_clr() is also called from the SETUP-packet cleanup path in hal_usb_device.c _usb_d_dev_ep_stall(ep, USB_EP_STALL_CLR); _usb_d_dev_ep_stall(ep | USB_EP_DIR, USB_EP_STALL_CLR);
This runs on every SETUP packet as defensive cleanup of any leftover stall from a previous failed transfer. That might be why the asf4 usb code is wrong, because a toggle reset here breaks SETUP.
So the unconditional DTGL reset for halt clearing must therefore happen in _usb_d_ep_halt_clr itself, which is only reached via the ClearFeature host request (usbdc_clear_ftr_req -> usb_d_ep_halt(HALT_CLR)), using a small HPL helper function.
cuart: Fix waiting time to be per-byte instead of total timeout
The previous code multiplied WT by the number of expected bytes, creating a total timeout proportional to the transfer size. This works fine for (currently unsupported) high baud rates, but it makes it look like the reader "freezes" at default rates due to the very long delay.
Just reset it upon rx and do not multiply it so it behaves as expected.
7816fsm: reset stale cuart state on FSM RESET entry
Reset paths reached without power-cycling (WTIME_EXP, HW_ERR, CARD_REMOVAL during a warm reset) leave the cuart with stale tx_busy, rx_threshold and wtime_etu from the prior transaction. The next ATR then hits card_uart_tx tx_busy assertion, or the ATR receive stalls because the 33-byte ATR can never reach a multi-byte rx_threshold left from a TPDU.
The new card_uart_tx_abort() clears tx_busy + rx_after_tx_compl + WT, without driving a synthetic TX_COMPLETE through the FSM.
iso7816_3_reset_onenter is the right place to do this alongside rx_threshold=1 and wtime_etu=default, this mirrors what card_uart_ctrl(POWER_*=0) already does, but for the warm-reset paths that don't touch power.
libosmo_emb: type-safe tearfree_u64_t wrapper for LDRD/STRD access
Although types are frowned upon because memorizing all differerent flavors of void* is the usual way to get acquainted with any mature C code base some heretics decided to introduce generics in C11, which can be used to make aligned access (which guarantees tear-free/restartable 64 bit access on cortex m4) less exciting.
