Changes

bts: fix TC_rsl_ms_pwr_dyn_ass_updown: simulate a good C/I value

Now that we populate the UL SACCH cache in advance, trxcon is sending
ms-pwr-lvl 7 in the first UL SACCH block (as expected).  This suddenly
makes the testcase fail, because now the MS power loop is perfectly
happy about the received input values and does not order any changes
to the current MS power level anymore, contrary to our expectations.

Why? Short answer: because of C/I (curr 6, avg 6) being outside of
the good range (thresh 13..17).  The MS power loop intentionally
avoids reducing Tx power because that would potentially degrade the
link quality (C/I) even further.  Solution: let's order fake_trx.py
to simulate a C/I value that is within the thresholds.

This alone does not fix the testcase yet, another fix follows.

Change-Id: I8926fc925e930bc2703210931b613988161a72da
Related: c246f207 ("bts: f_est_dchan(): populate UL SACCH cache")
Related: OS#6945