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Started 9 days 9 hr ago
Queued 5.4 sec
Took 36 sec on built-in
cuart: Fix waiting time to be per-byte instead of total timeout

The previous code multiplied WT by the number of expected bytes,
creating a total timeout proportional to the transfer size. This works
fine for (currently unsupported) high baud rates, but it makes it look
like the reader "freezes" at default rates due to the very long delay.

Just reset it upon rx and do not multiply it so it behaves as expected.

Closes:OS#7012
Change-Id: Ic00040b88e1b204db3f4f3edad09878aa28d35a1
Andreas Eversberg at
ccid: reject invalid bClockCommand

Change-Id: I34dedcaaaf3cd67e22b207016f08e745736dd625
Andreas Eversberg at
7816fsm: reset stale cuart state on FSM RESET entry

Reset paths reached without power-cycling (WTIME_EXP, HW_ERR,
CARD_REMOVAL during a warm reset) leave the cuart with stale tx_busy,
rx_threshold and wtime_etu from the prior transaction. The next ATR
then hits card_uart_tx tx_busy assertion, or the ATR receive stalls
because the 33-byte ATR can never reach a multi-byte rx_threshold
left from a TPDU.

The new card_uart_tx_abort() clears tx_busy + rx_after_tx_compl + WT,
without driving a synthetic TX_COMPLETE through the FSM.

iso7816_3_reset_onenter is the right place to do this alongside
rx_threshold=1 and wtime_etu=default, this mirrors what
card_uart_ctrl(POWER_*=0) already does, but for the warm-reset paths
that don't touch power.

Change-Id: Iac8bd7f4f0eecccc9acce149277a4f5016fec7c1
Andreas Eversberg at
7816fsm: fail PPS on invalid first byte in PPS_S_WAIT_PPSX

Change-Id: I5b74b8443a98224c0c95a664a886066495d8b64a
Andreas Eversberg at
7816fsm: state_chg before card_uart_tx in tpdu_s_procedure_action

State change must precede the TX to ensure we don't lose
TX_COMPLETE notifications that arrive at a bad time.

Change-Id: Id66f836452674209e25dc3ee4c37d616de30001b
Andreas Eversberg at
ccid: ICC_MUTE instead of CMD_NOT_SUPPORTED on XfrBlock to unpowered slot

The command is supported, just currently impossible.

Closes:OS#7015
Change-Id: I7f64475b023bd2b6fd1c4263850e56dd84d20b3e
Andreas Eversberg at
libosmo_emb: type-safe tearfree_u64_t wrapper for LDRD/STRD access

Although types are frowned upon because memorizing all differerent flavors
of void* is the usual way to get acquainted with any mature C code base
some heretics decided to introduce generics in C11, which can be used to
make aligned access (which guarantees tear-free/restartable 64 bit access
on cortex m4) less exciting.

Change-Id: I458bfaf53e27c51882c7a8c1326e51d12943b0bb
Andreas Eversberg at