firmware: add tear-free 64bit load/store helpers for jiffies
On Cortex-M4 a 64bit load may compile to two separate LDR instructions which can lead to torn reads due to interrupts. LDRD/STRD are restartable, they either complete or restart from scratch, so the result is always consistent. The only "downside" is the required alignment, which is fine.
Concurrent access from main loop and the different uart irqs was not going well and caused crashes. The libosmocore fsm does still allocate one internal timer, but it is not used by the firmware, so libosmocore will not touch the rbtree.
Additionally ignore checkpatch jiffies complaints because we're trying to do firmware here.
